Design and analysis of QCA adder circuits for efficient computation (original) (raw)

Designing Nanotechnology Based QCA Full Adders

Nanotechnology based QCA basic logic layouts work well while simulating on QCA Designer software. The design of half adders has been reported by various researchers and most of the circuit combinations produce excellent results on simulation. Although design of QCA full adders has been reported by a large number of researchers but the simulation results on most of the circuits fail to produce claimed outputs as such the carry forward work is becoming difficult. There are certain difficulties in producing desired simulation results while joining two half adders to design full adder. The main cause for the problem seems to be the mismatch of input data, when earlier stage data is combined with the forward stage. We have tried to study some full adder designs on the basis of simulation results to move forward with our own designs for the purpose. With analysis of few reported adders we have proposed two full adder circuit layout designs with analysis for efficient implementation and future improvements.

Novel Design of Full Adders using QCA Approach

World Academy of Research in Science and Engineering, 2019

This paper presents a novel design of full adder using QCA approach. It is one of the stand-in technologies introduced as a renewal key to the fundamental limits faced by CMOS technology. Some of the consequences of CMOS technology are their such as high ON/OFF speed, complexity, area and power consumption which are essential to replace with new technology like QCA. By using basic operators like majority gate and an inverter, other logic gates can be designed. Full adders place a major role in computational systems. In this work, 1-bit full adder is mapped out with minimum no. of cells by utilizing cell minimization technique. These circuits are simulated, imitated and verified for their proper output by utilizing QCA designer 2.0.3 tool.

A Novel Design of Full Adder Using Efficient Mux In QCA

International Journal of Scientific Research in Science and Technology, 2022

In this project, the MUX design is modified and proposed in QCA. QCA technology is expected to be a feasible alternative to CMOS circuit implementation in terms of energy efficiency, integration density, and switching frequency as nm technology decreases. For developing QCA circuits, MUX (Multiplexer) is seen to be a good choice. With approximate reductions in area, the suggested complete adder outperforms the best current design. In addition, as compared to existing architectures, same or higher performance characteristics like power and latency are obtained. The suggested design has an outstanding scaling feature and may be utilized to create energy-efficient complicated QCA circuits. These implemented designed are simulated and waveforms are observed in QCA Designer tool.

DESIGN OF A HYBRID ADDER USING QCA IN MAC UNIT

Quantum dot cellular automata design of a hybrid adder is proposed to reduce the area, delay and power consumption of an adder. In previous Quantum dot cellular automata design of a ladner-fischer prefix adder has been implemented. Hybrid adder has a better performance than the ladner-fischer adder. Hybrid adder has a minimum area, delay and power consumption. In this paper we are going to implement the hybrid adder in the application of multiple accumulator units.

Design and Development of 4-Bit Adder Programmable QCA Design using ALU Technique

IRJET, 2022

QCA as the name suggests stands for Quantum dot Cellular Automata is a domain in nano-technology employed in several digital circuits and stupendously used in electronics world. With the advancement in VLSI designs and technology, QCA design acts a powerful tool in modern day electronics in solving adder circuits. QCA cells can be utilized in many ways to study PLD design. This method basically proposes specialized architecture procedure to program devices and simulation is also done to tune QCA cells aimed for this specialized development design. This design provides an insight and idea about how adders are implemented in measuring and electronic instruments and their applications in the digital world. The performance of the respective QCA cell structures are simulated and it is tested by designer tools. It is costeffective and relatively uses very less equipment. This mainly discusses about the area and transistor count with propagation delay. The main idea of this paper is to show how QCA cells are implemented by ALU technique with 4-bit adder circuit.