An Investigation on Spiking Neural Networks Based on the Izhikevich Neuronal Model: Spiking Processing and Hardware Approach (original) (raw)

A Modified Izhikevich Model For Circuit Implementation of Spiking Neural Networks

2010

The Izhikevich neuron model reproduces the spiking and bursting behaviour of certain types of cortical neurons. This model has a second order nonlinearity that makes it difficult to implement in hardware. We propose a simplified version of the model that has a piecewise-linear relationship. This modification simplifies the hardware implementation but demonstrates similar dynamic behaviour.

The Application Perspective of Izhikevich Spiking Neural Model - The Initial Experimental Study

2017

In this paper we explore the Izhikevich spiking neuron model especially the synergy of the dimensionless model parameters and their implications to the spiking of the neuron itself. This spiking, principally the spike rate, is highly important from the application point of view. The understanding of the model is useful for better spiking network design, when the input neuronal stimulus is transferred to the spikes in order to produce faster network response. Whereas we can achieve the better neuronal response of the spiking network through utilization of the correct model parameters which impact to the neurons and the network neuronal dynamics significantly. The model parameters setup were described, demonstrated and spiking neuron model output and behaviour examined. The influence of the input current was also described in a given experimental study.

An Efficient Implementation of a Realistic Spiking Neuron Model on an FPGA

2010

Hardware implementations of spiking neuron models have been studied over the years mainly in researches focused on bio-inspired systems and computational neuroscience. This introduced considerable challenges for researchers particularly in terms of the requirements to realise a efficient embedded solution which may provide artificial devices adaptability and performance in real-time environment. Thus, programmable hardware was widely used as a model for the adaptable requirements of neural networks. From this perspective, this paper describes an efficient implementation of a realistic spiking neuron model on a Field Programmable Gate Array (FPGA). A network consisting of 10 Izhikevich's neurons was produced, in a low-cost and low-density FPGA. It operates 100 times faster than in real time, and the perspectives of these results in newer models of FPGAs are promising.

Hardware Implementation of LIF and HH Spiking Neuronal Models

2019

This paper presents a hardware implementation of both Hodgkin-Huxley (HH) and Leaky Integrate and Fire (LIF) spiking neuronal models. FPGA is used as digital platform due to flexibility and reconfigureability. The proposed neural models are simulated by MatLab and the results are compared with the HDL software’s output in order to evaluate the design. Simple architecture uses two counters and a comparator used as the main part of leaky Integrate and Fire model. For the Hodgkin and Huxley model a Look Up Table based structure is utilized. Although it consumes large amount of area, it results more reasonable propagation delay time hence higher operating frequency. The proposed architectures are evaluated on Stratix III device using Quartus II simulator. Maximum operating frequency of 583 MHz (limited to 500 MHz due to the device port rate) and 76 MHz are achieved for the LIF and HH architectures respectively.

A functional spiking neuron hardware oriented model

Lecture Notes in Computer Science, 2003

In this paper we present a functional model of spiking neuron intended for hardware implementation. The model allows the design of speedand/or area-optimized architectures. Some features of biological spiking neurons are abstracted, while preserving the functionality of the network, in order to define an architecture easily implementable in hardware, mainly in field programmable gate arrays (FPGA). The model permits to optimize the architecture following area or speed criteria according to the application. In the same way, several parameters and features are optional, so as to allow more biologically plausible models by increasing the complexity and hardware requirements of the model. We present the results of three example applications performed to verify the computing capabilities of a simple instance of our model.

An Functional Spiking Neuron Hardware Oriented Model

2003

In this paper we present a functional model of spiking neuron intended for hardware implementation. The model allows the design of speed- and/or area-optimized architectures. Some features of biological spiking neurons are abstracted, while preserving the functionality of the network, in order to define an architecture easily implementable in hardware, mainly in field programmable gate arrays (FPGA). The model permits to optimize the architecture following area or speed criteria according to the application. In the same way, several parameters and features are optional, so as to allow more biologically plausible models by increasing the complexity and hardware requirements of the model. We present the results of three example applications performed to verify the computing capabilities of a simple instance of our model.

Spiking Neural Networks: Modification and Digital Implementation

2020

Real-time large-scale simulation of biological systems is a challenging task due to nonlinear functions describing biochemical reactions in the cells. Being fast, cost and power efficient alongside of capability to work in parallel have made hardware an attractive choice for simulation platform. This thesis proposes a neuromorphic platform for online Spike Timing Dependant Plasticity (STDP) learning, based on the COordinate Rotation DIgital Computer (CORDIC) algorithms. The implemented platform comprises two main components. First, the Izhikevich neuron model is modified for implementation using the CORDIC algorithm and simulated to ensure the model accuracy. Afterwards, the model was described as hardware and implemented on Field Programmable Gate Array (FPGA). Second, the STDP learning algorithm is adapted and optimized using the CORDIC method, synthesized for hardware, and implemented to perform on-FPGA online learning on a network of CORDIC Izhikevich neurons to demonstrate comp...

Hardware-Efficient Design and Implementation of a Spiking Neural Model with Noisy Astrocyte

IEEE Access

Neuromorphic architectures are systems that aim at using the principles of biological neural functions as their basis of operation. One of the most significant challenges in neuromorphic studies, which play an important role in information processing, is the investigation of astrocytes in neuronal models. This paper presents an efficient FPGA-based digital implementation of a spiking neuron model, known as the 2D Hindmarsh-Rose model, and neuron-astrocyte model. To avoid costly computations, the astrocyte and 2D Hindmarsh-Rose models were approximated. The approximation was performed based on multiple method such as the piecewise linear model (PWL) and the particle swarm optimization (PSO) method. As known, noisy mechanisms are stochastic processes which help to improve information processing in nonlinear dynamical systems, including neural systems, and results in more realistic behaviors. Therefore, we presented the noise implications for the approximated neuron-astrocyte models. By introducing two networks consisting of ten 2D Hindmarsh-Rose neurons, the role of the approximated astrocyte in regulation of the neural activities and noise tolerance of the neural networks was investigated. Accordingly, the feasibility of the digital implementation for the proposed 2D Hindmarsh-Rose neuron and the neuron-astrocyte models was studied. Experimental findings of the hardware synthesis and physical implementation on a fieldprogrammable gate array (FPGA) were expounded for the modified spiking neuron model and the approximated astrocyte models with maximum clock frequencies of 247.35 MHz and 279.28 MHz, respectively, showed an increase by about 3.5 times in the frequency in both approximated models. The number of slice registers decreased by 22% and 20% in the proposed 2D Hindmarsh-Rose and astrocyte models, respectively. Also, the networks in the original and approximated 2D Hindmarsh-Rose neurons and astrocyte were synthesized on an FPGA platform. Maximum clock frequencies for both networks were 73.09 MHz and 182.18 MHz, respectively. Comparison of the synthesis results of the two networks showed decreases by 58% and 98% in the number of slice registers and the number of DSPs, respectively. INDEX TERMS Field-programmable gate array, Hindmarsh-Rose neuron model, neuromorphic architectures, spiking neuron model, noisy astrocyte, multiplierless implementation This article has been accepted for publication in IEEE Access.

Biologically Inspired Spiking Neurons: Piecewise Linear Models and Digital Implementation

2012

there has been a strong push recently to examine biological scale simulations of neuromorphic algorithms to achieve stronger inference capabilities. This paper presents a set of piecewise linear spiking neuron models, which can reproduce different behaviors, similar to the biological neuron, both for a single neuron as well as a network of neurons. The proposed models are investigated, in terms of digital implementation feasibility and costs, targeting large scale hardware implementation.

A digital synthesis of hindmarsh-rose neuron: A thalamic neuron model of the brain

2014 22nd Iranian Conference on Electrical Engineering (ICEE), 2014

In recent years, understanding of the brain and its behavior has been an active research field targeting for variety of applications such as: founding new solutions to cure brain diseases, better designation of robots and study of neural network's behavior. In this scheme, the main concept is neuron model as a building block of neural networks. Until now a large variety of the neuron models have been developed. One of these models is biological Hindmarsh-Rose neuron model which it mimics the thalamic neurons of the brain. This paper proposes a digital structure for Hindmarsh-Rose neuron model. Simulation results verify that the proposed circuit can reproduce the spiking pattern, successfully.