Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading (original) (raw)

Simultaneous multithreading–blending thread-level and instruction-level parallelism in advanced microprocessors

Borut Robic

Proc. 5th Word Multiconf. on …, 2001

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Simultaneous multithreading: A platform for next-generation processors

Dean Tullsen

Micro, …, 1997

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A survey of processors with explicit multithreading

Borut Robic, Jurij Šilc

ACM Computing Surveys, 2003

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Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction-and Data-Level Parallelism

Daniele Paolo Scarpazza

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Achieving high levels of instruction-level parallelism with reduced hardware complexity

Scott Mahlke

1997

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A feasibility study of hierarchical multithreading

Muhammad Zahran

Proceedings 16th International Parallel and Distributed Processing Symposium, 2002

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Simultaneous multithreading: Maximizing on-chip parallelism

Dean Tullsen

Proceedings of the 22nd annual …, 1995

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Efficient Exploitation of Parallelism on Pentium ® III and Pentium® 4 Processor-Based Systems

Aart Bik

2001

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Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading proce

Jack Lo

Isca, 1995

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Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor

Dean Tullsen

Proceedings of the …, 1996

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Balanced multithreading: Increasing throughput via a low cost multithreading hierarchy

Dean Tullsen

Proceedings of the 37th …, 2004

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Development of a simultaneously threaded multi-core processor

Soha S. Zaghloul, M. Mudawar

… Technologies for the …, 2005

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Exploring the performance limits of simultaneous multithreading for memory intensive applications

Nectarios Koziris

The Journal of …, 2008

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A clustered approach to multithreaded processors

Venkata Krishnan

Proceedings of the First Merged International Parallel Processing Symposium and Symposium on Parallel and Distributed Processing

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Recent Trends in Superscalar Architecture to Exploit More Instruction Level Parallelism

Kumar Sambhav Pandey

Communications in Computer and Information Science, 2010

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Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading …

Jack Lo

Proceedings of the 23rd annual international symposium on …

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A complexity-effective simultaneous multithreading architecture

Carmelo Acosta

2005

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Chip Multiprocessors Offer an Economical, Scalable Architecture for Future Microprocessors. Thread-Level Speculation Support Allows Them to Speed Up Past Software. The Stanford Hydra CMP

Manohar Prabhu

2000

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Improving execution unit occupancy on SMT-based processors through hardware-aware thread scheduling

Walter Binder

Future Generation Computer Systems, 2014

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Exploiting fine-grain thread level parallelism on the MIT multi-ALU processor

Whay Lee

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235)

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Multithreaded Processors

Borut Robic, Jurij Šilc

The Computer Journal, 2002

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Extending multicore architectures to exploit hybrid parallelism in single-thread applications

Scott Mahlke

2007

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A Survey on Hardware and Software Support for Thread Level Parallelism

Roberto Giorgi

arXiv (Cornell University), 2016

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Dynamic Simultaneous Multithreading Architecture

Ben Lee

2003

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Instruction level parallelism through microthreading—A scalable approach to chip multiprocessors

Dr. Eng. Nabil Hasasneh

The Computer Journal, 2006

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Thread-Sensitive Instruction Issue for SMT Processors

Naser Yazdani

IEEE Computer Architecture Letters, 2004

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Multi-Core Processors: New Way to Achieve High System Performance

Sheema Ameen

International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06)

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Multi-Core Processors: New Way to Achieve High System Performance. Multi-Core Processors: New Way to Achieve High System Performance

Sheema Ameen

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Simultaneous Multi-processor Cores for Efficient Embedded Applications

Earle Jennings

Journal of Computers, 2018

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Asymmetric multiprocessing for simultaneous multithreading processors

Dan Smith

2006

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