Analytical Design Equations for Class-E Power Amplifiers with Finite DC-Feed Inductance and Switch On-Resistance (original) (raw)

Exploring the Effect of Switch ON Resistance on the Performance of Various Class E Power Amplifier Topologies

International Journal of Computing and Digital Systems, 2020

Although the working of class E Power Amplifiers (PA) based on various tuned circuits is very well presented in the referenced papers, the performance disparities due to non-idealities in switching device is not very well discussed. Moreover, there is a lack of comparative study of the same with respect to diverse class E PA topologies. Capturing the effect of parasitics of the switch correctly plays an important role in the PA design, as the design equations with parasitics are greatly affected. This paper aims to explore the impact of the saturation/ON resistance of the switching device on power amplifier performance parameters. The paper presents the analysis and comparison of various SMPA topologies based on the diverse tuned circuit networks. The analysis is done at 2.4 GHz Industrial, Scientific and Medical band (ISM). It is observed that with the variation of switch resistance in the ON state, the power added efficiency and the power delivered to the load indicates an inverse...

Analysis and Design a 2.5 GHz Class-E Power Amplifier in Two Configurations

There are two circuit configurations that commonly used for Class-E power amplifiers, the Infinite DC-feed or Shunt capacitor configuration and the Finite DC-feed or Shunt inductor. Albeit these circuit configurations are not essentially different, however they show different behavior and performance. In this paper we have compared these Class-E configurations at 2.5 GHz. For this purpose, we have designed two class-E circuits, one with Infinite DC-feed configuration and the other with Shunt inductor configuration. We have used the GaN High Electron Mobility Transistor (HEMT) in both designs. Optimized simulations showed 69% drain efficiency, 64% PAE, and 21.46 dBm load power, in the case of Infinite DC-feed design and 71% efficiency, 64.5% PAE, and 15.93 dBm load power in the case of Shunt inductor design. It is obvious that we should consider the importance of PAE inhigh power circuits and the importance of DE in low power circuits. The results propose that Infinite DC-feed design...

Efficiency Analysis of Low Power Class-E Power Amplifier

Modern Applied Science, 2014

This paper presents an analysis of effect of inductor and switch losses on output power and efficiency of low power class-E power amplifier. This structure is suitable for integrated circuit implementation. Since on chip inductors have large losses than the other elements, the effect of their losses on efficiency has been investigated. Equations for the efficiency have been derived and plotted versus the value of inductors and switch losses. Derived equations are evaluated using MATLAB. Also, Cadence Spectre has been used for schematic simulation. Results show a fair matching between simulated power loss and efficiency and MATLAB evaluations. Considering the analysis, the proposed power amplifier shows about 13 % improvement in power effiency at 400 MHz and -2 dBm output power. It is simulated in 0.18 ?m CMOS technology.

PARASITICS ACCOMMODATION IN THE CLASS-E POWER AMPLIFIER DESIGN

This paper presents a class-E power amplifier (PA) new design algorithm optimized for monolithic implementation. This algorithm accommodates simultane- ously the parasitic ground inductance, the switch on-resistance, and the shunt ca- pacitor finite Q-factor value offering an exact solution. For total power dissipation calculation, the effects of the finite turn-off time are also considered. A class-E PA (targeted specifications correspond to a UMTS transceiver, f=1.95 GHz, Pout=0.5 W) was designed following the algorithm proposed in this paper. The simulation results fit well the theoretical solution.

Analysis and design of class-E power amplifier considering MOSFET nonlinear capacitance

International Journal of Power Electronics and Drive Systems (IJPEDS), 2021

Class-E power amplifiers are integrated into many applications because their simple design and high performance. The efficiency of the power amplifier is significantly impacted by the nonlinear characteristic of the switching device, which is not analyzed clearly in theory. The nonlinear drain-tosource parasitic capacitance of the power transistor and the linear external capacitance are both contributed to the optimum conditions for obtaining the exact shunt capacitance. In this paper, a high-efficiency class-E power amplifier with shunt capacitance is designed with the consideration of both linear and nonlinear capacitance. Furthermore, a mathematical analysis is derived to calculate the component values in order to design the class-E power amplifier. Consequently, high power-added efficiency of 94.6% is obtained using MRF9030 MOSFET transistor with parameter of 4W output power and 13.56 MHz operating frequency. Finally, the measurement result of a linear class-E power amplifier circuit is obtained to compare and realize the efficiency of the proposed work.