LLVM: lib/Target/AArch64/AArch64MachineScheduler.cpp Source File (original) (raw)

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14using namespace llvm;

15

17 if (MI)

18 return false;

19

20 switch (MI->getOpcode()) {

21 default:

22 return false;

23 case AArch64::STURQi:

24 case AArch64::STRQui:

25 if (MI->getMF()->getSubtarget<AArch64Subtarget>().isStoreAddressAscend())

26 return false;

27 [[fallthrough]];

28 case AArch64::STPQi:

30 }

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32 return false;

33}

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37 int64_t &Off0, int64_t &Off1) {

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43 return true;

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58 return llabs(Off0 - Off1) < StoreSize;

59}

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70 return OriginalResult;

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72 int64_t Off0, Off1;

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77 return Off0 < Off1;

78 }

79 }

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81 return OriginalResult;

82}

static bool mayOverlapWrite(const MachineInstr &MI0, const MachineInstr &MI1, int64_t &Off0, int64_t &Off1)

Definition AArch64MachineScheduler.cpp:36

static bool needReorderStoreMI(const MachineInstr *MI)

Definition AArch64MachineScheduler.cpp:16

static const MachineOperand & getLdStOffsetOp(const MachineInstr &MI)

Returns the immediate offset operator of a load/store.

static bool hasUnscaledLdStOffset(unsigned Opc)

Return true if it has an unscaled load/store offset.

static bool isPairedLdSt(const MachineInstr &MI)

Returns whether the instruction is a paired load/store.

static int getMemScale(unsigned Opc)

Scaling factor for (scaled or unscaled) load or store.

static const MachineOperand & getLdStBaseOp(const MachineInstr &MI)

Returns the base register operator of a load/store.

bool tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand) override

Apply a set of heuristics to a new candidate for PostRA scheduling.

Definition AArch64MachineScheduler.cpp:61

Representation of each machine instruction.

unsigned getOpcode() const

Returns the opcode of this MachineInstr.

MachineOperand class - Representation of each machine instruction operand.

bool isImm() const

isImm - Tests if this is a MO_Immediate operand.

LLVM_ABI bool isIdenticalTo(const MachineOperand &Other) const

Returns true if this operand is identical to the specified operand except for liveness related flags ...

virtual bool tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand)

Apply a set of heuristics to a new candidate for PostRA scheduling.

MachineInstr * getInstr() const

Returns the representative MachineInstr for this SUnit.

This is an optimization pass for GlobalISel generic memory operations.

Store the state used by GenericScheduler heuristics, required for the lifetime of one invocation of p...