AMDGPUDisassembler.h Source File (original) (raw)

15#ifndef LLVM_LIB_TARGET_AMDGPU_DISASSEMBLER_AMDGPUDISASSEMBLER_H

16#define LLVM_LIB_TARGET_AMDGPU_DISASSEMBLER_AMDGPUDISASSEMBLER_H

25#include

27namespace llvm {

29class MCAsmInfo;

30class MCInst;

31class MCOperand;

32class MCSubtargetInfo;

33class Twine;

38private:

42public:

45 operator bool() const { return Lo || Hi; }

47 assert(NumBits && NumBits <= 64);

48 assert(SubBits >> 1 >> (NumBits - 1) == 0);

49 assert(BitPosition < 128);

50 if (BitPosition < 64) {

51 Lo |= SubBits << BitPosition;

52 Hi |= SubBits >> 1 >> (63 - BitPosition);

53 } else {

54 Hi |= SubBits << (BitPosition - 64);

55 }

56 }

58 unsigned BitPosition) const {

59 assert(NumBits && NumBits <= 64);

60 assert(BitPosition < 128);

62 if (BitPosition < 64)

63 Val = Lo >> BitPosition | Hi << 1 << (63 - BitPosition);

64 else

65 Val = Hi >> (BitPosition - 64);

66 return Val & ((uint64_t(2) << (NumBits - 1)) - 1);

67 }

70 }

73 }

77 }

80 }

83 }

86 }

87};

94private:

95 std::unique_ptr const MCII;

98 const unsigned TargetMaxInstBytes;

102 mutable bool HasLiteral;

103 mutable std::optional EnableWavefrontSize32;

104 unsigned CodeObjectVersion;

105 const MCExpr *UCVersionW64Expr;

106 const MCExpr *UCVersionW32Expr;

107 const MCExpr *UCVersionMDPExpr;

108

109 const MCExpr *createConstantSymbolExpr(StringRef Id, int64_t Val);

110

111public:

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131 template

135 assert(MI.getNumOperands() == 0);

137 HasLiteral = false;

138 const auto SavedBytes = Bytes;

139

143

145 decodeInstruction(Table, TmpInst, Inst, Address, this, STI);

146

148

149 if (Res != Fail) {

150 MI = TmpInst;

151 Comments << LocalComments;

153 }

154 Bytes = SavedBytes;

156 }

157

158 template

162 for (const uint8_t *T : {Table1, Table2}) {

164 return Res;

165 }

167 }

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251 const OpWidthTy Width, unsigned Val, bool MandatoryLiteral = false,

252 unsigned ImmWidth = 0,

254

256 const OpWidthTy Width, unsigned Val, bool MandatoryLiteral = false,

257 unsigned ImmWidth = 0,

259

264

266 unsigned ImmWidth,

271

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282 bool isVI() const;

292

295

297};

298

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302

304private:

305 void *DisInfo;

306 std::vector<uint64_t> ReferencedAddresses;

307

308public:

310 void *disInfo)

312

317

321

323 return ReferencedAddresses;

324 }

325};

326

327}

328

329#endif

This file implements a class to represent arbitrary precision integral constant values and operations...

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file defines the SmallString class.

support::ulittle16_t & Lo

support::ulittle16_t & Hi

const MCInstrInfo * getMCII() const

void convertVOPC64DPPInst(MCInst &MI) const

bool hasKernargPreload() const

void convertEXPInst(MCInst &MI) const

MCOperand createRegOperand(unsigned int RegId) const

MCOperand decodeSpecialReg64(unsigned Val) const

const char * getRegClassName(unsigned RegClassID) const

Expected< bool > decodeCOMPUTE_PGM_RSRC1(uint32_t FourByteBuffer, raw_string_ostream &KdStream) const

Decode as directives that handle COMPUTE_PGM_RSRC1.

Expected< bool > decodeKernelDescriptorDirective(DataExtractor::Cursor &Cursor, ArrayRef< uint8_t > Bytes, raw_string_ostream &KdStream) const

void convertVOPCDPPInst(MCInst &MI) const

unsigned getVgprClassId(const OpWidthTy Width) const

unsigned getAgprClassId(const OpWidthTy Width) const

MCOperand decodeSpecialReg96Plus(unsigned Val) const

MCOperand decodeSDWASrc32(unsigned Val) const

void setABIVersion(unsigned Version) override

ELF-specific, set the ABI version from the object header.

Expected< bool > decodeCOMPUTE_PGM_RSRC2(uint32_t FourByteBuffer, raw_string_ostream &KdStream) const

Decode as directives that handle COMPUTE_PGM_RSRC2.

MCOperand decodeDpp8FI(unsigned Val) const

void convertMacDPPInst(MCInst &MI) const

MCOperand decodeVOPDDstYOp(MCInst &Inst, unsigned Val) const

MCOperand decodeBoolReg(unsigned Val) const

void convertDPP8Inst(MCInst &MI) const

MCOperand createVGPR16Operand(unsigned RegIdx, bool IsHi) const

MCOperand errOperand(unsigned V, const Twine &ErrMsg) const

MCOperand decodeVersionImm(unsigned Imm) const

MCOperand decodeSDWASrc(const OpWidthTy Width, unsigned Val, unsigned ImmWidth, AMDGPU::OperandSemantics Sema) const

Expected< bool > decodeKernelDescriptor(StringRef KdName, ArrayRef< uint8_t > Bytes, uint64_t KdAddress) const

MCOperand decodeSplitBarrier(unsigned Val) const

void convertVOP3DPPInst(MCInst &MI) const

void convertTrue16OpSel(MCInst &MI) const

void convertFMAanyK(MCInst &MI, int ImmLitIdx) const

MCOperand decodeMandatoryLiteralConstant(unsigned Imm) const

MCOperand decodeNonVGPRSrcOp(const OpWidthTy Width, unsigned Val, bool MandatoryLiteral=false, unsigned ImmWidth=0, AMDGPU::OperandSemantics Sema=AMDGPU::OperandSemantics::INT) const

Expected< bool > decodeCOMPUTE_PGM_RSRC3(uint32_t FourByteBuffer, raw_string_ostream &KdStream) const

Decode as directives that handle COMPUTE_PGM_RSRC3.

static MCOperand decodeFPImmed(unsigned ImmWidth, unsigned Imm, AMDGPU::OperandSemantics Sema)

MCOperand decodeSrcOp(const OpWidthTy Width, unsigned Val, bool MandatoryLiteral=false, unsigned ImmWidth=0, AMDGPU::OperandSemantics Sema=AMDGPU::OperandSemantics::INT) const

MCOperand decodeSpecialReg32(unsigned Val) const

MCOperand decodeLiteralConstant(bool ExtendFP64) const

MCOperand decodeSDWAVopcDst(unsigned Val) const

~AMDGPUDisassembler() override=default

void convertVINTERPInst(MCInst &MI) const

void convertSDWAInst(MCInst &MI) const

DecodeStatus tryDecodeInst(const uint8_t *Table, MCInst &MI, InsnType Inst, uint64_t Address, raw_ostream &Comments) const

unsigned getSgprClassId(const OpWidthTy Width) const

static MCOperand decodeIntImmed(unsigned Imm)

DecodeStatus tryDecodeInst(const uint8_t *Table1, const uint8_t *Table2, MCInst &MI, InsnType Inst, uint64_t Address, raw_ostream &Comments) const

void convertMAIInst(MCInst &MI) const

f8f6f4 instructions have different pseudos depending on the used formats.

bool hasArchitectedFlatScratch() const

DecodeStatus getInstruction(MCInst &MI, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &CS) const override

Returns the disassembly of a single instruction.

unsigned getTtmpClassId(const OpWidthTy Width) const

void convertMIMGInst(MCInst &MI) const

bool isMacDPP(MCInst &MI) const

int getTTmpIdx(unsigned Val) const

void convertVOP3PDPPInst(MCInst &MI) const

MCOperand createSRegOperand(unsigned SRegClassID, unsigned Val) const

MCOperand decodeSDWASrc16(unsigned Val) const

Expected< bool > onSymbolStart(SymbolInfoTy &Symbol, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address) const override

Used to perform separate target specific disassembly for a particular symbol.

ArrayRef< uint64_t > getReferencedAddresses() const override

Get the MCSymbolizer's list of addresses that were referenced by symbolizable operands but not resolv...

bool tryAddingSymbolicOperand(MCInst &Inst, raw_ostream &cStream, int64_t Value, uint64_t Address, bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) override

Try to add a symbolic operand instead of Value to the MCInst.

AMDGPUSymbolizer(MCContext &Ctx, std::unique_ptr< MCRelocationInfo > &&RelInfo, void *disInfo)

void tryAddingPcLoadReferenceComment(raw_ostream &cStream, int64_t Value, uint64_t Address) override

Try to add a comment on the PC-relative load.

Class for arbitrary precision integers.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

bool operator==(const DecoderUInt128 &RHS)

DecoderUInt128 operator~() const

bool operator!=(const DecoderUInt128 &RHS)

DecoderUInt128 operator&(const uint64_t &RHS) const

DecoderUInt128 operator&(const DecoderUInt128 &RHS) const

DecoderUInt128(uint64_t Lo, uint64_t Hi=0)

uint64_t extractBitsAsZExtValue(unsigned NumBits, unsigned BitPosition) const

friend raw_ostream & operator<<(raw_ostream &OS, const DecoderUInt128 &RHS)

bool operator!=(const int &RHS)

void insertBits(uint64_t SubBits, unsigned BitPosition, unsigned NumBits)

Tagged union holding either a T or a Error.

This class is intended to be used as a base class for asm properties and features specific to the tar...

Context object for machine code objects.

Superclass for all disassemblers.

const MCSubtargetInfo & STI

raw_ostream * CommentStream

DecodeStatus

Ternary decode status.

Base class for the full range of assembler expressions which are needed for parsing.

Instances of this class represent a single low-level machine instruction.

Interface to description of machine instruction set.

const MCInstrDesc & get(unsigned Opcode) const

Return the machine instruction descriptor that corresponds to the specified instruction opcode.

Instances of this class represent operands of the MCInst class.

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Generic base class for all target subtargets.

Symbolize and annotate disassembled instructions.

std::unique_ptr< MCRelocationInfo > RelInfo

SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...

StringRef - Represent a constant reference to a string, i.e.

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

LLVM Value Representation.

This class implements an extremely fast bulk output stream that can only output to a stream.

A raw_ostream that writes to an std::string.

A raw_ostream that writes to an SmallVector or SmallString.

This is an optimization pass for GlobalISel generic memory operations.

OutputIt move(R &&Range, OutputIt Out)

Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.

Implement std::hash so that hash_code can be used in STL containers.