AMDGPUDisassembler.h Source File (original) (raw)

15#ifndef LLVM_LIB_TARGET_AMDGPU_DISASSEMBLER_AMDGPUDISASSEMBLER_H

16#define LLVM_LIB_TARGET_AMDGPU_DISASSEMBLER_AMDGPUDISASSEMBLER_H

25#include

27namespace llvm {

40private:

41 std::unique_ptr const MCII;

44 const unsigned HwModeRegClass;

45 const unsigned TargetMaxInstBytes;

48 mutable bool HasLiteral;

49 mutable std::optional EnableWavefrontSize32;

50 unsigned CodeObjectVersion;

51 const MCExpr *UCVersionW64Expr;

52 const MCExpr *UCVersionW32Expr;

53 const MCExpr *UCVersionMDPExpr;

55 const MCExpr *createConstantSymbolExpr(StringRef Id, int64_t Val);

59public:

79 template

82 template

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152 unsigned Val) const;

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174 bool isVI() const;

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193};

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200private:

201 void *DisInfo;

202 std::vector<uint64_t> ReferencedAddresses;

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204public:

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219 return ReferencedAddresses;

220 }

221};

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223}

224

225#endif

This file implements a class to represent arbitrary precision integral constant values and operations...

This file defines the SmallString class.

const MCInstrInfo * getMCII() const

Definition AMDGPUDisassembler.h:172

MCOperand decodeNonVGPRSrcOp(const MCInst &Inst, unsigned Width, unsigned Val) const

MCOperand decodeLiteral64Constant() const

void convertVOPC64DPPInst(MCInst &MI) const

bool isBufferInstruction(const MCInst &MI) const

Check if the instruction is a buffer operation (MUBUF, MTBUF, or S_BUFFER)

bool hasKernargPreload() const

void convertEXPInst(MCInst &MI) const

MCOperand decodeSpecialReg64(unsigned Val) const

const char * getRegClassName(unsigned RegClassID) const

Expected< bool > decodeCOMPUTE_PGM_RSRC1(uint32_t FourByteBuffer, raw_string_ostream &KdStream) const

Decode as directives that handle COMPUTE_PGM_RSRC1.

MCOperand decodeSplitBarrier(const MCInst &Inst, unsigned Val) const

Expected< bool > decodeKernelDescriptorDirective(DataExtractor::Cursor &Cursor, ArrayRef< uint8_t > Bytes, raw_string_ostream &KdStream) const

void convertVOPCDPPInst(MCInst &MI) const

MCOperand decodeSpecialReg96Plus(unsigned Val) const

MCOperand decodeSDWASrc32(unsigned Val) const

void setABIVersion(unsigned Version) override

ELF-specific, set the ABI version from the object header.

Expected< bool > decodeCOMPUTE_PGM_RSRC2(uint32_t FourByteBuffer, raw_string_ostream &KdStream) const

Decode as directives that handle COMPUTE_PGM_RSRC2.

unsigned getAgprClassId(unsigned Width) const

MCOperand decodeDpp8FI(unsigned Val) const

MCOperand decodeSDWASrc(unsigned Width, unsigned Val) const

void convertFMAanyK(MCInst &MI) const

DecodeStatus tryDecodeInst(const uint8_t *Table, MCInst &MI, InsnType Inst, uint64_t Address, raw_ostream &Comments) const

void convertMacDPPInst(MCInst &MI) const

MCOperand decodeVOPDDstYOp(MCInst &Inst, unsigned Val) const

void convertDPP8Inst(MCInst &MI) const

MCOperand createVGPR16Operand(unsigned RegIdx, bool IsHi) const

MCOperand errOperand(unsigned V, const Twine &ErrMsg) const

MCOperand decodeVersionImm(unsigned Imm) const

Expected< bool > decodeKernelDescriptor(StringRef KdName, ArrayRef< uint8_t > Bytes, uint64_t KdAddress) const

void convertVOP3DPPInst(MCInst &MI) const

void convertTrue16OpSel(MCInst &MI) const

MCOperand decodeSrcOp(const MCInst &Inst, unsigned Width, unsigned Val) const

MCOperand decodeMandatoryLiteralConstant(unsigned Imm) const

MCOperand decodeLiteralConstant(const MCInstrDesc &Desc, const MCOperandInfo &OpDesc) const

Expected< bool > decodeCOMPUTE_PGM_RSRC3(uint32_t FourByteBuffer, raw_string_ostream &KdStream) const

Decode as directives that handle COMPUTE_PGM_RSRC3.

AMDGPUDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, MCInstrInfo const *MCII)

MCOperand decodeSpecialReg32(unsigned Val) const

MCOperand createRegOperand(MCRegister Reg) const

MCOperand decodeSDWAVopcDst(unsigned Val) const

~AMDGPUDisassembler() override=default

void convertVINTERPInst(MCInst &MI) const

void convertSDWAInst(MCInst &MI) const

unsigned getSgprClassId(unsigned Width) const

static MCOperand decodeIntImmed(unsigned Imm)

void convertWMMAInst(MCInst &MI) const

MCOperand decodeBoolReg(const MCInst &Inst, unsigned Val) const

unsigned getVgprClassId(unsigned Width) const

void convertMAIInst(MCInst &MI) const

f8f6f4 instructions have different pseudos depending on the used formats.

bool hasArchitectedFlatScratch() const

unsigned getTtmpClassId(unsigned Width) const

DecodeStatus getInstruction(MCInst &MI, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &CS) const override

Returns the disassembly of a single instruction.

MCOperand decodeMandatoryLiteral64Constant(uint64_t Imm) const

void convertMIMGInst(MCInst &MI) const

bool isMacDPP(MCInst &MI) const

int getTTmpIdx(unsigned Val) const

void convertVOP3PDPPInst(MCInst &MI) const

MCOperand createSRegOperand(unsigned SRegClassID, unsigned Val) const

MCOperand decodeSDWASrc16(unsigned Val) const

Expected< bool > onSymbolStart(SymbolInfoTy &Symbol, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address) const override

Used to perform separate target specific disassembly for a particular symbol.

ArrayRef< uint64_t > getReferencedAddresses() const override

Get the MCSymbolizer's list of addresses that were referenced by symbolizable operands but not resolv...

Definition AMDGPUDisassembler.h:218

bool tryAddingSymbolicOperand(MCInst &Inst, raw_ostream &cStream, int64_t Value, uint64_t Address, bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) override

Try to add a symbolic operand instead of Value to the MCInst.

AMDGPUSymbolizer(MCContext &Ctx, std::unique_ptr< MCRelocationInfo > &&RelInfo, void *disInfo)

Definition AMDGPUDisassembler.h:205

void tryAddingPcLoadReferenceComment(raw_ostream &cStream, int64_t Value, uint64_t Address) override

Try to add a comment on the PC-relative load.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

Tagged union holding either a T or a Error.

This class is intended to be used as a base class for asm properties and features specific to the tar...

Context object for machine code objects.

MCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)

const MCSubtargetInfo & STI

DecodeStatus

Ternary decode status.

Base class for the full range of assembler expressions which are needed for parsing.

Instances of this class represent a single low-level machine instruction.

Describe properties that are true of each instruction in the target description file.

Interface to description of machine instruction set.

const MCInstrDesc & get(unsigned Opcode) const

Return the machine instruction descriptor that corresponds to the specified instruction opcode.

This holds information about one operand of a machine instruction, indicating the register class for ...

Instances of this class represent operands of the MCInst class.

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Wrapper class representing physical registers. Should be passed by value.

Generic base class for all target subtargets.

MCSymbolizer(MCContext &Ctx, std::unique_ptr< MCRelocationInfo > RelInfo)

Construct an MCSymbolizer, taking ownership of RelInfo.

std::unique_ptr< MCRelocationInfo > RelInfo

StringRef - Represent a constant reference to a string, i.e.

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

LLVM Value Representation.

This class implements an extremely fast bulk output stream that can only output to a stream.

A raw_ostream that writes to an std::string.

This is an optimization pass for GlobalISel generic memory operations.

FunctionAddr VTableAddr uintptr_t uintptr_t Version

OutputIt move(R &&Range, OutputIt Out)

Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.

Implement std::hash so that hash_code can be used in STL containers.