AMDGPUMCTargetDesc.cpp Source File (original) (raw)

36using namespace llvm;

38#define GET_INSTRINFO_MC_DESC

39#define ENABLE_INSTR_PREDICATE_VERIFIER

40#include "AMDGPUGenInstrInfo.inc"

42#define GET_SUBTARGETINFO_MC_DESC

43#include "AMDGPUGenSubtargetInfo.inc"

45#define NoSchedModel NoSchedModelR600

46#define GET_SUBTARGETINFO_MC_DESC

47#include "R600GenSubtargetInfo.inc"

48#undef NoSchedModelR600

50#define GET_REGINFO_MC_DESC

51#include "AMDGPUGenRegisterInfo.inc"

53#define GET_REGINFO_MC_DESC

54#include "R600GenRegisterInfo.inc"

58 InitAMDGPUMCInstrInfo(X);

59 return X;

60}

65 InitR600MCRegisterInfo(X, 0);

66 else

67 InitAMDGPUMCRegisterInfo(X, AMDGPU::PC_REG);

68 return X;

69}

73 InitAMDGPUMCRegisterInfo(X, AMDGPU::PC_REG, DwarfFlavour, DwarfFlavour);

74 return X;

75}

80 return createR600MCSubtargetInfoImpl(TT, CPU, CPU, FS);

83 createAMDGPUMCSubtargetInfoImpl(TT, CPU, CPU, FS);

85 bool IsWave64 = STI->hasFeature(AMDGPU::FeatureWavefrontSize64);

86 bool IsWave32 = STI->hasFeature(AMDGPU::FeatureWavefrontSize32);

90 STI->ToggleFeature(AMDGPU::FeatureSouthernIslands);

92 if (!IsWave64 && !IsWave32) {

97 ? AMDGPU::FeatureWavefrontSize32

98 : AMDGPU::FeatureWavefrontSize64);

99 } else if (IsWave64 && IsWave32) {

100

101

103 ? AMDGPU::FeatureWavefrontSize64

104 : AMDGPU::FeatureWavefrontSize32);

105

106

107

108 STI->ToggleFeature(AMDGPU::FeatureAssemblerPermissiveWavesize);

109 }

110

112 STI->hasFeature(AMDGPU::FeatureWavefrontSize32)) &&

113 "wavesize features are mutually exclusive");

114

115 return STI;

116}

117

119 unsigned SyntaxVariant,

126}

127

133

139

143

145 std::unique_ptr &&MAB,

146 std::unique_ptr &&OW,

147 std::unique_ptr &&Emitter) {

150}

151

152namespace llvm {

154

159 Info->get(Inst.getOpcode()).operands()[0].OperandType !=

161 return false;

162

164

166 return true;

167}

168

170 if (Inst.getOpcode() == AMDGPU::S_SET_VGPR_MSB_gfx12)

173 VgprMSBs = 0;

174}

175

176}

177}

178

182

185

191

198 }

199

200

205

206

209

216}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

static MCInstrInfo * createAMDGPUMCInstrInfo()

Definition AMDGPUMCTargetDesc.cpp:56

static MCTargetStreamer * createAMDGPUAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint)

Definition AMDGPUMCTargetDesc.cpp:129

static MCStreamer * createMCStreamer(const Triple &T, MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&Emitter)

Definition AMDGPUMCTargetDesc.cpp:144

static MCSubtargetInfo * createAMDGPUMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)

Definition AMDGPUMCTargetDesc.cpp:78

static MCInstrAnalysis * createAMDGPUMCInstrAnalysis(const MCInstrInfo *Info)

Definition AMDGPUMCTargetDesc.cpp:179

static MCTargetStreamer * createAMDGPUNullTargetStreamer(MCStreamer &S)

Definition AMDGPUMCTargetDesc.cpp:140

LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTargetMC()

Definition AMDGPUMCTargetDesc.cpp:184

static MCTargetStreamer * createAMDGPUObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)

Definition AMDGPUMCTargetDesc.cpp:134

static MCInstPrinter * createAMDGPUMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)

Definition AMDGPUMCTargetDesc.cpp:118

static MCRegisterInfo * createAMDGPUMCRegisterInfo(const Triple &TT)

Definition AMDGPUMCTargetDesc.cpp:62

Provides AMDGPU specific target descriptions.

Analysis containing CSE Info

#define LLVM_EXTERNAL_VISIBILITY

dxil DXContainer Global Emitter

Provides R600 specific target descriptions.

static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")

bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, uint64_t &Target) const override

Given a branch instruction try to get the address the branch targets.

Definition AMDGPUMCTargetDesc.cpp:155

void updateState(const MCInst &Inst, uint64_t Addr) override

Update internal state with Inst at Addr.

Definition AMDGPUMCTargetDesc.cpp:169

This class is intended to be used as a base class for asm properties and features specific to the tar...

Context object for machine code objects.

This is an instance of a target assembly language printer that converts an MCInst to valid target ass...

Instances of this class represent a single low-level machine instruction.

unsigned getNumOperands() const

unsigned getOpcode() const

const MCOperand & getOperand(unsigned i) const

virtual bool isTerminator(const MCInst &Inst) const

Interface to description of machine instruction set.

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Streaming machine code generation interface.

Generic base class for all target subtargets.

bool hasFeature(unsigned Feature) const

const FeatureBitset & getFeatureBits() const

FeatureBitset ToggleFeature(uint64_t FB)

Toggle a feature and return the re-computed feature bits.

Target specific streamer interface.

StringRef - Represent a constant reference to a string, i.e.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...

bool isGFX10Plus(const MCSubtargetInfo &STI)

bool supportsWave32(const MCSubtargetInfo &STI)

This is an optimization pass for GlobalISel generic memory operations.

MCAsmBackend * createAMDGPUAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)

Target & getTheR600Target()

The target for R600 GPUs.

MCCodeEmitter * createR600MCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)

MCELFStreamer * createAMDGPUELFStreamer(const Triple &T, MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter)

Target & getTheGCNTarget()

The target for GCN GPUs.

constexpr int64_t SignExtend64(uint64_t x)

Sign-extend the number in the bottom B bits of X to a 64-bit integer.

MCRegisterInfo * createGCNMCRegisterInfo(AMDGPUDwarfFlavour DwarfFlavour)

Definition AMDGPUMCTargetDesc.cpp:71

MCInstrInfo * createR600MCInstrInfo()

MCCodeEmitter * createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)

RegisterMCAsmInfo - Helper template for registering a target assembly info implementation.

static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)

RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.

static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)

RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.

static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)

RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.

static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)

RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target.

static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)

static void RegisterMCInstrAnalysis(Target &T, Target::MCInstrAnalysisCtorFnTy Fn)

RegisterMCInstrAnalysis - Register a MCInstrAnalysis implementation for the given target.

static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn)

static void RegisterNullTargetStreamer(Target &T, Target::NullTargetStreamerCtorTy Fn)

static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)

RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.

static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)

RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target.

static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)