LLVM: lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp Source File (original) (raw)
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26using namespace llvm;
27
28#define DEBUG_TYPE "amdgpu-prepare-agpr-alloc"
29
30namespace {
31
32class AMDGPUPrepareAGPRAllocImpl {
33private:
36
38
39public:
41 : TII(*ST.getInstrInfo()), MRI(MRI) {}
43};
44
46public:
47 static char ID;
48
52 }
53
55
56 StringRef getPassName() const override { return "AMDGPU Prepare AGPR Alloc"; }
57
58 void getAnalysisUsage(AnalysisUsage &AU) const override {
61 }
62};
63}
64
66 "AMDGPU Prepare AGPR Alloc", false, false)
69
70char AMDGPUPrepareAGPRAllocLegacy::ID = 0;
71
73
74bool AMDGPUPrepareAGPRAllocLegacy::runOnMachineFunction(MachineFunction &MF) {
75 if (skipFunction(MF.getFunction()))
76 return false;
77
79 return AMDGPUPrepareAGPRAllocImpl(ST, MF.getRegInfo()).run(MF);
80}
81
86 AMDGPUPrepareAGPRAllocImpl(ST, MF.getRegInfo()).run(MF);
88}
89
90bool AMDGPUPrepareAGPRAllocImpl::isAV64Imm(const MachineOperand &MO) const {
91 return MO.isImm() && TII.isLegalAV64PseudoImm(MO.getImm());
92}
93
94bool AMDGPUPrepareAGPRAllocImpl::run(MachineFunction &MF) {
95 if (MRI.isReserved(AMDGPU::AGPR0))
96 return false;
97
98 const MCInstrDesc &AVImmPseudo32 = TII.get(AMDGPU::AV_MOV_B32_IMM_PSEUDO);
99 const MCInstrDesc &AVImmPseudo64 = TII.get(AMDGPU::AV_MOV_B64_IMM_PSEUDO);
100
104 if ((MI.getOpcode() == AMDGPU::V_MOV_B32_e32 &&
105 TII.isInlineConstant(MI, 1)) ||
106 (MI.getOpcode() == AMDGPU::V_ACCVGPR_WRITE_B32_e64 &&
107 MI.getOperand(1).isImm())) {
108 MI.setDesc(AVImmPseudo32);
110 continue;
111 }
112
113
114
115 if ((MI.getOpcode() == AMDGPU::V_MOV_B64_e64 ||
116 MI.getOpcode() == AMDGPU::V_MOV_B64_PSEUDO) &&
117 isAV64Imm(MI.getOperand(1))) {
118 MI.setDesc(AVImmPseudo64);
120 continue;
121 }
122 }
123 }
124
126}
unsigned const MachineRegisterInfo * MRI
const TargetInstrInfo & TII
AMD GCN specific subclass of TargetSubtarget.
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Interface definition for SIRegisterInfo.
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
Definition AMDGPUPrepareAGPRAlloc.cpp:83
Represent the analysis usage information of a pass.
void setPreservesAll()
Set by analyses that do not transform their input at all.
Describe properties that are true of each instruction in the target description file.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
static LLVM_ABI PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
A set of analyses that are preserved following a run of a transformation pass.
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
StringRef - Represent a constant reference to a string, i.e.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
void initializeAMDGPUPrepareAGPRAllocLegacyPass(PassRegistry &)
char & AMDGPUPrepareAGPRAllocLegacyID
Definition AMDGPUPrepareAGPRAlloc.cpp:72