LLVM: lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h Source File (original) (raw)
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13#ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H
14#define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H
15
18#include
19#include
20
21namespace llvm {
39
43
46
47template
49 auto BaseReg = MI.getOperand(0).getReg();
50 for (unsigned I = 1, E = MI.getNumOperands(); I < E; ++I) {
51 const auto &Op = MI.getOperand(I);
52 if (Op.isReg() && Op.getReg() == BaseReg)
53 return true;
54 }
55 return false;
56}
57
59 int64_t Imm);
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61
62
65}
66
69 formatted_raw_ostream &OS,
70 MCInstPrinter *InstPrint);
72 const MCSubtargetInfo &STI);
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78 MCContext &Ctx);
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81 MCContext &Ctx);
82
84 const MCRegisterInfo &MRI,
85 const MCTargetOptions &Options);
86
88 const MCRegisterInfo &MRI,
89 const MCTargetOptions &Options);
90
91
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94 std::unique_ptr &&MAB,
95 std::unique_ptr &&OW,
96 std::unique_ptr &&Emitter);
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100
101
102std::unique_ptr
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107std::unique_ptr
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110
112
113namespace ARM {
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126
127}
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129}
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134#define GET_REGINFO_ENUM
135#include "ARMGenRegisterInfo.inc"
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137
138
139#define GET_INSTRINFO_ENUM
140#define GET_INSTRINFO_MC_HELPER_DECLS
141#include "ARMGenInstrInfo.inc"
142
143#define GET_SUBTARGETINFO_ENUM
144#include "ARMGenSubtargetInfo.inc"
145
146#endif
unsigned const MachineRegisterInfo * MRI
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
dxil DXContainer Global Emitter
Generic interface to target specific assembler backends.
MCCodeEmitter - Generic instruction encoding interface.
Context object for machine code objects.
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Instances of this class represent a single low-level machine instruction.
Describe properties that are true of each instruction in the target description file.
Interface to description of machine instruction set.
Base class for classes that define behaviour that is specific to both the target and the object forma...
Defines the object file and target independent interfaces used by the assembler backend to write nati...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Create MCExprs from relocations found in an object file.
Streaming machine code generation interface.
Generic base class for all target subtargets.
Target specific streamer interface.
StringRef - Represent a constant reference to a string, i.e.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
Definition ARMMCTargetDesc.h:40
bool isLDMBaseRegInList(const Inst &MI)
Definition ARMMCTargetDesc.h:48
MCSubtargetInfo * createARMMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Create a ARM MCSubtargetInfo instance.
std::string ParseARMTriple(const Triple &TT, StringRef CPU)
bool isCPSRDefined(const MCInst &MI, const MCInstrInfo *MCII)
void initLLVMToCVRegMapping(MCRegisterInfo *MRI)
bool isPredicated(const MCInst &MI, const MCInstrInfo *MCII)
uint64_t evaluateBranchTarget(const MCInstrDesc &InstDesc, uint64_t Addr, int64_t Imm)
OperandType
Definition ARMMCTargetDesc.h:114
@ OPERAND_VPRED_N
Definition ARMMCTargetDesc.h:116
@ OPERAND_VPRED_R
Definition ARMMCTargetDesc.h:115
bool isVpred(OperandType op)
Definition ARMMCTargetDesc.h:118
bool isCDECoproc(size_t Coproc, const MCSubtargetInfo &STI)
This is an optimization pass for GlobalISel generic memory operations.
MCTargetStreamer * createARMObjectTargetMachOStreamer(MCStreamer &S)
MCCodeEmitter * createARMLEMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCAsmBackend * createARMBEAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCAsmBackend * createARMLEAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
std::unique_ptr< MCObjectTargetWriter > createARMMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an ARM Mach-O object writer.
MCRelocationInfo * createARMMachORelocationInfo(MCContext &Ctx)
Construct ARM Mach-O relocation info.
MCTargetStreamer * createARMObjectTargetELFStreamer(MCStreamer &S)
DWARFExpression::Operation Op
std::unique_ptr< MCObjectTargetWriter > createARMELFObjectWriter(uint8_t OSABI)
Construct an ELF Mach-O object writer.
MCTargetStreamer * createARMObjectTargetWinCOFFStreamer(MCStreamer &S)
MCTargetStreamer * createARMObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
std::unique_ptr< MCObjectTargetWriter > createARMWinCOFFObjectWriter()
Construct an ARM PE/COFF object writer.
MCTargetStreamer * createARMNullTargetStreamer(MCStreamer &S)
MCCodeEmitter * createARMBEMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCStreamer * createARMWinCOFFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&Emitter)
MCTargetStreamer * createARMTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint)