#include #include "ARMGenRegisterInfo.inc" #include "ARMGenInstrInfo.inc" #include "ARMGenSubtargetInfo.inc"">

LLVM: lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h File Reference (original) (raw)

#include "[llvm/Support/DataTypes.h](llvm%5F2Support%5F2DataTypes%5F8h%5Fsource.html)"
#include "[llvm/MC/MCInstrDesc.h](MCInstrDesc%5F8h%5Fsource.html)"
#include <memory>
#include <string>
#include "ARMGenRegisterInfo.inc"
#include "ARMGenInstrInfo.inc"
#include "ARMGenSubtargetInfo.inc"

Go to the source code of this file.

Namespaces
namespace llvm
This is an optimization pass for GlobalISel generic memory operations.
namespace llvm::ARM_MC
namespace llvm::ARM
Define some predicates that are used for node matching.
Functions
std::string llvm::ARM_MC::ParseARMTriple (const Triple &TT, StringRef CPU)
void llvm::ARM_MC::initLLVMToCVRegMapping (MCRegisterInfo *MRI)
bool llvm::ARM_MC::isPredicated (const MCInst &MI, const MCInstrInfo *MCII)
bool llvm::ARM_MC::isCPSRDefined (const MCInst &MI, const MCInstrInfo *MCII)
template
bool llvm::ARM_MC::isLDMBaseRegInList (const Inst &MI)
uint64_t llvm::ARM_MC::evaluateBranchTarget (const MCInstrDesc &InstDesc, uint64_t Addr, int64_t Imm)
MCSubtargetInfo * llvm::ARM_MC::createARMMCSubtargetInfo (const Triple &TT, StringRef CPU, StringRef FS)
Create a ARM MCSubtargetInfo instance.
MCTargetStreamer * llvm::createARMNullTargetStreamer (MCStreamer &S)
MCTargetStreamer * llvm::createARMTargetAsmStreamer (MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint)
MCTargetStreamer * llvm::createARMObjectTargetStreamer (MCStreamer &S, const MCSubtargetInfo &STI)
MCTargetStreamer * llvm::createARMObjectTargetELFStreamer (MCStreamer &S)
MCTargetStreamer * llvm::createARMObjectTargetMachOStreamer (MCStreamer &S)
MCTargetStreamer * llvm::createARMObjectTargetWinCOFFStreamer (MCStreamer &S)
MCCodeEmitter * llvm::createARMLEMCCodeEmitter (const MCInstrInfo &MCII, MCContext &Ctx)
MCCodeEmitter * llvm::createARMBEMCCodeEmitter (const MCInstrInfo &MCII, MCContext &Ctx)
MCAsmBackend * llvm::createARMLEAsmBackend (const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCAsmBackend * llvm::createARMBEAsmBackend (const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCStreamer * llvm::createARMWinCOFFStreamer (MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&Emitter)
std::unique_ptr< MCObjectTargetWriter > llvm::createARMELFObjectWriter (uint8_t OSABI)
Construct an ELF Mach-O object writer.
std::unique_ptr< MCObjectTargetWriter > llvm::createARMMachObjectWriter (bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an ARM Mach-O object writer.
std::unique_ptr< MCObjectTargetWriter > llvm::createARMWinCOFFObjectWriter ()
Construct an ARM PE/COFF object writer.
MCRelocationInfo * llvm::createARMMachORelocationInfo (MCContext &Ctx)
Construct ARM Mach-O relocation info.
bool llvm::ARM::isVpred (OperandType op)
bool llvm::ARM::isVpred (uint8_t op)
bool llvm::ARM::isCDECoproc (size_t Coproc, const MCSubtargetInfo &STI)

GET_INSTRINFO_ENUM

#define GET_INSTRINFO_ENUM

GET_INSTRINFO_MC_HELPER_DECLS

#define GET_INSTRINFO_MC_HELPER_DECLS

GET_REGINFO_ENUM

GET_SUBTARGETINFO_ENUM

#define GET_SUBTARGETINFO_ENUM