LLVM: lib/Target/ARM/ARMTargetMachine.cpp File Reference (original ) (raw )Go to the source code of this file.
Namespaces
namespace
llvm
This is an optimization pass for GlobalISel generic memory operations.
Functions
void
llvm::initializeARMExecutionDomainFixPass (PassRegistry &)
LLVM_EXTERNAL_VISIBILITY void
LLVMInitializeARMTarget ()
static std::unique_ptr< TargetLoweringObjectFile >
createTLOF (const Triple &TT)
static ARMBaseTargetMachine::ARMABI
computeTargetABI (const Triple &TT, StringRef CPU, const TargetOptions &Options )
static std::string
computeDataLayout (const Triple &TT, StringRef CPU, const TargetOptions &Options , bool isLittle)
static Reloc::Model
getEffectiveRelocModel (const Triple &TT, std::optional< Reloc::Model > RM)
INITIALIZE_PASS_BEGIN (ARMExecutionDomainFix, "arm-execution -domain-fix", "ARM Execution Domain Fix", false, false) INITIALIZE_PASS_END (ARMExecutionDomainFix
Variables
static cl::opt < bool >
DisableA15SDOptimization ("disable-a15-sd-optimization", cl::Hidden, cl::desc ("Inhibit optimization of S->D register accesses on A15"), cl::init(false))
static cl::opt < bool >
EnableAtomicTidy ("arm-atomic-cfg-tidy", cl::Hidden, cl::desc ("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true ))
static cl::opt < bool >
EnableARMLoadStoreOpt ("arm-load -store-opt", cl::Hidden, cl::desc ("Enable ARM load /store optimization pass"), cl::init(true ))
static cl::opt < cl::boolOrDefault >
EnableGlobalMerge ("arm-global-merge", cl::Hidden, cl::desc ("Enable the global merge pass"))
arm execution domain
fix
arm execution domain ARM Execution Domain
Fix
arm execution domain ARM Execution Domain
false
◆ computeDataLayout()◆ computeTargetABI()◆ createTLOF()◆ getEffectiveRelocModel()◆ INITIALIZE_PASS_BEGIN()
INITIALIZE_PASS_BEGIN
(
ARMExecutionDomainFix
,
"arm-execution -domain-fix"
,
"ARM Execution Domain Fix"
,
false
,
false
)
◆ LLVMInitializeARMTarget()Definition at line 85 of file ARMTargetMachine.cpp .
References A , B , llvm::PassRegistry::getPassRegistry() , llvm::getTheARMBETarget() , llvm::getTheARMLETarget() , llvm::getTheThumbBETarget() , llvm::getTheThumbLETarget() , llvm::initializeARMBlockPlacementPass() , llvm::initializeARMBranchTargetsPass() , llvm::initializeARMConstantIslandsPass() , llvm::initializeARMDAGToDAGISelLegacyPass() , llvm::initializeARMExecutionDomainFixPass() , llvm::initializeARMExpandPseudoPass() , llvm::initializeARMFixCortexA57AES1742098Pass() , llvm::initializeARMLoadStoreOptPass() , llvm::initializeARMLowOverheadLoopsPass() , llvm::initializeARMParallelDSPPass() , llvm::initializeARMPreAllocLoadStoreOptPass() , llvm::initializeARMSLSHardeningPass() , llvm::initializeGlobalISel() , llvm::initializeMVEGatherScatterLoweringPass() , llvm::initializeMVELaneInterleavingPass() , llvm::initializeMVETailPredicationPass() , llvm::initializeMVETPAndVPTOptimisationsPass() , llvm::initializeMVEVPTBlockPass() , llvm::initializeThumb2SizeReducePass() , X , and Y .
◆ DisableA15SDOptimization
cl::opt < bool > DisableA15SDOptimization("disable-a15-sd-optimization", cl::Hidden, cl::desc ("Inhibit optimization of S->D register accesses on A15"), cl::init(false)) ( "disable-a15-sd-optimization" , cl::Hidden , cl::desc ("Inhibit optimization of S->D register accesses on A15") , cl::init(false) )
static
◆ EnableARMLoadStoreOpt◆ EnableAtomicTidy
cl::opt < bool > EnableAtomicTidy("arm-atomic-cfg-tidy", cl::Hidden, cl::desc ("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true )) ( "arm-atomic-cfg-tidy" , cl::Hidden , cl::desc ("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information") , cl::init(true ) )
static
◆ EnableGlobalMerge◆ false◆ fix◆ Fix