CSKYDisassembler.cpp Source File (original) (raw)

28using namespace llvm;

31#define DEBUG_TYPE "csky-disassembler"

35namespace {

37 std::unique_ptr const MCII;

40public:

47};

48}

57 return new CSKYDisassembler(STI, Ctx, T.createMCInstrInfo());

58}

66 CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3, CSKY::R4, CSKY::R5, CSKY::R6,

67 CSKY::R7, CSKY::R8, CSKY::R9, CSKY::R10, CSKY::R11, CSKY::R12, CSKY::R13,

68 CSKY::R14, CSKY::R15, CSKY::R16, CSKY::R17, CSKY::R18, CSKY::R19, CSKY::R20,

69 CSKY::R21, CSKY::R22, CSKY::R23, CSKY::R24, CSKY::R25, CSKY::R26, CSKY::R27,

70 CSKY::R28, CSKY::R29, CSKY::R30, CSKY::R31};

73 CSKY::R0_R1, CSKY::R1_R2, CSKY::R2_R3, CSKY::R3_R4, CSKY::R4_R5,

74 CSKY::R5_R6, CSKY::R6_R7, CSKY::R7_R8, CSKY::R8_R9, CSKY::R9_R10,

75 CSKY::R10_R11, CSKY::R11_R12, CSKY::R12_R13, CSKY::R13_R14, CSKY::R14_R15,

76 CSKY::R15_R16, CSKY::R16_R17, CSKY::R17_R18, CSKY::R18_R19, CSKY::R19_R20,

77 CSKY::R20_R21, CSKY::R21_R22, CSKY::R22_R23, CSKY::R23_R24, CSKY::R24_R25,

78 CSKY::R25_R26, CSKY::R26_R27, CSKY::R27_R28, CSKY::R28_R29, CSKY::R29_R30,

79 CSKY::R30_R31, CSKY::R31_R32};

82 CSKY::F0_32, CSKY::F1_32, CSKY::F2_32, CSKY::F3_32, CSKY::F4_32,

83 CSKY::F5_32, CSKY::F6_32, CSKY::F7_32, CSKY::F8_32, CSKY::F9_32,

84 CSKY::F10_32, CSKY::F11_32, CSKY::F12_32, CSKY::F13_32, CSKY::F14_32,

85 CSKY::F15_32, CSKY::F16_32, CSKY::F17_32, CSKY::F18_32, CSKY::F19_32,

86 CSKY::F20_32, CSKY::F21_32, CSKY::F22_32, CSKY::F23_32, CSKY::F24_32,

87 CSKY::F25_32, CSKY::F26_32, CSKY::F27_32, CSKY::F28_32, CSKY::F29_32,

88 CSKY::F30_32, CSKY::F31_32};

91 CSKY::F0_64, CSKY::F1_64, CSKY::F2_64, CSKY::F3_64, CSKY::F4_64,

92 CSKY::F5_64, CSKY::F6_64, CSKY::F7_64, CSKY::F8_64, CSKY::F9_64,

93 CSKY::F10_64, CSKY::F11_64, CSKY::F12_64, CSKY::F13_64, CSKY::F14_64,

94 CSKY::F15_64, CSKY::F16_64, CSKY::F17_64, CSKY::F18_64, CSKY::F19_64,

95 CSKY::F20_64, CSKY::F21_64, CSKY::F22_64, CSKY::F23_64, CSKY::F24_64,

96 CSKY::F25_64, CSKY::F26_64, CSKY::F27_64, CSKY::F28_64, CSKY::F29_64,

97 CSKY::F30_64, CSKY::F31_64};

100 CSKY::F0_128, CSKY::F1_128, CSKY::F2_128, CSKY::F3_128, CSKY::F4_128,

101 CSKY::F5_128, CSKY::F6_128, CSKY::F7_128, CSKY::F8_128, CSKY::F9_128,

102 CSKY::F10_128, CSKY::F11_128, CSKY::F12_128, CSKY::F13_128, CSKY::F14_128,

103 CSKY::F15_128, CSKY::F16_128, CSKY::F17_128, CSKY::F18_128, CSKY::F19_128,

104 CSKY::F20_128, CSKY::F21_128, CSKY::F22_128, CSKY::F23_128, CSKY::F24_128,

105 CSKY::F25_128, CSKY::F26_128, CSKY::F27_128, CSKY::F28_128, CSKY::F29_128,

106 CSKY::F30_128, CSKY::F31_128};

107

111 if (RegNo >= 32)

113

116}

117

121 if (RegNo >= 32)

123

126}

127

131 if (RegNo >= 16)

133

136}

137

141 if (RegNo >= 16)

143

146}

147

151 if (RegNo >= 16)

153

156}

157

161 if (RegNo >= 32)

163

166}

167

168

169[[maybe_unused]]

173 if (RegNo >= 16)

175

178}

179

183 if (RegNo >= 16)

185

188}

189

193 if (RegNo >= 8)

195

198}

199

205

211 bool hasHighReg = FeatureBits[CSKY::FeatureHighreg];

212

213 if (RegNo >= 32 || (!hasHighReg && RegNo >= 16))

215

218}

219

225

226template <unsigned N, unsigned S>

228 int64_t Address,

233}

234

235template

237 int64_t Address,

242}

243

247 if ((Imm >> 7) & 0x1) {

249 } else {

250 uint64_t V = ((Imm ^ 0xFFFFFFFF) & 0xFF);

252 }

253

255}

256

258 int64_t Address,

261

262 if (Imm == 0)

264 else if (Imm == 1)

266 else if (Imm == 2)

268 else if (Imm == 3)

270 else

272

274}

275

277 int64_t Address,

280

281 auto Imm5 = Imm & 0x1f;

282 auto Ry = (Imm >> 5) & 0x1f;

283

287

289

291}

292

294 int64_t Address,

297

298 auto Imm5 = Imm & 0x1f;

299 auto Ry = (Imm >> 5) & 0x1f;

300

304

306

308}

309

311 int64_t Address,

314

315 auto Imm5 = Imm & 0x1f;

316 auto Ry = (Imm >> 5) & 0x1f;

317

321

323

325}

326

328 int64_t Address,

331

332 auto Imm5 = Imm & 0x1f;

333 auto Ry = (Imm >> 5) & 0x1f;

334

338

340

342}

343

345 int64_t Address,

348

349 auto Imm5 = Imm & 0x1f;

350 auto Ry = (Imm >> 5) & 0x1f;

351

355

357

359}

360

362 int64_t Address,

366}

367

368template <unsigned N, unsigned S>

370 int64_t Address,

373

376}

377

378#include "CSKYGenDisassemblerTables.inc"

379

383 LLVM_DEBUG(dbgs() << "Trying CSKY 32-bit fpuv3 table :\n");

384 if (!STI.hasFeature(CSKY::FeatureFPUV3_HF) &&

385 !STI.hasFeature(CSKY::FeatureFPUV3_SF) &&

386 !STI.hasFeature(CSKY::FeatureFPUV3_DF))

387 return false;

388

390 decodeInstruction(DecoderTableFPUV332, MI, insn, Address, DisAsm, STI);

391

393 MI.clear();

394 return false;

395 }

396

397 return true;

398}

399

404

405 uint32_t Insn;

407

409

410 if ((Insn >> 14) == 0x3) {

411 if (Bytes.size() < 4) {

414 }

416

419 else {

420 LLVM_DEBUG(dbgs() << "Trying CSKY 32-bit table :\n");

421 Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);

422 }

423

425 } else {

426 if (Bytes.size() < 2) {

429 }

430 LLVM_DEBUG(dbgs() << "Trying CSKY 16-bit table :\n");

431 Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI);

433 }

434

435 if (MI.getOpcode() == CSKY::INS32) {

436 MI.getOperand(3).setImm(MI.getOperand(3).getImm() +

437 MI.getOperand(4).getImm());

438 }

439

441}

MCDisassembler::DecodeStatus DecodeStatus

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

static const uint16_t GPRPairDecoderTable[]

static const uint16_t GPRDecoderTable[]

static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:206

static const uint16_t FPR32DecoderTable[]

Definition CSKYDisassembler.cpp:81

static DecodeStatus DecodeRegSeqOperandF2(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:327

static DecodeStatus DecodesFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:128

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeCSKYDisassembler()

Definition CSKYDisassembler.cpp:60

static DecodeStatus decodeJMPIXImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:257

static const uint16_t FPR128DecoderTable[]

Definition CSKYDisassembler.cpp:99

static MCDisassembler * createCSKYDisassembler(const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)

Definition CSKYDisassembler.cpp:54

static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:158

static DecodeStatus DecodeCARRYRegisterClass(MCInst &Inst, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:220

static DecodeStatus DecodeRegSeqOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:276

static DecodeStatus decodeLRW16Imm8(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:244

static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:227

static DecodeStatus DecodeRegSeqOperandF1(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:293

static DecodeStatus DecodesGPRRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:180

static DecodeStatus DecodeRegSeqOperandD2(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:344

static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:108

static DecodeStatus decodeOImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:236

static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:118

static DecodeStatus decodeImmShiftOpValue(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:361

static DecodeStatus DecodesFPR64_VRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:148

static DecodeStatus DecodesFPR128RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:170

static DecodeStatus DecodeRegSeqOperandD1(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:310

static DecodeStatus DecodemGPRRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:190

static bool decodeFPUV3Instruction(MCInst &MI, uint32_t insn, uint64_t Address, const MCDisassembler *DisAsm, const MCSubtargetInfo &STI)

Definition CSKYDisassembler.cpp:380

static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:369

static const uint16_t FPR64DecoderTable[]

Definition CSKYDisassembler.cpp:90

static DecodeStatus DecodeGPRSPRegisterClass(MCInst &Inst, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:200

static DecodeStatus DecodesFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)

Definition CSKYDisassembler.cpp:138

#define LLVM_EXTERNAL_VISIBILITY

This file defines the DenseMap class.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

size_t size() const

size - Get the array size.

Container class for subtarget features.

Context object for machine code objects.

Superclass for all disassemblers.

const MCSubtargetInfo & getSubtargetInfo() const

DecodeStatus

Ternary decode status.

Instances of this class represent a single low-level machine instruction.

void addOperand(const MCOperand Op)

Interface to description of machine instruction set.

static MCOperand createReg(MCRegister Reg)

static MCOperand createImm(int64_t Val)

Generic base class for all target subtargets.

bool hasFeature(unsigned Feature) const

const FeatureBitset & getFeatureBits() const

StringRef - Represent a constant reference to a string, i.e.

Target - Wrapper for Target specific information.

This class implements an extremely fast bulk output stream that can only output to a stream.

uint16_t read16le(const void *P)

This is an optimization pass for GlobalISel generic memory operations.

unsigned Log2_64(uint64_t Value)

Return the floor log base 2 of the specified value, -1 if the value is zero.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

constexpr bool isUInt(uint64_t x)

Checks if an unsigned integer fits into the given bit width.

Target & getTheCSKYTarget()

constexpr int64_t SignExtend64(uint64_t x)

Sign-extend the number in the bottom B bits of X to a 64-bit integer.

static void RegisterMCDisassembler(Target &T, Target::MCDisassemblerCtorTy Fn)

RegisterMCDisassembler - Register a MCDisassembler implementation for the given target.