LLVM: lib/Target/CSKY/CSKYFrameLowering.cpp Source File (original) (raw)

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25using namespace llvm;

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27#define DEBUG_TYPE "csky-frame-lowering"

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52void CSKYFrameLowering::determineFrameLayout(MachineFunction &MF) const {

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61 if (RI->hasStackRealignment(MF)) {

62 Align MaxStackAlign = std::max(StackAlign, MFI.getMaxAlign());

63 FrameSize += (MaxStackAlign.value() - StackAlign.value());

64 StackAlign = MaxStackAlign;

65 }

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72 FrameSize = alignTo(FrameSize, StackAlign);

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74

76}

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100 determineFrameLayout(MF);

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104 uint64_t StackSize = MFI.getStackSize();

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107 if (StackSize == 0 && !MFI.adjustsStack())

108 return;

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110 const auto &CSI = MFI.getCalleeSavedInfo();

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117 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -(static_cast<int64_t>(ActualSize)),

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121 unsigned CFIIndex =

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132 std::advance(MBBI, CSI.size());

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136 for (const auto &Entry : CSI) {

137 int64_t Offset = MFI.getObjectOffset(Entry.getFrameIdx());

139

140 unsigned Num = TRI->getRegSizeInBits(Reg, MRI) / 32;

141 for (unsigned i = 0; i < Num; i++) {

143 nullptr, RI->getDwarfRegNum(Reg, true) + i, Offset + i * 4));

146 }

147 }

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157 nullptr, RI->getDwarfRegNum(FPReg, true)));

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163 -(static_cast<int64_t>(StackSize - ActualSize)),

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168 if (RI->hasStackRealignment(MF)) {

169 Align MaxAlignment = MFI.getMaxAlign();

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172 if (STI.hasE2() && isUInt<12>(~(-(int)MaxAlignment.value()))) {

175 .addImm(~(-(int)MaxAlignment.value()));

176 } else {

177 unsigned ShiftAmount = Log2(MaxAlignment);

178

179 if (STI.hasE2()) {

184 .addImm(ShiftAmount);

187 .addImm(ShiftAmount);

188 } else {

194 .addImm(ShiftAmount);

197 .addImm(ShiftAmount);

199 }

200 }

201 }

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209 }

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211 } else {

213 -(static_cast<int64_t>(StackSize - ActualSize)),

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220 }

221}

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235 if (MBB.empty()) {

236 MBBI = MBB.getFirstTerminator();

238 MBBI = MBB.getLastNonDebugInstr();

239 DL = MBBI->getDebugLoc();

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243 if (MBBI->isTerminator())

245 }

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247 const auto &CSI = MFI.getCalleeSavedInfo();

248 uint64_t StackSize = MFI.getStackSize();

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256 auto LastFrameDestroy = MBBI;

257 if (!CSI.empty())

258 LastFrameDestroy = std::prev(MBBI, CSI.size());

259

265 } else {

266 adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, (StackSize - ActualSize),

268 }

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272}

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276 unsigned FnSize = 0;

277 for (auto &MBB : MF) {

278 for (auto &MI : MBB)

279 FnSize += TII.getInstSizeInBytes(MI);

280 }

282 return FnSize;

283}

284

287 unsigned Limit = (1 << 12) - 1;

288

289 for (auto &MBB : MF) {

290 for (auto &MI : MBB) {

291 if (MI.isDebugInstr())

292 continue;

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294 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {

295 if (MI.getOperand(i).isFI())

296 continue;

297

298 if (MI.getOpcode() == CSKY::SPILL_CARRY ||

299 MI.getOpcode() == CSKY::RESTORE_CARRY ||

300 MI.getOpcode() == CSKY::STORE_PAIR ||

301 MI.getOpcode() == CSKY::LOAD_PAIR) {

302 Limit = std::min(Limit, ((1U << 12) - 1) * 4);

303 break;

304 }

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306 if (MI.getOpcode() == CSKY::ADDI32) {

307 Limit = std::min(Limit, (1U << 12));

308 break;

309 }

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311 if (MI.getOpcode() == CSKY::ADDI16XZ) {

312 Limit = std::min(Limit, (1U << 3));

313 break;

314 }

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318 if (MI.getOpcode() == CSKY::ADDI16)

319 break;

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323 default:

326 "Unhandled addressing mode in stack size limit calculation");

328 Limit = std::min(Limit, (1U << 12) - 1);

329 break;

331 Limit = std::min(Limit, ((1U << 12) - 1) * 2);

332 break;

334 Limit = std::min(Limit, ((1U << 12) - 1) * 4);

335 break;

337 Limit = std::min(Limit, (1U << 5) - 1);

338 break;

340 Limit = std::min(Limit, ((1U << 5) - 1) * 2);

341 break;

343 Limit = std::min(Limit, ((1U << 5) - 1) * 4);

344 break;

346 Limit = std::min(Limit, ((1U << 8) - 1) * 4);

347 break;

348 }

349 break;

350 }

351 }

352 }

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354 return Limit;

355}

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369 SavedRegs.set(CSKY::R8);

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373 SavedRegs.set(CSKY::R7);

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380 static const MCPhysReg CSRegs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3,

381 CSKY::R12, CSKY::R13, 0};

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383 for (unsigned i = 0; CSRegs[i]; ++i)

384 SavedRegs.set(CSRegs[i]);

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386 if (STI.hasHighRegisters()) {

387

388 static const MCPhysReg CSHRegs[] = {CSKY::R18, CSKY::R19, CSKY::R20,

389 CSKY::R21, CSKY::R22, CSKY::R23,

390 CSKY::R24, CSKY::R25, 0};

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392 for (unsigned i = 0; CSHRegs[i]; ++i)

393 SavedRegs.set(CSHRegs[i]);

394 }

395

396 static const MCPhysReg CSF32Regs[] = {

397 CSKY::F8_32, CSKY::F9_32, CSKY::F10_32,

398 CSKY::F11_32, CSKY::F12_32, CSKY::F13_32,

399 CSKY::F14_32, CSKY::F15_32, 0};

400 static const MCPhysReg CSF64Regs[] = {

401 CSKY::F8_64, CSKY::F9_64, CSKY::F10_64,

402 CSKY::F11_64, CSKY::F12_64, CSKY::F13_64,

403 CSKY::F14_64, CSKY::F15_64, 0};

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406 if (STI.hasFPUv2DoubleFloat() || STI.hasFPUv3DoubleFloat())

407 FRegs = CSF64Regs;

408 else if (STI.hasFPUv2SingleFloat() || STI.hasFPUv3SingleFloat())

409 FRegs = CSF32Regs;

410

411 if (FRegs != NULL) {

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414 for (unsigned i = 0; Regs[i]; ++i)

415 if (CSKY::FPR32RegClass.contains(Regs[i]) ||

416 CSKY::FPR64RegClass.contains(Regs[i])) {

417 unsigned x = 0;

418 for (; FRegs[x]; ++x)

419 if (FRegs[x] == Regs[i])

420 break;

421 if (FRegs[x] == 0)

422 SavedRegs.set(Regs[i]);

423 }

424 }

425 }

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427 unsigned CSStackSize = 0;

428 for (unsigned Reg : SavedRegs.set_bits()) {

429 auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8;

431 }

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437 bool BigFrame = (MFI.estimateStackSize(MF) + CSStackSize >= Limit);

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439 if (BigFrame || CFI->isCRSpilled() || !STI.hasE2()) {

441 unsigned size = TRI->getSpillSize(*RC);

442 Align align = TRI->getSpillAlign(*RC);

443

445 }

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450 if (FnSize >= ((1 << (16 - 1)) * 2))

451 SavedRegs.set(CSKY::R15);

452

454}

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467 return true;

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472 if (MI != MBB.end() && MI->isDebugInstr())

473 DL = MI->getDebugLoc();

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475 for (auto &CS : CSI) {

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479 TII.storeRegToStackSlot(MBB, MI, Reg, true, CS.getFrameIdx(), RC,

481 }

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483 return true;

484}

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490 return true;

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495 if (MI != MBB.end() && MI->isDebugInstr())

496 DL = MI->getDebugLoc();

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498 for (auto &CS : reverse(CSI)) {

501 TII.loadRegFromStackSlot(MBB, MI, Reg, CS.getFrameIdx(), RC, Register());

502 assert(MI != MBB.begin() && "loadRegFromStackSlot didn't insert any code!");

503 }

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505 return true;

506}

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521 int64_t Amount = MI->getOperand(0).getImm();

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523 if (Amount != 0) {

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527 if (MI->getOpcode() == CSKY::ADJCALLSTACKDOWN)

528 Amount = -Amount;

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531 }

532 }

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534 return MBB.erase(MI);

535}

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540 Register SrcReg, int64_t Val,

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544 if (DestReg == SrcReg && Val == 0)

545 return;

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550 DestReg)

552 .addImm(std::abs(Val))

556 TII->get(Val < 0 ? CSKY::SUBI16SPSP : CSKY::ADDI16SPSP), CSKY::R14)

558 .addImm(std::abs(Val))

560 } else {

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562 unsigned Op = 0;

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564 if (STI.hasE2()) {

565 Op = Val < 0 ? CSKY::SUBU32 : CSKY::ADDU32;

566 } else {

567 assert(SrcReg == DestReg);

568 Op = Val < 0 ? CSKY::SUBU16XZ : CSKY::ADDU16XZ;

569 }

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572

577 }

578}

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586 const auto &CSI = MFI.getCalleeSavedInfo();

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588 int MinCSFI = 0;

589 int MaxCSFI = -1;

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591 int Offset = MFI.getObjectOffset(FI) + MFI.getOffsetAdjustment();

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593 if (CSI.size()) {

594 MinCSFI = CSI[0].getFrameIdx();

595 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();

596 }

597

598 if (FI >= MinCSFI && FI <= MaxCSFI) {

599 FrameReg = CSKY::R14;

603 if (!MFI.isFixedObjectIndex(FI)) {

604 FrameReg = hasBP(MF) ? getBPReg(STI) : CSKY::R14;

605 Offset += MFI.getStackSize();

606 } else {

609 }

610 } else {

611 if (MFI.isFixedObjectIndex(FI) && hasFP(MF)) {

614 } else {

615 FrameReg = hasBP(MF) ? getBPReg(STI) : CSKY::R14;

616 Offset += MFI.getStackSize();

617 }

618 }

619

621}

unsigned const MachineRegisterInfo * MRI

static unsigned estimateRSStackSizeLimit(MachineFunction &MF)

Look at each instruction that references stack frames and return the stack size limit beyond which so...

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

static unsigned EstimateFunctionSizeInBytes(const MachineFunction &MF, const ARMBaseInstrInfo &TII)

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

MachineBasicBlock MachineBasicBlock::iterator MBBI

static Register getBPReg(const CSKYSubtarget &STI)

Definition CSKYFrameLowering.cpp:34

static Register getFPReg(const CSKYSubtarget &STI)

Definition CSKYFrameLowering.cpp:30

This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...

Register const TargetRegisterInfo * TRI

Promote Memory to Register

static constexpr MCPhysReg FPReg

static constexpr MCPhysReg SPReg

This file declares the machine register scavenger class.

static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

bool empty() const

empty - Check if the array is empty.

bool test(unsigned Idx) const

iterator_range< const_set_bits_iterator > set_bits() const

void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override

This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...

Definition CSKYFrameLowering.cpp:357

StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override

getFrameIndexReference - This method should return the base register and offset used to reference a f...

Definition CSKYFrameLowering.cpp:581

MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override

This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...

Definition CSKYFrameLowering.cpp:509

bool hasReservedCallFrame(const MachineFunction &MF) const override

hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...

Definition CSKYFrameLowering.cpp:459

bool hasFPImpl(const MachineFunction &MF) const override

Definition CSKYFrameLowering.cpp:36

void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override

Definition CSKYFrameLowering.cpp:223

bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override

restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...

Definition CSKYFrameLowering.cpp:486

void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override

emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.

Definition CSKYFrameLowering.cpp:78

bool hasBP(const MachineFunction &MF) const

Definition CSKYFrameLowering.cpp:45

bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override

spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...

Definition CSKYFrameLowering.cpp:463

void setCalleeSaveAreaSize(int v)

int getCalleeSaveAreaSize() const

void setLRIsSpilled(bool s)

unsigned getVarArgsSaveSize() const

const CSKYRegisterInfo * getRegisterInfo() const override

const CSKYInstrInfo * getInstrInfo() const override

bool hasFnAttribute(Attribute::AttrKind Kind) const

Return true if the function has the attribute.

static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_def_cfa_register modifies a rule for computing CFA.

static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})

.cfi_offset Previous value of Register is saved at offset Offset from CFA.

static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset, SMLoc Loc={})

.cfi_def_cfa_offset modifies a rule for computing CFA.

const MCInstrDesc & get(unsigned Opcode) const

Return the machine instruction descriptor that corresponds to the specified instruction opcode.

Wrapper class representing physical registers. Should be passed by value.

MachineInstrBundleIterator< MachineInstr > iterator

const std::vector< MachineConstantPoolEntry > & getConstants() const

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

void setMaxCallFrameSize(uint64_t S)

bool hasVarSizedObjects() const

This method may be called any time after instruction selection is complete to determine if the stack ...

uint64_t getStackSize() const

Return the number of bytes that must be allocated to hold all of the fixed size frame objects.

bool hasCalls() const

Return true if the current function has any function calls.

bool isFrameAddressTaken() const

This method may be called any time after instruction selection is complete to determine if there is a...

Align getMaxAlign() const

Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...

uint64_t getMaxCallFrameSize() const

Return the maximum size of a call frame that must be allocated for an outgoing function call.

LLVM_ABI int CreateSpillStackObject(uint64_t Size, Align Alignment)

Create a new statically sized stack object that represents a spill slot, returning a nonnegative iden...

LLVM_ABI uint64_t estimateStackSize(const MachineFunction &MF) const

Estimate and return the size of the stack frame.

void setStackSize(uint64_t Size)

Set the size of the stack.

unsigned addFrameInst(const MCCFIInstruction &Inst)

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Function & getFunction()

Return the LLVM function that this machine code represents.

Ty * getInfo()

getInfo - Keep track of various per-function pieces of information for backends that would like to do...

MachineConstantPool * getConstantPool()

getConstantPool - Return the constant pool object for the current function.

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const

const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const

const MachineInstrBuilder & addImm(int64_t Val) const

Add a new immediate operand.

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

LLVM_ABI Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")

createVirtualRegister - Create and return a new virtual register in the function with the specified r...

LLVM_ABI const MCPhysReg * getCalleeSavedRegs() const

Returns list of callee saved registers.

MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...

Wrapper class representing virtual and physical registers.

StackOffset holds a fixed and a scalable offset in bytes.

int64_t getFixed() const

Returns the fixed component of the stack.

bool hasFP(const MachineFunction &MF) const

hasFP - Return true if the specified function should have a dedicated frame pointer register.

virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const

This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...

Align getStackAlign() const

getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...

int alignSPAdjust(int SPAdj) const

alignSPAdjust - This method aligns the stack adjustment to the correct alignment.

TargetInstrInfo - Interface to description of machine instruction set.

LLVM_ABI bool DisableFramePointerElim(const MachineFunction &MF) const

DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

bool hasStackRealignment(const MachineFunction &MF) const

True if stack realignment is required and still possible.

virtual const TargetInstrInfo * getInstrInfo() const

virtual const TargetRegisterInfo * getRegisterInfo() const =0

Return the target's register information.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

@ Kill

The last use of a register.

This is an optimization pass for GlobalISel generic memory operations.

auto size(R &&Range, std::enable_if_t< std::is_base_of< std::random_access_iterator_tag, typename std::iterator_traits< decltype(Range.begin())>::iterator_category >::value, void > *=nullptr)

Get the size of a range.

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

auto reverse(ContainerTy &&C)

constexpr bool isUInt(uint64_t x)

Checks if an unsigned integer fits into the given bit width.

uint16_t MCPhysReg

An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...

uint64_t alignTo(uint64_t Size, Align A)

Returns a multiple of A needed to store Size bytes.

DWARFExpression::Operation Op

unsigned Log2(Align A)

Returns the log2 of the alignment.

constexpr bool isShiftedUInt(uint64_t x)

Checks if a unsigned integer is an N bit number shifted left by S.

This struct is a compact representation of a valid (non-zero power of two) alignment.

constexpr uint64_t value() const

This is a hole in the type system and should not be abused.