LLVM: lib/Target/RISCV/RISCVFrameLowering.cpp File Reference (original) (raw)

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Macros
#define DEBUG_TYPE "riscv-frame"
Functions
static Align getABIStackAlignment (RISCVABI::ABI ABI)
static bool needsDwarfCFI (const MachineFunction &MF)
Returns true if DWARF CFI instructions ("frame moves") should be emitted.
static void emitSCSPrologue (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL)
static void emitSCSEpilogue (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL)
static void emitSiFiveCLICStackSwap (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL)
static void createSiFivePreemptibleInterruptFrameEntries (MachineFunction &MF, RISCVMachineFunctionInfo &RVFI)
static void emitSiFiveCLICPreemptibleSaves (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL)
static void emitSiFiveCLICPreemptibleRestores (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL)
static int getLibCallID (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static const char * getSpillLibCallName (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static const char * getRestoreLibCallName (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static unsigned getNumPushPopRegs (const std::vector< CalleeSavedInfo > &CSI)
static SmallVector< CalleeSavedInfo, 8 > getUnmanagedCSI (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static SmallVector< CalleeSavedInfo, 8 > getRVVCalleeSavedInfo (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static SmallVector< CalleeSavedInfo, 8 > getPushOrLibCallsSavedInfo (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static SmallVector< CalleeSavedInfo, 8 > getQCISavedInfo (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static void appendScalableVectorExpression (const TargetRegisterInfo &TRI, SmallVectorImpl< char > &Expr, int FixedOffset, int ScalableOffset, llvm::raw_string_ostream &Comment)
static MCCFIInstruction createDefCFAExpression (const TargetRegisterInfo &TRI, Register Reg, uint64_t FixedOffset, uint64_t ScalableOffset)
static MCCFIInstruction createDefCFAOffset (const TargetRegisterInfo &TRI, Register Reg, uint64_t FixedOffset, uint64_t ScalableOffset)
static bool isPush (unsigned Opcode)
static bool isPop (unsigned Opcode)
static unsigned getPushOpcode (RISCVMachineFunctionInfo::PushPopKind Kind, bool UpdateFP)
static unsigned getPopOpcode (RISCVMachineFunctionInfo::PushPopKind Kind)
static MCRegister getRVVBaseRegister (const RISCVRegisterInfo &TRI, const Register &Reg)
static unsigned getScavSlotsNumForRVV (MachineFunction &MF)
static bool hasRVVFrameObject (const MachineFunction &MF)
static unsigned estimateFunctionSizeInBytes (const MachineFunction &MF, const RISCVInstrInfo &TII)
static unsigned getCalleeSavedRVVNumRegs (const Register &BaseReg)
static void emitStackProbeInline (MachineBasicBlock::iterator MBBI, DebugLoc DL, Register TargetReg, bool IsRVV)
Variables
static constexpr MCPhysReg FPReg = RISCV::X8
static constexpr MCPhysReg SPReg = RISCV::X2
static constexpr MCPhysReg RAReg = RISCV::X1
static const MCPhysReg FixedCSRFIMap []
static constexpr uint64_t QCIInterruptPushAmount = 96
static const std::pair< MCPhysReg, int8_t > FixedCSRFIQCIInterruptMap []

◆ DEBUG_TYPE

#define DEBUG_TYPE "riscv-frame"

◆ appendScalableVectorExpression()

◆ createDefCFAExpression()

Definition at line 699 of file RISCVFrameLowering.cpp.

References llvm::SmallString< InternalLen >::append(), appendScalableVectorExpression(), assert(), llvm::MCCFIInstruction::createEscape(), llvm::encodeULEB128(), llvm::printReg(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), Reg, llvm::SmallVectorTemplateCommon< T, typename >::size(), SPReg, llvm::SmallString< InternalLen >::str(), and TRI.

◆ createDefCFAOffset()

Definition at line 729 of file RISCVFrameLowering.cpp.

References llvm::SmallString< InternalLen >::append(), appendScalableVectorExpression(), assert(), llvm::MCCFIInstruction::createEscape(), llvm::encodeULEB128(), llvm::printReg(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), Reg, llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::SmallString< InternalLen >::str(), and TRI.

◆ createSiFivePreemptibleInterruptFrameEntries()

◆ emitSCSEpilogue()

Definition at line 181 of file RISCVFrameLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::CFIInstBuilder::buildRestore(), llvm::RegState::Define, DL, llvm::MachineInstr::FrameDestroy, llvm::MachineFrameInfo::getCalleeSavedInfo(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::CalleeSavedInfo::getReg(), llvm::RISCVABI::getSCSPReg(), llvm::MachineFunction::getSubtarget(), llvm::Function::hasFnAttribute(), MBB, MI, needsDwarfCFI(), llvm::none_of(), RAReg, llvm::MachineInstrBuilder::setMIFlag(), and TII.

Referenced by llvm::RISCVFrameLowering::emitEpilogue().

◆ emitSCSPrologue()

Definition at line 105 of file RISCVFrameLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::CFIInstBuilder::buildEscape(), llvm::BuildMI(), llvm::RegState::Define, DL, llvm::MachineInstr::FrameSetup, llvm::MachineFrameInfo::getCalleeSavedInfo(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::CalleeSavedInfo::getReg(), llvm::RISCVABI::getSCSPReg(), llvm::MachineFunction::getSubtarget(), llvm::Function::hasFnAttribute(), MBB, MI, needsDwarfCFI(), llvm::none_of(), llvm::Offset, RAReg, llvm::MachineInstrBuilder::setMIFlag(), TII, and TRI.

Referenced by llvm::RISCVFrameLowering::emitPrologue().

◆ emitSiFiveCLICPreemptibleRestores()

Definition at line 323 of file RISCVFrameLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::RegState::Define, DL, llvm::MachineInstr::FrameSetup, llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), llvm::RegState::Kill, MBB, MBBI, llvm::MachineInstrBuilder::setMIFlag(), and TII.

Referenced by llvm::RISCVFrameLowering::emitEpilogue().

◆ emitSiFiveCLICPreemptibleSaves()

Definition at line 271 of file RISCVFrameLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::RegState::Define, DL, llvm::MachineInstr::FrameSetup, llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), MBB, MBBI, llvm::MachineInstrBuilder::setMIFlag(), and TII.

Referenced by llvm::RISCVFrameLowering::emitPrologue().

◆ emitSiFiveCLICStackSwap()

Definition at line 228 of file RISCVFrameLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::RegState::Define, DL, llvm::MachineInstr::FrameSetup, llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), llvm::RegState::Kill, MBB, MBBI, llvm::MachineInstrBuilder::setMIFlag(), SPReg, and TII.

Referenced by llvm::RISCVFrameLowering::emitEpilogue(), and llvm::RISCVFrameLowering::emitPrologue().

◆ emitStackProbeInline()

Definition at line 2403 of file RISCVFrameLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::addSuccessor(), assert(), llvm::BuildMI(), llvm::MachineFunction::CreateMachineBasicBlock(), DL, llvm::MachineBasicBlock::end(), llvm::MachineInstr::FrameSetup, llvm::fullyRecomputeLiveIns(), llvm::RISCVTargetLowering::getStackProbeSize(), llvm::MachineFunction::getSubtarget(), llvm::MachineFunction::insert(), MBB, MBBI, llvm::MachineInstrBuilder::setMIFlags(), llvm::MachineBasicBlock::splice(), SPReg, TII, and llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs().

◆ estimateFunctionSizeInBytes()

◆ getABIStackAlignment()

◆ getCalleeSavedRVVNumRegs()

◆ getLibCallID()

◆ getNumPushPopRegs()

◆ getPopOpcode()

◆ getPushOpcode()

◆ getPushOrLibCallsSavedInfo()

◆ getQCISavedInfo()

◆ getRestoreLibCallName()

◆ getRVVBaseRegister()

◆ getRVVCalleeSavedInfo()

◆ getScavSlotsNumForRVV()

◆ getSpillLibCallName()

◆ getUnmanagedCSI()

◆ hasRVVFrameObject()

◆ isPop()

◆ isPush()

◆ needsDwarfCFI()

◆ FixedCSRFIMap

Initial value:

= {

RAReg, FPReg, RISCV::X9,

RISCV::X18, RISCV::X19, RISCV::X20,

RISCV::X21, RISCV::X22, RISCV::X23,

RISCV::X24, RISCV::X25, RISCV::X26,

RISCV::X27}

static constexpr MCPhysReg FPReg

static constexpr MCPhysReg RAReg

Definition at line 63 of file RISCVFrameLowering.cpp.

Referenced by llvm::RISCVFrameLowering::assignCalleeSavedSpillSlots(), getNumPushPopRegs(), getPushOrLibCallsSavedInfo(), llvm::RISCVFrameLowering::restoreCalleeSavedRegisters(), and llvm::RISCVFrameLowering::spillCalleeSavedRegisters().

◆ FixedCSRFIQCIInterruptMap

Initial value:

= {

{ FPReg, -2},

{ RAReg, -4},

{ RISCV::X5, -6},

{ RISCV::X6, -7},

{ RISCV::X7, -8},

{ RISCV::X10, -9},

{ RISCV::X11, -10},

{ RISCV::X12, -11},

{ RISCV::X13, -12},

{ RISCV::X14, -13},

{ RISCV::X15, -14},

{ RISCV::X16, -15},

{ RISCV::X17, -16},

{ RISCV::X28, -17},

{ RISCV::X29, -18},

{ RISCV::X30, -19},

{ RISCV::X31, -20},

}

Definition at line 74 of file RISCVFrameLowering.cpp.

Referenced by llvm::RISCVFrameLowering::assignCalleeSavedSpillSlots(), getPushOrLibCallsSavedInfo(), getQCISavedInfo(), and llvm::RISCVFrameLowering::spillCalleeSavedRegisters().

◆ FPReg

Definition at line 51 of file RISCVFrameLowering.cpp.

Referenced by llvm::M68kFrameLowering::assignCalleeSavedSpillSlots(), llvm::X86FrameLowering::assignCalleeSavedSpillSlots(), llvm::RISCVFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::CSKYFrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitEpilogue(), llvm::RISCVFrameLowering::emitEpilogue(), llvm::CSKYFrameLowering::emitPrologue(), llvm::LoongArchFrameLowering::emitPrologue(), llvm::PPCFrameLowering::emitPrologue(), llvm::RISCVFrameLowering::emitPrologue(), llvm::RISCVFrameLowering::getFrameIndexReference(), getLibCallID(), llvm::PPCFrameLowering::inlineStackProbe(), llvm::PPCFrameLowering::processFunctionBeforeFrameFinalized(), llvm::PPCFrameLowering::replaceFPWithRealFP(), llvm::Thumb1FrameLowering::restoreCalleeSavedRegisters(), and llvm::Thumb1FrameLowering::spillCalleeSavedRegisters().

◆ QCIInterruptPushAmount

◆ RAReg

◆ SPReg

Definition at line 54 of file RISCVFrameLowering.cpp.

Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::RISCVFrameLowering::allocateStack(), llvm::AMDGPURegisterBankInfo::applyMappingDynStackAlloc(), createDefCFAExpression(), llvm::CSKYFrameLowering::eliminateCallFramePseudoInstr(), llvm::LoongArchFrameLowering::eliminateCallFramePseudoInstr(), llvm::RISCVFrameLowering::eliminateCallFramePseudoInstr(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::RISCVTargetLowering::emitDynamicProbedAlloc(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::CSKYFrameLowering::emitEpilogue(), llvm::LoongArchFrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitEpilogue(), llvm::RISCVFrameLowering::emitEpilogue(), llvm::SystemZXPLINKFrameLowering::emitEpilogue(), llvm::WebAssemblyFrameLowering::emitEpilogue(), llvm::PPCTargetLowering::emitProbedAlloca(), llvm::CSKYFrameLowering::emitPrologue(), llvm::LoongArchFrameLowering::emitPrologue(), llvm::PPCFrameLowering::emitPrologue(), llvm::RISCVFrameLowering::emitPrologue(), llvm::WebAssemblyFrameLowering::emitPrologue(), emitSiFiveCLICStackSwap(), emitStackProbeInline(), llvm::LegalizerHelper::getDynStackAllocTargetPtr(), llvm::RISCVFrameLowering::getFrameIndexReference(), M68kOutgoingArgHandler::getStackAddress(), llvm::PPCFrameLowering::inlineStackProbe(), llvm::PPCInstrInfo::isTOCSaveMI(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), and llvm::LegalizerHelper::lowerDynStackAlloc().