CombinerHelperVectorOps.cpp Source File (original) (raw)

26#include

28#define DEBUG_TYPE "gi-combiner"

30using namespace llvm;

40 LLT DstTy = MRI.getType(Dst);

72 std::optional MaybeIndex =

74 std::optional IndexC = std::nullopt;

76 if (MaybeIndex)

77 IndexC = MaybeIndex->Value;

85 return true;

86 }

88 return false;

89}

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114 std::optional MaybeIndex =

116 std::optional IndexC = std::nullopt;

117

118 if (!MaybeIndex)

119 return false;

120 else

121 IndexC = MaybeIndex->Value;

122

124

127 if (!Insert)

128 return false;

129

131

132 std::optional MaybeInsertIndex =

134

135 if (MaybeInsertIndex && MaybeInsertIndex->Value != *IndexC) {

136

137

138

140 B.buildExtractVectorElement(Dst, Insert->getVectorReg(), Index);

141 };

142 return true;

143 }

144

145 return false;

146}

147

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170 if ( MRI .hasOneNonDBGUse(Build->getReg(0)) ||

172 return false;

173

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182 B.buildCopy(Dst, Build->getSourceReg(Index.getZExtValue()));

183 };

184

185 return true;

186}

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217 if (!Build)

218 return false;

219

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224 if ( MRI .hasOneNonDBGUse(Build->getReg(0)) ||

226 return false;

227

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232 std::optional MaybeIndex =

234 if (!MaybeIndex)

235 return false;

236

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241 LLT DstTy = MRI.getType(Dst);

243

244

246 return false;

247

249 B.buildTrunc(Dst, Build->getSourceReg(MaybeIndex->Value.getZExtValue()));

250 };

251

252 return true;

253}

254

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290 unsigned Offset = Index.getZExtValue();

291 int SrcIdx = Mask[Offset];

292

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296 assert(Src1Type.isVector() && "expected to extract from a vector");

298

299

301 LLT DstTy = MRI.getType(Dst);

302

303 if (SrcIdx < 0 &&

306 return true;

307 }

308

309

310 if (SrcIdx < 0)

311 return false;

312

314

315

316 if (SrcIdx < (int)LHSWidth) {

318

319 } else {

321 SrcIdx -= LHSWidth;

322 }

323

325 LLT NewVectorTy = MRI.getType(NewVector);

326

327

329 {TargetOpcode::G_EXTRACT_VECTOR_ELT, {DstTy, NewVectorTy, IdxTy}}) ||

331 return false;

332

333

335 auto Idx = B.buildConstant(IdxTy, SrcIdx);

336 B.buildExtractVectorElement(Dst, NewVector, Idx);

337 };

338

339 return true;

340}

341

345

346 Register Dst = Insert->getReg(0);

347 LLT DstTy = MRI.getType(Dst);

348 Register Index = Insert->getIndexReg();

349

351 return false;

352

353 std::optional MaybeIndex =

355

356 if (MaybeIndex && MaybeIndex->Value.uge(DstTy.getNumElements()) &&

359 return true;

360 }

361

362 return false;

363}

364

370

372

373 if ( MRI .hasOneNonDBGUse(LHSVScale->getReg(0)) ||

374 MRI .hasOneNonDBGUse(RHSVScale->getReg(0)))

375 return false;

376

378 B.buildVScale(Dst, LHSVScale->getSrc() + RHSVScale->getSrc());

379 };

380

381 return true;

382}

383

388

390 if (!MaybeRHS)

391 return false;

392

394

395 if ( MRI .hasOneNonDBGUse(LHSVScale->getReg(0)))

396 return false;

397

399 B.buildVScale(Dst, LHSVScale->getSrc() * *MaybeRHS);

400 };

401

402 return true;

403}

404

409

411 LLT DstTy = MRI.getType(Dst);

412

413 if ( MRI .hasOneNonDBGUse(RHSVScale->getReg(0)) ||

415 return false;

416

418 auto VScale = B.buildVScale(DstTy, -RHSVScale->getSrc());

419 B.buildAdd(Dst, Sub->getLHSReg(), VScale, Sub->getFlags());

420 };

421

422 return true;

423}

424

429

431 if (!MaybeRHS)

432 return false;

433

435 LLT DstTy = MRI.getType(Dst);

436

437 if ( MRI .hasOneNonDBGUse(LHSVScale->getReg(0)) ||

439 return false;

440

442 B.buildVScale(Dst, LHSVScale->getSrc().shl(*MaybeRHS));

443 };

444

445 return true;

446}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

This contains common combine transformations that may be used in a combine pass,or by the target else...

Declares convenience wrapper classes for interpreting MachineInstr instances as specific generic oper...

Interface for Targets to specify which operations they can successfully select and how the others sho...

Implement a low-level type suitable for MachineInstr level instruction selection.

Contains matchers for matching SSA Machine Instructions.

This file declares the MachineIRBuilder class.

This file describes how to lower LLVM code to machine code.

Class for arbitrary precision integers.

APInt shl(unsigned shiftAmt) const

Left-shift function.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

bool matchExtractVectorElementWithBuildVectorTrunc(const MachineOperand &MO, BuildFnTy &MatchInfo) const

Combine extract vector element with a build vector trunc on the vector register.

Definition CombinerHelperVectorOps.cpp:188

const TargetLowering & getTargetLowering() const

bool matchExtractVectorElementWithDifferentIndices(const MachineOperand &MO, BuildFnTy &MatchInfo) const

Combine extract vector element with a insert vector element on the vector register and different indi...

Definition CombinerHelperVectorOps.cpp:91

bool matchInsertVectorElementOOB(MachineInstr &MI, BuildFnTy &MatchInfo) const

Combine insert vector element OOB.

Definition CombinerHelperVectorOps.cpp:342

bool matchExtractVectorElement(MachineInstr &MI, BuildFnTy &MatchInfo) const

Combine extract vector element.

Definition CombinerHelperVectorOps.cpp:33

bool matchMulOfVScale(const MachineOperand &MO, BuildFnTy &MatchInfo) const

Definition CombinerHelperVectorOps.cpp:384

bool matchAddOfVScale(const MachineOperand &MO, BuildFnTy &MatchInfo) const

Definition CombinerHelperVectorOps.cpp:365

bool matchShlOfVScale(const MachineOperand &MO, BuildFnTy &MatchInfo) const

Definition CombinerHelperVectorOps.cpp:425

bool matchExtractVectorElementWithShuffleVector(const MachineInstr &MI, const MachineInstr &MI2, BuildFnTy &MatchInfo) const

Combine extract vector element with a shuffle vector on the vector register.

Definition CombinerHelperVectorOps.cpp:255

bool isConstantLegalOrBeforeLegalizer(const LLT Ty) const

MachineRegisterInfo & MRI

bool isLegalOrBeforeLegalizer(const LegalityQuery &Query) const

bool matchSubOfVScale(const MachineOperand &MO, BuildFnTy &MatchInfo) const

Definition CombinerHelperVectorOps.cpp:405

bool matchExtractVectorElementWithBuildVector(const MachineInstr &MI, const MachineInstr &MI2, BuildFnTy &MatchInfo) const

Combine extract vector element with a build vector on the vector register.

Definition CombinerHelperVectorOps.cpp:148

Represents an integer addition.

Represents a G_BUILD_VECTOR_TRUNC.

Represents a G_BUILD_VECTOR.

Represents an insert vector element.

Returns the I'th source register.

Represents an integer multiplication.

Represents a G_SHUFFLE_VECTOR.

ArrayRef< int > getMask() const

Represents an integer subtraction.

Access the Idx'th operand as a register and return it.

constexpr uint16_t getNumElements() const

Returns the number of elements in a vector LLT.

constexpr bool isVector() const

constexpr bool isFixedVector() const

Returns true if the LLT is a fixed vector.

Helper class to build MachineInstr.

Representation of each machine instruction.

MachineOperand class - Representation of each machine instruction operand.

getReg - Returns the register number.

Wrapper class representing virtual and physical registers.

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI MachineInstr * getOpcodeDef(unsigned Opcode, Register Reg, const MachineRegisterInfo &MRI)

See if Reg is defined by an single def instruction that is Opcode.

LLVM_ABI std::optional< APInt > getIConstantVRegVal(Register VReg, const MachineRegisterInfo &MRI)

If VReg is defined by a G_CONSTANT, return the corresponding value.

std::function< void(MachineIRBuilder &)> BuildFnTy

LLVM_ABI MVT getMVTForLLT(LLT Ty)

Get a rough equivalent of an MVT for a given LLT.

LLVM_ABI MachineInstr * getDefIgnoringCopies(Register Reg, const MachineRegisterInfo &MRI)

Find the def instruction for Reg, folding away any trivial copies.

LLVM_ABI const APInt & getIConstantFromReg(Register VReg, const MachineRegisterInfo &MRI)

VReg is defined by a G_CONSTANT, return the corresponding value.

@ Mul

Product of integers.

@ Sub

Subtraction of integers.

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

LLVM_ABI std::optional< ValueAndVReg > getIConstantVRegValWithLookThrough(Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs=true)

If VReg is defined by a statically evaluable chain of instructions rooted on a G_CONSTANT returns its...