LLVM: llvm::GMergeLikeInstr Class Reference (original) (raw)
Public Member Functions
Returns the number of source registers.
getSourceReg (unsigned I) const
Returns the I'th source register.
Public Member Functions inherited from llvm::GenericMachineInstr
GenericMachineInstr ()=delete
Access the Idx'th operand as a register and return it.
hasPoisonGeneratingFlags () const
void
Public Member Functions inherited from llvm::MachineInstr
MachineInstr (const MachineInstr &)=delete
operator= (const MachineInstr &)=delete
~MachineInstr ()=delete
getParent ()
LLVM_ABI void
moveBefore (MachineInstr *MovePos)
Move the instruction before MovePos.
LLVM_ABI const MachineFunction *
Return the function that contains the basic block that this instruction belongs to.
getMF ()
Return the asm printer flags bitvector.
void
Clear the AsmPrinter bitvector.
getAsmPrinterFlag (CommentFlag Flag) const
Return whether an AsmPrinter flag is set.
void
setAsmPrinterFlag (uint8_t Flag)
Set a flag for the AsmPrinter.
void
clearAsmPrinterFlag (CommentFlag Flag)
Clear specific AsmPrinter flags.
Return the MI flags bitvector.
Return whether an MI flag is set.
void
Set a MI flag.
void
void
clearFlag - Clear a MI flag.
void
clearFlags (unsigned flags)
Return true if MI is in a bundle (but not the first MI in a bundle).
Return true if this instruction part of a bundle.
Return true if this instruction is part of a bundle, and it is not the first instruction in the bundle.
Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle.
LLVM_ABI void
Bundle this instruction with its predecessor.
LLVM_ABI void
Bundle this instruction with its successor.
LLVM_ABI void
Break bundle above this instruction.
LLVM_ABI void
Break bundle below this instruction.
getDebugLoc () const
Returns the debug location id of this MachineInstr.
Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will be an invalid register if this value is not indirect, and an immediate with value 0 otherwise.
LLVM_ABI const MachineOperand &
Return the operand for the debug variable referenced by this DBG_VALUE instruction.
LLVM_ABI const DILocalVariable *
Return the debug variable referenced by this DBG_VALUE instruction.
LLVM_ABI const MachineOperand &
Return the operand for the complex address expression referenced by this DBG_VALUE instruction.
Return the complex address expression referenced by this DBG_VALUE instruction.
Return the debug label referenced by this DBG_LABEL instruction.
Fetch the instruction number of this MachineInstr.
getDebugInstrNum (MachineFunction &MF)
Fetch instruction number of this MachineInstr – but before it's inserted into MF.
Examine the instruction number of this MachineInstr.
void
setDebugInstrNum (unsigned Num)
Set instruction number of this MachineInstr.
void
Drop any variable location debugging information associated with this instruction.
For inline asm, get the !srcloc metadata node if we have it, and decode the loc cookie from it.
LLVM_ABI void
emitInlineAsmError (const Twine &ErrMsg) const
Emit an error referring to the source location of this instruction.
LLVM_ABI void
emitGenericError (const Twine &ErrMsg) const
Returns the target instruction descriptor of this MachineInstr.
Returns the opcode of this MachineInstr.
Retuns the total number of operands.
Returns the total number of operands which are debug locations.
getOperand (unsigned i) const
getOperand (unsigned i)
getDebugOperand (unsigned Index)
getDebugOperand (unsigned Index) const
hasDebugOperandForReg (Register Reg) const
Returns whether this debug value has at least one debug operand with the register Reg.
LLVM_ABI iterator_range< filter_iterator< const MachineOperand *, std::function< bool(const MachineOperand &Op)> > >
getDebugOperandsForReg (Register Reg) const
Returns a range of all of the operands that correspond to a debug use of Reg.
LLVM_ABI iterator_range< filter_iterator< MachineOperand *, std::function< bool(MachineOperand &Op)> > >
getDebugOperandsForReg (Register Reg)
isDebugOperand (const MachineOperand *Op) const
getDebugOperandIndex (const MachineOperand *Op) const
getNumDefs () const
Returns the total number of definitions.
Returns true if the instruction has implicit definition.
getNumImplicitOperands () const
Returns the implicit operands number.
isOperandSubregIdx (unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
getNumExplicitOperands () const
Returns the number of non-implicit operands.
Returns the number of non-implicit definitions.
operands_end ()
operands ()
Returns all operands that are used to determine the variable location for this DBG_VALUE instruction.
Returns all operands that are used to determine the variable location for this DBG_VALUE instruction.
defs ()
Returns all explicit operands that are register definitions.
Returns all explicit operands that are register definitions.
uses ()
Returns all operands which may be register uses.
Returns all operands which may be register uses.
all_defs ()
Returns an iterator range over all operands that are (explicit or implicit) register defs.
Returns an iterator range over all operands that are (explicit or implicit) register defs.
all_uses ()
Returns an iterator range over all operands that are (explicit or implicit) register uses.
Returns an iterator range over all operands that are (explicit or implicit) register uses.
getOperandNo (const_mop_iterator I) const
Returns the number of the operand iterator I points to.
ArrayRef< MachineMemOperand * >
memoperands () const
Access to memory operands of the instruction.
Access to memory operands of the instruction.
Access to memory operands of the instruction.
Return true if we don't have any memory operands which described the memory access done by this instruction.
Return true if this instruction has exactly one MachineMemOperand.
Return the number of memory operands.
MCSymbol *
Helper to extract a pre-instruction symbol if one has been added.
MCSymbol *
Helper to extract a post-instruction symbol if one has been added.
MDNode *
Helper to extract a heap alloc marker if one has been added.
MDNode *
Helper to extract PCSections metadata target sections.
MDNode *
Helper to extract mmra.op metadata.
Value *
getDeactivationSymbol () const
getCFIType () const
Helper to extract a CFI type hash if one has been added.
hasProperty (unsigned MCFlag, QueryType Type=AnyInBundle) const
Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has the specified property.
isPreISelOpcode (QueryType Type=IgnoreBundle) const
Return true if this is an instruction that should go through the usual legalization steps.
isVariadic (QueryType Type=IgnoreBundle) const
Return true if this instruction can have a variable number of operands.
hasOptionalDef (QueryType Type=IgnoreBundle) const
Set if this instruction has an optional definition, e.g.
isPseudo (QueryType Type=IgnoreBundle) const
Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction.
isMetaInstruction (QueryType Type=IgnoreBundle) const
Return true if this instruction doesn't produce any output in the form of executable instructions.
isReturn (QueryType Type=AnyInBundle) const
isEHScopeReturn (QueryType Type=AnyInBundle) const
Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction.
isCall (QueryType Type=AnyInBundle) const
isCandidateForAdditionalCallInfo (QueryType Type=IgnoreBundle) const
Return true if this is a call instruction that may have an additional information associated with it.
shouldUpdateAdditionalCallInfo () const
Return true if copying, moving, or erasing this instruction requires updating additional call info (see copyCallInfo, moveCallInfo, eraseCallInfo).
isBarrier (QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediately following it.
isTerminator (QueryType Type=AnyInBundle) const
Returns true if this instruction part of the terminator for a basic block.
isBranch (QueryType Type=AnyInBundle) const
Returns true if this is a conditional, unconditional, or indirect branch.
isIndirectBranch (QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
isConditionalBranch (QueryType Type=AnyInBundle) const
Return true if this is a branch which may fall through to the next instruction or may transfer control flow to some other block.
isUnconditionalBranch (QueryType Type=AnyInBundle) const
Return true if this is a branch which always transfers control flow to some other block.
isPredicable (QueryType Type=AllInBundle) const
Return true if this instruction has a predicate operand that controls execution.
isCompare (QueryType Type=IgnoreBundle) const
Return true if this instruction is a comparison.
isMoveImmediate (QueryType Type=IgnoreBundle) const
Return true if this instruction is a move immediate (including conditional moves) instruction.
isMoveReg (QueryType Type=IgnoreBundle) const
Return true if this instruction is a register move.
isBitcast (QueryType Type=IgnoreBundle) const
Return true if this instruction is a bitcast instruction.
isSelect (QueryType Type=IgnoreBundle) const
Return true if this instruction is a select instruction.
isNotDuplicable (QueryType Type=AnyInBundle) const
Return true if this instruction cannot be safely duplicated.
isConvergent (QueryType Type=AnyInBundle) const
Return true if this instruction is convergent.
hasDelaySlot (QueryType Type=AnyInBundle) const
Returns true if the specified instruction has a delay slot which must be filled by the code generator.
canFoldAsLoad (QueryType Type=IgnoreBundle) const
Return true for instructions that can be folded as memory operands in other instructions.
isRegSequenceLike (QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions.
isExtractSubregLike (QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions.
isInsertSubregLike (QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions.
mayLoad (QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read memory.
mayStore (QueryType Type=AnyInBundle) const
Return true if this instruction could possibly modify memory.
mayLoadOrStore (QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read or modify memory.
Return true if this instruction could possibly raise a floating-point exception.
isCommutable (QueryType Type=IgnoreBundle) const
Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged.
isConvertibleTo3Addr (QueryType Type=IgnoreBundle) const
Return true if this is a 2-address instruction which can be changed into a 3-address instruction if needed.
usesCustomInsertionHook (QueryType Type=IgnoreBundle) const
Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block.
hasPostISelHook (QueryType Type=IgnoreBundle) const
Return true if this instruction requires adjustment after instruction selection by calling a target hook.
isRematerializable (QueryType Type=AllInBundle) const
Returns true if this instruction is a candidate for remat.
isAsCheapAsAMove (QueryType Type=AllInBundle) const
Returns true if this instruction has the same cost (or less) than a move instruction.
hasExtraSrcRegAllocReq (QueryType Type=AnyInBundle) const
Returns true if this instruction source operands have special register allocation requirements that are not captured by the operand register classes.
hasExtraDefRegAllocReq (QueryType Type=AnyInBundle) const
Returns true if this instruction def operands have special register allocation requirements that are not captured by the operand register classes.
isIdenticalTo (const MachineInstr &Other, MICheckType Check=CheckDefs) const
Return true if this instruction is identical to Other.
isEquivalentDbgInstr (const MachineInstr &Other) const
Returns true if this instruction is a debug instruction that represents an identical debug value to Other.
Unlink 'this' from the containing basic block, and return it without deleting it.
Unlink this instruction from its basic block and return it without deleting it.
LLVM_ABI void
Unlink 'this' from the containing basic block and delete it.
LLVM_ABI void
Unlink 'this' from its basic block and delete it.
Returns true if the MachineInstr represents a label.
isPosition () const
isDebugRef () const
isDebugPHI () const
A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate.
A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation.
Return true if the instruction is a debug value which describes a part of a variable as unavailable.
isInlineAsm () const
mayFoldInlineAsmRegOp (unsigned OpId) const
Returns true if the register operand can be folded with a load or store into a frame index.
isStackAligningInlineAsm () const
LLVM_ABI InlineAsm::AsmDialect
isFullCopy () const
isCopyLike () const
Return true if the instruction behaves like a copy.
Return true is the instruction is an identity copy.
isTransient () const
Return true if this is a transient instruction that is either very likely to be eliminated during register allocation (such as copy-like instructions), or if this instruction doesn't have an execution-time cost.
Return the number of instructions inside the MI bundle, excluding the bundle header.
readsRegister (Register Reg, const TargetRegisterInfo *TRI) const
Return true if the MachineInstr reads the specified register.
readsVirtualRegister (Register Reg) const
Return true if the MachineInstr reads the specified virtual register.
LLVM_ABI std::pair< bool, bool >
readsWritesVirtualRegister (Register Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const
Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.
killsRegister (Register Reg, const TargetRegisterInfo *TRI) const
Return true if the MachineInstr kills the specified register.
definesRegister (Register Reg, const TargetRegisterInfo *TRI) const
Return true if the MachineInstr fully defines the specified register.
modifiesRegister (Register Reg, const TargetRegisterInfo *TRI) const
Return true if the MachineInstr modifies (fully define or partially define) the specified register.
registerDefIsDead (Register Reg, const TargetRegisterInfo *TRI) const
Returns true if the register is dead in this machine instruction.
hasRegisterImplicitUseOperand (Register Reg) const
Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not considering sub/super-registers).
LLVM_ABI int
findRegisterUseOperandIdx (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const
Returns the operand index that is a use of the specific register or -1 if it is not found.
findRegisterUseOperand (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false)
Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an index.
findRegisterUseOperand (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const
LLVM_ABI int
findRegisterDefOperandIdx (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) const
Returns the operand index that is a def of the specified register or -1 if it is not found.
findRegisterDefOperand (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false)
Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an index.
findRegisterDefOperand (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) const
LLVM_ABI int
findFirstPredOperandIdx () const
Find the index of the first operand in the operand list that is used to represent the predicate.
LLVM_ABI int
findInlineAsmFlagIdx (unsigned OpIdx, unsigned *GroupNo=nullptr) const
Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instruction.
LLVM_ABI const TargetRegisterClass *
getRegClassConstraint (unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Compute the static register class constraint for operand OpIdx.
LLVM_ABI const TargetRegisterClass *
getRegClassConstraintEffectForVReg (Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const
Applies the constraints (def/use) implied by this MI on Reg to the given CurRC.
LLVM_ABI const TargetRegisterClass *
getRegClassConstraintEffect (unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC.
LLVM_ABI void
tieOperands (unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.
findTiedOperandIdx (unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
isRegTiedToUseOperand (unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const
Given the index of a register def operand, check if the register def is tied to a source operand, due to either two-address elimination or inline assembly constraints.
isRegTiedToDefOperand (unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const
Return true if the use operand of the specified index is tied to a def operand.
LLVM_ABI void
Clears kill flags on all operands.
LLVM_ABI void
substituteRegister (Register FromReg, Register ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo)
Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessary.
addRegisterKilled (Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI kills a register.
LLVM_ABI void
clearRegisterKills (Register Reg, const TargetRegisterInfo *RegInfo)
Clear all kill flags affecting Reg.
addRegisterDead (Register Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI defined a register without a use.
LLVM_ABI void
clearRegisterDeads (Register Reg)
Clear all dead flags on operands defining register Reg.
LLVM_ABI void
setRegisterDefReadUndef (Register Reg, bool IsUndef=true)
Mark all subregister defs of register Reg with the undef flag.
LLVM_ABI void
addRegisterDefined (Register Reg, const TargetRegisterInfo *RegInfo=nullptr)
We have determined MI defines a register.
LLVM_ABI void
setPhysRegsDeadExcept (ArrayRef< Register > UsedRegs, const TargetRegisterInfo &TRI)
Mark every physreg used by this instruction as dead except those in the UsedRegs list.
isSafeToMove (bool &SawStore) const
Return true if it is safe to move this instruction.
Return true if this instruction would be trivially dead if all of its defined registers were dead.
isDead (const MachineRegisterInfo &MRI, LiveRegUnits *LivePhysRegs=nullptr) const
Check whether an MI is dead.
mayAlias (BatchAAResults *AA, const MachineInstr &Other, bool UseTBAA) const
Returns true if this instruction's memory access aliases the memory access of Other.
mayAlias (AAResults *AA, const MachineInstr &Other, bool UseTBAA) const
Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available.
isDereferenceableInvariantLoad () const
Return true if this load instruction never traps and points to a memory location whose value doesn't change during the execution of this function.
If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return Register().
hasUnmodeledSideEffects () const
Return true if this instruction has side effects that are not modeled by mayLoad / mayStore, etc.
Returns true if it is illegal to fold a load across this instruction.
Return true if all the defs of this instruction are dead.
allImplicitDefsAreDead () const
Return true if all the implicit defs of this instruction are dead.
LLVM_ABI std::optional< LocationSize >
getSpillSize (const TargetInstrInfo *TII) const
Return a valid size if the instruction is a spill instruction.
LLVM_ABI std::optional< LocationSize >
getFoldedSpillSize (const TargetInstrInfo *TII) const
Return a valid size if the instruction is a folded spill instruction.
LLVM_ABI std::optional< LocationSize >
getRestoreSize (const TargetInstrInfo *TII) const
Return a valid size if the instruction is a restore instruction.
LLVM_ABI std::optional< LocationSize >
getFoldedRestoreSize (const TargetInstrInfo *TII) const
Return a valid size if the instruction is a folded restore instruction.
LLVM_ABI void
copyImplicitOps (MachineFunction &MF, const MachineInstr &MI)
Copy implicit register operands from specified instruction to this instruction.
LLVM_ABI void
addOperand (MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
LLVM_ABI void
addOperand (const MachineOperand &Op)
Add an operand without providing an MF reference.
LLVM_ABI void
insert (mop_iterator InsertBefore, ArrayRef< MachineOperand > Ops)
Inserts Ops BEFORE It. Can untie/retie tied operands.
LLVM_ABI void
setDesc (const MCInstrDesc &TID)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one.
void
Replace current source information with new such.
LLVM_ABI void
removeOperand (unsigned OpNo)
Erase an operand from an instruction, leaving it with one fewer operand than it started with.
LLVM_ABI void
dropMemRefs (MachineFunction &MF)
Clear this MachineInstr's memory reference descriptor list.
LLVM_ABI void
setMemRefs (MachineFunction &MF, ArrayRef< MachineMemOperand * > MemRefs)
Assign this MachineInstr's memory reference descriptor list.
LLVM_ABI void
addMemOperand (MachineFunction &MF, MachineMemOperand *MO)
Add a MachineMemOperand to the machine instruction.
LLVM_ABI void
cloneMemRefs (MachineFunction &MF, const MachineInstr &MI)
Clone another MachineInstr's memory reference descriptor list and replace ours with it.
LLVM_ABI void
cloneMergedMemRefs (MachineFunction &MF, ArrayRef< const MachineInstr * > MIs)
Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it.
LLVM_ABI void
setPreInstrSymbol (MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just prior to the instruction itself.
LLVM_ABI void
setPostInstrSymbol (MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just after the instruction itself.
LLVM_ABI void
cloneInstrSymbols (MachineFunction &MF, const MachineInstr &MI)
Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it.
LLVM_ABI void
setHeapAllocMarker (MachineFunction &MF, MDNode *MD)
Set a marker on instructions that denotes where we should create and emit heap alloc site labels.
LLVM_ABI void
setPCSections (MachineFunction &MF, MDNode *MD)
LLVM_ABI void
setMMRAMetadata (MachineFunction &MF, MDNode *MMRAs)
LLVM_ABI void
setCFIType (MachineFunction &MF, uint32_t Type)
Set the CFI type for the instruction.
LLVM_ABI void
setDeactivationSymbol (MachineFunction &MF, Value *DS)
mergeFlagsWith (const MachineInstr &Other) const
Return the MIFlags which represent both MachineInstrs.
LLVM_ABI void
copyIRFlags (const Instruction &I)
Copy all flags to MachineInst MIFlags.
void
untieRegOperand (unsigned OpIdx)
Break any tie involving OpIdx.
LLVM_ABI void
addImplicitDefUseOperands (MachineFunction &MF)
Add all implicit def and use operands to this instruction.
LLVM_ABI void
collectDebugValues (SmallVectorImpl< MachineInstr * > &DbgValues)
Scan instructions immediately following MI and collect any matching DBG_VALUEs.
LLVM_ABI void
changeDebugValuesDefReg (Register Reg)
Find all DBG_VALUEs that point to the register def in this instruction and point them to Reg instead.
removePHIIncomingValueFor (const MachineBasicBlock &MBB)
Remove all incoming values of Phi instruction for the given block.
void
Sets all register debug operands in this debug value instruction to be undef.
std::tuple< Register, Register >
std::tuple< Register, Register, Register >
std::tuple< Register, Register, Register, Register >
std::tuple< Register, Register, Register, Register, Register >
LLVM_ABI std::tuple< LLT, LLT >
LLVM_ABI std::tuple< LLT, LLT, LLT >
LLVM_ABI std::tuple< LLT, LLT, LLT, LLT >
LLVM_ABI std::tuple< LLT, LLT, LLT, LLT, LLT >
LLVM_ABI std::tuple< Register, LLT, Register, LLT >
LLVM_ABI std::tuple< Register, LLT, Register, LLT, Register, LLT >
LLVM_ABI std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT >
LLVM_ABI std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT, Register, LLT >
getTypeToPrint (unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs.
hasComplexRegisterTies () const
Return true when an instruction has tied register that can't be determined by the instruction's descriptor.
LLVM_ABI void
print (raw_ostream &OS, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
Print this MI to OS.
LLVM_ABI void
print (raw_ostream &OS, ModuleSlotTracker &MST, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
LLVM_ABI void
LLVM_ABI void
dumpr (const MachineRegisterInfo &MRI, unsigned MaxDepth=UINT_MAX) const
Print on dbgs() the current instruction and the instructions defining its operands and so on until we reach MaxDepth.
Public Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > >
getPrevNode ()
getNextNode ()
Get the next node, or nullptr for the list tail.
Public Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >
getIterator ()
std::enable_if_t< T::is_sentinel_tracking_explicit, bool >
isSentinel () const
Check whether this is the sentinel node.
Public Member Functions inherited from llvm::ilist_detail::node_parent_access< ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >, ilist_detail::compute_node_options< MachineInstr, Options... >::type::parent_ty >
const ilist_detail::compute_node_options< MachineInstr, Options... >::type::parent_ty *
void
setParent (ilist_detail::compute_node_options< MachineInstr, Options... >::type::parent_ty *Parent)
Additional Inherited Members
Public Types inherited from llvm::MachineInstr
enum
CommentFlag { ReloadReuse = 0x1 , NoSchedComment = 0x2 , TAsmComments = 0x4 }
Flags to specify different kinds of comments to output in assembly code. More...
enum
MIFlag {
NoFlags = 0 , FrameSetup = 1 << 0 , FrameDestroy = 1 << 1 , BundledPred = 1 << 2 ,
BundledSucc = 1 << 3 , FmNoNans = 1 << 4 , FmNoInfs = 1 << 5 , FmNsz = 1 << 6 ,
FmArcp = 1 << 7 , FmContract = 1 << 8 , FmAfn = 1 << 9 , FmReassoc = 1 << 10 ,
NoUWrap = 1 << 11 , NoSWrap = 1 << 12 , IsExact = 1 << 13 , NoFPExcept = 1 << 14 ,
NoMerge = 1 << 15 , Unpredictable = 1 << 16 , NoConvergent = 1 << 17 , NonNeg = 1 << 18 ,
Disjoint = 1 << 19 , NoUSWrap = 1 << 20 , SameSign = 1 << 21 , InBounds = 1 << 22
}
enum
QueryType { IgnoreBundle, AnyInBundle, AllInBundle }
API for querying MachineInstr properties. More...
enum
MICheckType { CheckDefs, CheckKillDead, IgnoreDefs, IgnoreVRegDefs }
using
mmo_iterator = ArrayRef<MachineMemOperand *>::iterator
using
mop_iterator = MachineOperand *
iterator/begin/end - Iterate over all operands of a machine instruction.
using
const_mop_iterator = const MachineOperand *
using
mop_range = iterator_range<mop_iterator>
using
const_mop_range = iterator_range<const_mop_iterator>
using
using
Protected Types inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >
using
using
using
using
Protected Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > >
ilist_node_with_parent ()=default
Protected Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >
ilist_node_impl ()=default
Represents G_BUILD_VECTOR, G_CONCAT_VECTORS or G_MERGE_VALUES.
All these have the common property of generating a single value from multiple sources.
Definition at line 267 of file GenericMachineInstrs.h.