DFAPacketizer.cpp Source File (original) (raw)

38#include

39#include

40#include

41#include

42#include

44using namespace llvm;

46#define DEBUG_TYPE "packets"

49 cl::init(0), cl::desc("If present, stops packetizing after N instructions"));

56 unsigned Action = ItinActions[MID->getSchedClass()];

58 return false;

59 return A.canAdd(Action);

60}

65 unsigned Action = ItinActions[MID->getSchedClass()];

67 return;

68 A.add(Action);

69}

76}

83}

87 assert(!NfaPaths.empty() && "Invalid bundle!");

92 if (InstIdx == 0)

93 return RS[0];

96 return RS[InstIdx] ^ RS[InstIdx - 1];

97}

104}

105

106

108 for (auto &M : Mutations)

109 M->apply(this);

110}

111

113

116}

117

120 : MF(mf), TII(mf.getSubtarget().getInstrInfo()), AA(aa) {

124}

125

129}

130

131

136 dbgs() << "Finalizing packet:\n";

137 unsigned Idx = 0;

138 for (MachineInstr *MI : CurrentPacketMIs) {

139 unsigned R = ResourceTracker->getUsedResources(Idx++);

140 dbgs() << " * [res:0x" << utohexstr(R) << "] " << *MI;

141 }

142 }

143 });

144 if (CurrentPacketMIs.size() > 1) {

145 MachineInstr &MIFirst = *CurrentPacketMIs.front();

147 }

148 CurrentPacketMIs.clear();

149 ResourceTracker->clearResources();

151}

152

153

160 std::distance(BeginItr, EndItr));

162

164 dbgs() << "Scheduling DAG of the packetize region\n";

166 });

167

168

172

173 bool LimitPresent = InstrLimit.getPosition();

174

175

176 for (; BeginItr != EndItr; ++BeginItr) {

177 if (LimitPresent) {

179 EndItr = BeginItr;

180 break;

181 }

183 }

186

187

190 continue;

191 }

192

193

195 continue;

196

198 assert(SUI && "Missing SUnit Info!");

199

200

201 LLVM_DEBUG(dbgs() << "Checking resources for adding MI to packet " << MI);

202

205 if (ResourceAvail)

206 dbgs() << " Resources are available for adding MI to packet\n";

207 else

208 dbgs() << " Resources NOT available\n";

209 });

211

214 assert(SUJ && "Missing SUnit Info!");

215

216 LLVM_DEBUG(dbgs() << " Checking against MJ " << *MJ);

217

219 LLVM_DEBUG(dbgs() << " Not legal to add MI, try to prune\n");

220

222

224 << " Could not prune dependencies for adding MI\n");

226 break;

227 }

228 LLVM_DEBUG(dbgs() << " Pruned dependence for adding MI\n");

229 }

230 }

231 } else {

233 << "Resources are available, but instruction should not be "

234 "added to packet\n "

235 << MI);

236

237

239 }

240

241

242 LLVM_DEBUG(dbgs() << "* Adding MI to packet " << MI << '\n');

244 }

245

246

250}

251

257 return true;

258

262

268

270}

271

276 return true;

277

281 return true;

282 return false;

283}

284

285

287 std::unique_ptr Mutation) {

289}

static cl::opt< unsigned > InstrLimit("dfa-instr-limit", cl::Hidden, cl::init(0), cl::desc("If present, stops packetizing after N instructions"))

static unsigned InstrCount

const HexagonInstrInfo * TII

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

static cl::opt< bool > UseTBAA("use-tbaa-in-sched-mi", cl::Hidden, cl::init(true), cl::desc("Enable use of TBAA during MI DAG construction"))

AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB)

The main low level interface to the alias analysis implementation.

The possible results of an alias query.

@ NoAlias

The two locations do not alias at all.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

const T & front() const

front - Get the first element.

bool empty() const

empty - Check if the array is empty.

bool canAdd(const ActionT &A)

Return true if the automaton can be transitioned based on input symbol A.

bool add(const ActionT &A)

Transition the automaton based on input symbol A.

ArrayRef< NfaPath > getNfaPaths()

Obtain a set of possible paths through the input nondeterministic automaton that could be obtained fr...

unsigned getUsedResources(unsigned InstIdx)

bool canReserveResources(const MCInstrDesc *MID)

void reserveResources(const MCInstrDesc *MID)

void setTrackResources(bool Track)

void addMutation(std::unique_ptr< ScheduleDAGMutation > Mutation)

DefaultVLIWScheduler takes ownership of the Mutation object.

void postProcessDAG()

Apply each ScheduleDAGMutation step in order.

void schedule() override

Orders nodes according to selected style.

DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI, AAResults *AA)

TypeSize getValue() const

Describe properties that are true of each instruction in the target description file.

unsigned getSchedClass() const

Return the scheduling class for this instruction.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

Representation of each machine instruction.

bool memoperands_empty() const

Return true if we don't have any memory operands which described the memory access done by this instr...

ArrayRef< MachineMemOperand * > memoperands() const

Access to memory operands of the instruction.

A description of a memory reference used in the backend.

LocationSize getSize() const

Return the size in bytes of the memory reference.

AAMDNodes getAAInfo() const

Return the AA tags for the memory reference.

const Value * getValue() const

Return the base address of the memory access.

int64_t getOffset() const

For normal values, this is a byte offset added to the base address.

Representation for a specific memory location.

Scheduling unit. This is a node in the scheduling DAG.

MachineInstr * getInstr() const

Returns the representative MachineInstr for this SUnit.

A ScheduleDAG for scheduling lists of MachineInstr.

virtual void finishBlock()

Cleans up after scheduling in the given block.

virtual void startBlock(MachineBasicBlock *BB)

Prepares to perform scheduling in the given block.

bool CanHandleTerminators

The standard DAG builder does not normally include terminators as DAG nodes because it does not creat...

void buildSchedGraph(AAResults *AA, RegPressureTracker *RPTracker=nullptr, PressureDiffs *PDiffs=nullptr, LiveIntervals *LIS=nullptr, bool TrackLaneMasks=false)

Builds SUnits for the current region.

virtual void exitRegion()

Called when the scheduler has finished scheduling the current region.

virtual void enterRegion(MachineBasicBlock *bb, MachineBasicBlock::iterator begin, MachineBasicBlock::iterator end, unsigned regioninstrs)

Initialize the DAG and common scheduler state for a new scheduling region.

void dump() const override

std::vector< SUnit > SUnits

The scheduling units.

virtual DFAPacketizer * CreateTargetScheduleState(const TargetSubtargetInfo &) const

Create machine specific model for scheduling.

VLIWPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI, AAResults *AA)

virtual bool isSoloInstruction(const MachineInstr &MI)

void addMutation(std::unique_ptr< ScheduleDAGMutation > Mutation)

virtual bool isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ)

const TargetInstrInfo * TII

bool alias(const MachineInstr &MI1, const MachineInstr &MI2, bool UseTBAA=true) const

std::vector< MachineInstr * > CurrentPacketMIs

std::map< MachineInstr *, SUnit * > MIToSUnit

DefaultVLIWScheduler * VLIWScheduler

virtual ~VLIWPacketizerList()

virtual bool isLegalToPruneDependencies(SUnit *SUI, SUnit *SUJ)

DFAPacketizer * ResourceTracker

virtual void initPacketizerState()

virtual void endPacket(MachineBasicBlock *MBB, MachineBasicBlock::iterator MI)

virtual bool ignorePseudoInstruction(const MachineInstr &I, const MachineBasicBlock *MBB)

void PacketizeMIs(MachineBasicBlock *MBB, MachineBasicBlock::iterator BeginItr, MachineBasicBlock::iterator EndItr)

virtual MachineBasicBlock::iterator addToPacket(MachineInstr &MI)

virtual bool shouldAddToPacket(const MachineInstr &MI)

self_iterator getIterator()

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

void finalizeBundle(MachineBasicBlock &MBB, MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)

finalizeBundle - Finalize a machine instruction bundle which includes a sequence of instructions star...

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

A collection of metadata nodes that might be associated with a memory access used by the alias-analys...