LLVM: lib/Target/M68k/GISel/M68kCallLowering.cpp Source File (original) (raw)

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26using namespace llvm;

27

28namespace {

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33};

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40private:

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45};

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47}

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55 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB),

56 DL(MIRBuilder.getMF().getDataLayout()),

57 STI(MIRBuilder.getMF().getSubtarget<M68kSubtarget>()) {}

58

62 Register ExtReg = extendRegister(ValVReg, VA);

63 MIRBuilder.buildCopy(PhysReg, ExtReg);

64 }

65

70 Register ExtReg = extendRegister(ValVReg, VA);

71

74 MIRBuilder.buildStore(ExtReg, Addr, *MMO);

75 }

76

82 Register StackReg = STI.getRegisterInfo()->getStackRegister();

83 auto SPReg = MIRBuilder.buildCopy(p0, StackReg).getReg(0);

84 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset);

85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);

87 return AddrReg.getReg(0);

88 }

92};

96 Register SwiftErrorVReg) const {

97

105 TLI.getCCAssignFn(F.getCallingConv(), true, F.isVarArg());

106 auto &DL = F.getDataLayout();

107 if (!VRegs.empty()) {

115 MIRBuilder, F.getCallingConv(),

116 F.isVarArg());

117 }

120}

121

128 const auto &DL = F.getDataLayout();

129 auto &TLI = *getTLI();

130

132 unsigned I = 0;

133 for (const auto &Arg : F.args()) {

134 ArgInfo OrigArg{VRegs[I], Arg.getType(), I};

137 ++I;

138 }

139

141 TLI.getCCAssignFn(F.getCallingConv(), false, F.isVarArg());

143 M68kFormalArgHandler ArgHandler(MIRBuilder, MRI);

145 MIRBuilder, F.getCallingConv(),

146 F.isVarArg());

147}

148

149void M68kIncomingValueHandler::assignValueToReg(Register ValVReg,

154 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);

155}

156

157void M68kIncomingValueHandler::assignValueToAddress(

164}

165

171 const bool IsImmutable = Flags.isByVal();

172 int FI = MFI.CreateFixedObject(Size, Offset, IsImmutable);

174

175

180 return AddrReg.getReg(0);

181}

182

183void CallReturnHandler::assignValueToReg(Register ValVReg, Register PhysReg,

186 MIRBuilder.buildCopy(ValVReg, PhysReg);

187}

188

194 auto &DL = F.getDataLayout();

199

201 for (auto &OrigArg : Info.OrigArgs)

203

205 if (Info.OrigRet.Ty->isVoidTy())

207

208 unsigned AdjStackDown = TII.getCallFrameSetupOpcode();

209 auto CallSeqStart = MIRBuilder.buildInstr(AdjStackDown);

210

212 : Info.Callee.isReg() ? M68k::CALLj

213 : M68k::CALLb;

214

218

223 Info.CallConv, Info.IsVarArg))

224 return false;

225

226 if (Info.Callee.isReg())

229 Info.Callee, 0);

230

232

233 if (Info.OrigRet.Ty->isVoidTy()) {

236

238 CallReturnHandler Handler(MIRBuilder, MRI, MIB);

240 Info.CallConv, Info.IsVarArg))

241 return false;

242 }

243

244 CallSeqStart.addImm(Assigner.StackSize).addImm(0);

245

246 unsigned AdjStackUp = TII.getCallFrameDestroyOpcode();

248

249 return true;

250}

251

unsigned const MachineRegisterInfo * MRI

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Analysis containing CSE Info

This file describes how to lower LLVM calls to machine code calls.

const HexagonInstrInfo * TII

This file implements the lowering of LLVM calls to machine code calls for GlobalISel.

This file defines the interfaces that M68k uses to lower LLVM code into a selection DAG.

This file contains the M68k implementation of the TargetInstrInfo class.

This file declares the M68k specific subclass of TargetSubtargetInfo.

This file declares the M68k specific subclass of TargetMachine.

This file declares the MachineIRBuilder class.

unsigned const TargetRegisterInfo * TRI

static constexpr Register SPReg

static const unsigned FramePtr

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

bool empty() const

empty - Check if the array is empty.

CCValAssign - Represent assignment of one arg/retval to a location.

void splitToValueTypes(const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const

Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs.

bool determineAndHandleAssignments(ValueHandler &Handler, ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool IsVarArg, ArrayRef< Register > ThisReturnRegs={}) const

Invoke ValueAssigner::assignArg on each of the given Args and then use Handler to move them to the as...

void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const

A parsed version of the target data layout string in and methods for querying it.

unsigned getPointerSizeInBits(unsigned AS=0) const

Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...

FunctionLoweringInfo - This contains information that is global to a function that is used when lower...

static constexpr LLT scalar(unsigned SizeInBits)

Get a low-level scalar or aggregate "bag of bits".

static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)

Get a low-level pointer in the given address space.

bool lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override

This hook must be implemented to lower the given call instruction, including argument and return valu...

bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const override

This hook must be implemented to lower the incoming (formal) arguments, described by VRegs,...

M68kCallLowering(const M68kTargetLowering &TLI)

bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI, Register SwiftErrorVReg) const override

This hook must be implemented to lower outgoing return values, described by Val, into the specified v...

bool enableBigEndian() const override

For targets which want to use big-endian can enable it with enableBigEndian() hook.

const RegisterBankInfo * getRegBankInfo() const override

const M68kInstrInfo * getInstrInfo() const override

const M68kRegisterInfo * getRegisterInfo() const override

CCAssignFn * getCCAssignFn(CallingConv::ID CC, bool Return, bool IsVarArg) const

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)

getMachineMemOperand - Allocate a new MachineMemOperand.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

const DataLayout & getDataLayout() const

Return the DataLayout attached to the Module associated to this MF.

Function & getFunction()

Return the LLVM function that this machine code represents.

Helper class to build MachineInstr.

MachineInstrBuilder insertInstr(MachineInstrBuilder MIB)

Insert an existing instruction at the insertion point.

MachineInstrBuilder buildLoad(const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO)

Build and insert Res = G_LOAD Addr, MMO.

MachineInstrBuilder buildInstr(unsigned Opcode)

Build and insert = Opcode .

MachineInstrBuilder buildFrameIndex(const DstOp &Res, int Idx)

Build and insert Res = G_FRAME_INDEX Idx.

MachineFunction & getMF()

Getter for the function we currently build.

const MachineBasicBlock & getMBB() const

Getter for the basic block we currently build.

MachineRegisterInfo * getMRI()

Getter for MRI.

MachineInstrBuilder buildInstrNoInsert(unsigned Opcode)

Build but don't insert = Opcode .

Register getReg(unsigned Idx) const

Get the register for the operand index.

const MachineInstrBuilder & addImm(int64_t Val) const

Add a new immediate operand.

const MachineInstrBuilder & add(const MachineOperand &MO) const

const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const

@ MOLoad

The memory access reads data.

@ MOStore

The memory access writes data.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

void addLiveIn(MCRegister Reg, Register vreg=Register())

addLiveIn - Add the specified register as a live-in.

Wrapper class representing virtual and physical registers.

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

TargetInstrInfo - Interface to description of machine instruction set.

const TargetMachine & getTargetMachine() const

bool isPositionIndependent() const

LLVM Value Representation.

Type * getType() const

All values are typed, get the type of this value.

@ Implicit

Not emitted register (e.g. carry, or temporary result).

This is an optimization pass for GlobalISel generic memory operations.

Register constrainOperandRegClass(const MachineFunction &MF, const TargetRegisterInfo &TRI, MachineRegisterInfo &MRI, const TargetInstrInfo &TII, const RegisterBankInfo &RBI, MachineInstr &InsertPt, const TargetRegisterClass &RegClass, MachineOperand &RegMO)

Constrain the Register operand OpIdx, so that it is now constrained to the TargetRegisterClass passed...

bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)

CCAssignFn - This function assigns a location for Val, updating State to reflect the change.

Align inferAlignFromPtrInfo(MachineFunction &MF, const MachinePointerInfo &MPO)

Register getStackAddress(uint64_t Size, int64_t Offset, MachinePointerInfo &MPO, ISD::ArgFlagsTy Flags) override

Materialize a VReg containing the address of the specified stack-based object.

M68kOutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder MIB)

void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO, const CCValAssign &VA) override

The specified value has been assigned to a stack location.

const M68kSubtarget & STI

void assignValueToReg(Register ValVReg, Register PhysReg, const CCValAssign &VA) override

The specified value has been assigned to a physical register, handle the appropriate COPY (either to ...

Base class for ValueHandlers used for arguments passed to a function call, or for return values.

uint64_t StackSize

The size of the currently allocated portion of the stack.

MachineIRBuilder & MIRBuilder

This class contains a discriminated union of information about pointers in memory operands,...

static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)

Stack pointer relative access.

static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)

Return a MachinePointerInfo record that refers to the specified FrameIndex.