ARMBaseInfo.h Source File (original) (raw)

16#ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMBASEINFO_H

17#define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMBASEINFO_H

23namespace llvm {

38 switch (val) {

40 case F: return "f";

41 case I: return "i";

42 case A: return "a";

43 }

44 }

46 inline static const char *IModToString(unsigned val) {

47 switch (val) {

49 case IE: return "ie";

50 case ID: return "id";

51 }

52 }

53}

77 inline static const char *MemBOptToString(unsigned val, bool HasV8) {

78 switch (val) {

80 case SY: return "sy";

81 case ST: return "st";

82 case LD: return HasV8 ? "ld" : "#0xd";

84 case ISH: return "ish";

85 case ISHST: return "ishst";

86 case ISHLD: return HasV8 ? "ishld" : "#0x9";

88 case NSH: return "nsh";

89 case NSHST: return "nshst";

90 case NSHLD: return HasV8 ? "nshld" : "#0x5";

92 case OSH: return "osh";

93 case OSHST: return "oshst";

94 case OSHLD: return HasV8 ? "oshld" : "#0x1";

96 }

97 }

98}

104

106 switch (val) {

107 default:

108 llvm_unreachable("Unknown trace synchronization barrier operation");

109 case CSYNC: return "csync";

110 }

111 }

112}

113

133

135 switch (val) {

136 default:

153 case SY: return "sy";

154 }

155 }

156}

157

158

159

161 using namespace ARM;

162 switch (Reg.id()) {

163 case R0: case R1: case R2: case R3:

164 case R4: case R5: case R6: case R7:

165 return true;

166 default:

167 return false;

168 }

169}

170

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211

213 switch (addrmode) {

215 case AddrMode1: return "AddrMode1";

216 case AddrMode2: return "AddrMode2";

217 case AddrMode3: return "AddrMode3";

218 case AddrMode4: return "AddrMode4";

219 case AddrMode5: return "AddrMode5";

221 case AddrMode6: return "AddrMode6";

238 }

239 }

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311 };

312

313 enum {

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319 AddrModeMask = 0x1f,

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477 };

478

479}

480

481}

482

483#endif

Wrapper class representing physical registers. Should be passed by value.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

ARMII - This namespace holds all of the target specific flags that instruction info tracks.

Definition ARMBaseInfo.h:174

@ M_BitShift

Definition ARMBaseInfo.h:457

@ MulFrm

Definition ARMBaseInfo.h:337

@ BrFrm

Definition ARMBaseInfo.h:340

@ LdStExFrm

Definition ARMBaseInfo.h:354

@ MiscFrm

Definition ARMBaseInfo.h:379

@ VecSizeShift

Definition ARMBaseInfo.h:436

@ VFPLdStFrm

Definition ARMBaseInfo.h:371

@ BrMiscFrm

Definition ARMBaseInfo.h:341

@ IndexModeMask

Definition ARMBaseInfo.h:325

@ DomainNEON

Definition ARMBaseInfo.h:445

@ DomainVFP

Definition ARMBaseInfo.h:444

@ N3RegVShFrm

Definition ARMBaseInfo.h:393

@ NDupFrm

Definition ARMBaseInfo.h:384

@ DoubleWidthResult

Definition ARMBaseInfo.h:429

@ N2RegFrm

Definition ARMBaseInfo.h:387

@ D_BitShift

Definition ARMBaseInfo.h:472

@ DomainNEONA8

Definition ARMBaseInfo.h:446

@ RegRdLoShift

Definition ARMBaseInfo.h:465

@ ExtRotImmShift

Definition ARMBaseInfo.h:464

@ FormMask

Definition ARMBaseInfo.h:331

@ ShiftShift

Definition ARMBaseInfo.h:459

@ AM3_I_BitShift

Definition ARMBaseInfo.h:471

@ RegRdHiShift

Definition ARMBaseInfo.h:467

@ ThumbArithFlagSetting

Definition ARMBaseInfo.h:414

@ SatFrm

Definition ARMBaseInfo.h:358

@ Xform16Bit

Definition ARMBaseInfo.h:408

@ VFPConv5Frm

Definition ARMBaseInfo.h:370

@ VecSize

Definition ARMBaseInfo.h:437

@ NVExtFrm

Definition ARMBaseInfo.h:394

@ VFPMiscFrm

Definition ARMBaseInfo.h:373

@ NVDupLnFrm

Definition ARMBaseInfo.h:389

@ NGetLnFrm

Definition ARMBaseInfo.h:382

@ LdFrm

Definition ARMBaseInfo.h:348

@ VFPBinaryFrm

Definition ARMBaseInfo.h:365

@ NVTBLFrm

Definition ARMBaseInfo.h:396

@ P_BitShift

Definition ARMBaseInfo.h:474

@ NSetLnFrm

Definition ARMBaseInfo.h:383

@ DPSoRegFrm

Definition ARMBaseInfo.h:345

@ NVMulSLFrm

Definition ARMBaseInfo.h:395

@ N2RegVShRFrm

Definition ARMBaseInfo.h:391

@ ValidForTailPredication

Definition ARMBaseInfo.h:418

@ S_BitShift

Definition ARMBaseInfo.h:469

@ CondShift

Definition ARMBaseInfo.h:476

@ StMiscFrm

Definition ARMBaseInfo.h:351

@ VFPConv2Frm

Definition ARMBaseInfo.h:367

@ ExtFrm

Definition ARMBaseInfo.h:361

@ N1RegModImmFrm

Definition ARMBaseInfo.h:386

@ VFPUnaryFrm

Definition ARMBaseInfo.h:364

@ ShiftImmShift

Definition ARMBaseInfo.h:458

@ DomainMask

Definition ARMBaseInfo.h:442

@ LdStMulFrm

Definition ARMBaseInfo.h:352

@ DomainGeneral

Definition ARMBaseInfo.h:443

@ VFPConv4Frm

Definition ARMBaseInfo.h:369

@ RegRnShift

Definition ARMBaseInfo.h:468

@ HorizontalReduction

Definition ARMBaseInfo.h:425

@ RegRsShift

Definition ARMBaseInfo.h:463

@ ThumbFrm

Definition ARMBaseInfo.h:376

@ DomainShift

Definition ARMBaseInfo.h:441

@ RetainsPreviousHalfElement

Definition ARMBaseInfo.h:422

@ ArithMiscFrm

Definition ARMBaseInfo.h:357

@ I_BitShift

Definition ARMBaseInfo.h:475

@ DomainMVE

Definition ARMBaseInfo.h:447

@ DPFrm

Definition ARMBaseInfo.h:344

@ N2RegVShLFrm

Definition ARMBaseInfo.h:390

@ NLdStFrm

Definition ARMBaseInfo.h:385

@ N3RegCplxFrm

Definition ARMBaseInfo.h:397

@ SoRotImmShift

Definition ARMBaseInfo.h:462

@ IndexModeShift

Definition ARMBaseInfo.h:324

@ VFPLdStMulFrm

Definition ARMBaseInfo.h:372

@ VFPConv1Frm

Definition ARMBaseInfo.h:366

@ ShiftTypeShift

Definition ARMBaseInfo.h:455

@ N3RegFrm

Definition ARMBaseInfo.h:392

@ NVCVTFrm

Definition ARMBaseInfo.h:388

@ W_BitShift

Definition ARMBaseInfo.h:470

@ RegRdShift

Definition ARMBaseInfo.h:466

@ U_BitShift

Definition ARMBaseInfo.h:473

@ LdMiscFrm

Definition ARMBaseInfo.h:350

@ N_BitShift

Definition ARMBaseInfo.h:460

@ VFPConv3Frm

Definition ARMBaseInfo.h:368

@ FormShift

Definition ARMBaseInfo.h:330

@ Pseudo

Definition ARMBaseInfo.h:334

@ AddrModeMask

Definition ARMBaseInfo.h:319

@ ImmHiShift

Definition ARMBaseInfo.h:461

@ StFrm

Definition ARMBaseInfo.h:349

@ UnaryDP

Definition ARMBaseInfo.h:404

static const char * AddrModeToString(AddrMode addrmode)

Definition ARMBaseInfo.h:212

TOF

Target Operand Flag enum.

Definition ARMBaseInfo.h:242

@ MO_OPTION_MASK

MO_OPTION_MASK - Most flags are mutually exclusive; this mask selects just that part of the flag set.

Definition ARMBaseInfo.h:258

@ MO_LO16

MO_LO16 - On a symbol operand, this represents a relocation containing lower 16 bit of the address.

Definition ARMBaseInfo.h:250

@ MO_LO_0_7

MO_LO_0_7 - On a symbol operand, this represents a relocation containing bits 0 through 7 of the addr...

Definition ARMBaseInfo.h:293

@ MO_LO_8_15

MO_LO_8_15 - On a symbol operand, this represents a relocation containing bits 8 through 15 of the ad...

Definition ARMBaseInfo.h:299

@ MO_NONLAZY

MO_NONLAZY - This is an independent flag, on a symbol operand "FOO" it represents a symbol which,...

Definition ARMBaseInfo.h:288

@ MO_HI_8_15

MO_HI_8_15 - On a symbol operand, this represents a relocation containing bits 24 through 31 of the a...

Definition ARMBaseInfo.h:310

@ MO_SBREL

MO_SBREL - On a symbol operand, this represents a static base relative relocation.

Definition ARMBaseInfo.h:270

@ MO_HI16

MO_HI16 - On a symbol operand, this represents a relocation containing higher 16 bit of the address.

Definition ARMBaseInfo.h:254

@ MO_DLLIMPORT

MO_DLLIMPORT - On a symbol operand, this represents that the reference to the symbol is for an import...

Definition ARMBaseInfo.h:275

@ MO_SECREL

MO_SECREL - On a symbol operand this indicates that the immediate is the offset from beginning of sec...

Definition ARMBaseInfo.h:281

@ MO_NO_FLAG

Definition ARMBaseInfo.h:246

@ MO_HI_0_7

MO_HI_0_7 - On a symbol operand, this represents a relocation containing bits 16 through 23 of the ad...

Definition ARMBaseInfo.h:304

@ MO_GOT

MO_GOT - On a symbol operand, this represents a GOT relative relocation.

Definition ARMBaseInfo.h:266

@ MO_COFFSTUB

MO_COFFSTUB - On a symbol operand "FOO", this indicates that the reference is actually to the "....

Definition ARMBaseInfo.h:263

IndexMode

ARM Index Modes.

Definition ARMBaseInfo.h:177

@ IndexModeNone

Definition ARMBaseInfo.h:178

@ IndexModeUpd

Definition ARMBaseInfo.h:181

@ IndexModePost

Definition ARMBaseInfo.h:180

@ IndexModePre

Definition ARMBaseInfo.h:179

AddrMode

ARM Addressing Modes.

Definition ARMBaseInfo.h:185

@ AddrMode5

Definition ARMBaseInfo.h:191

@ AddrModeT1_s

Definition ARMBaseInfo.h:196

@ AddrModeT1_4

Definition ARMBaseInfo.h:195

@ AddrMode5FP16

Definition ARMBaseInfo.h:205

@ AddrMode3

Definition ARMBaseInfo.h:189

@ AddrMode_i12

Definition ARMBaseInfo.h:204

@ AddrModeT1_2

Definition ARMBaseInfo.h:194

@ AddrModeT2_i12

Definition ARMBaseInfo.h:197

@ AddrModeT2_i7s2

Definition ARMBaseInfo.h:208

@ AddrModeNone

Definition ARMBaseInfo.h:186

@ AddrMode2

Definition ARMBaseInfo.h:188

@ AddrMode6

Definition ARMBaseInfo.h:192

@ AddrModeT2_i8neg

Definition ARMBaseInfo.h:200

@ AddrModeT2_ldrex

Definition ARMBaseInfo.h:206

@ AddrModeT2_i8

Definition ARMBaseInfo.h:198

@ AddrModeT2_i7

Definition ARMBaseInfo.h:209

@ AddrMode4

Definition ARMBaseInfo.h:190

@ AddrMode1

Definition ARMBaseInfo.h:187

@ AddrModeT2_i8pos

Definition ARMBaseInfo.h:199

@ AddrModeT2_i7s4

Definition ARMBaseInfo.h:207

@ AddrModeT1_1

Definition ARMBaseInfo.h:193

@ AddrModeT2_i8s4

Definition ARMBaseInfo.h:203

@ AddrModeT2_so

Definition ARMBaseInfo.h:201

@ AddrModeT2_pc

Definition ARMBaseInfo.h:202

Definition ARMBaseInfo.h:114

static const char * InstSyncBOptToString(unsigned val)

Definition ARMBaseInfo.h:134

InstSyncBOpt

Definition ARMBaseInfo.h:115

@ RESERVED_2

Definition ARMBaseInfo.h:118

@ RESERVED_0

Definition ARMBaseInfo.h:116

@ RESERVED_8

Definition ARMBaseInfo.h:124

@ RESERVED_13

Definition ARMBaseInfo.h:129

@ RESERVED_1

Definition ARMBaseInfo.h:117

@ RESERVED_6

Definition ARMBaseInfo.h:122

@ RESERVED_7

Definition ARMBaseInfo.h:123

@ RESERVED_4

Definition ARMBaseInfo.h:120

@ SY

Definition ARMBaseInfo.h:131

@ RESERVED_5

Definition ARMBaseInfo.h:121

@ RESERVED_12

Definition ARMBaseInfo.h:128

@ RESERVED_3

Definition ARMBaseInfo.h:119

@ RESERVED_11

Definition ARMBaseInfo.h:127

@ RESERVED_14

Definition ARMBaseInfo.h:130

@ RESERVED_9

Definition ARMBaseInfo.h:125

@ RESERVED_10

Definition ARMBaseInfo.h:126

Definition ARMBaseInfo.h:55

static const char * MemBOptToString(unsigned val, bool HasV8)

Definition ARMBaseInfo.h:77

MemBOpt

Definition ARMBaseInfo.h:58

@ SY

Definition ARMBaseInfo.h:74

@ NSH

Definition ARMBaseInfo.h:66

@ RESERVED_4

Definition ARMBaseInfo.h:63

@ OSH

Definition ARMBaseInfo.h:62

@ NSHLD

Definition ARMBaseInfo.h:64

@ RESERVED_8

Definition ARMBaseInfo.h:67

@ ISH

Definition ARMBaseInfo.h:70

@ OSHLD

Definition ARMBaseInfo.h:60

@ ISHLD

Definition ARMBaseInfo.h:68

@ LD

Definition ARMBaseInfo.h:72

@ ISHST

Definition ARMBaseInfo.h:69

@ NSHST

Definition ARMBaseInfo.h:65

@ RESERVED_12

Definition ARMBaseInfo.h:71

@ OSHST

Definition ARMBaseInfo.h:61

@ RESERVED_0

Definition ARMBaseInfo.h:59

@ ST

Definition ARMBaseInfo.h:73

Definition ARMBaseInfo.h:25

IMod

Definition ARMBaseInfo.h:26

@ ID

Definition ARMBaseInfo.h:28

@ IE

Definition ARMBaseInfo.h:27

static const char * IModToString(unsigned val)

Definition ARMBaseInfo.h:46

static const char * IFlagsToString(unsigned val)

Definition ARMBaseInfo.h:37

IFlags

Definition ARMBaseInfo.h:31

@ I

Definition ARMBaseInfo.h:33

@ A

Definition ARMBaseInfo.h:34

@ F

Definition ARMBaseInfo.h:32

Definition ARMBaseInfo.h:100

static const char * TraceSyncBOptToString(unsigned val)

Definition ARMBaseInfo.h:105

TraceSyncBOpt

Definition ARMBaseInfo.h:101

@ CSYNC

Definition ARMBaseInfo.h:102

Define some predicates that are used for node matching.

This is an optimization pass for GlobalISel generic memory operations.

static bool isARMLowRegister(MCRegister Reg)

isARMLowRegister - Returns true if the register is a low register (r0-r7).

Definition ARMBaseInfo.h:160