MatchContext.h Source File (original) (raw)

13#ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_MATCHCONTEXT_H

14#define LLVM_LIB_CODEGEN_SELECTIONDAG_MATCHCONTEXT_H

19namespace llvm {

26public:

28 : DAG(DAG), TLI(TLI), Root(Root) {}

37 return DAG.getNode(std::forward(Args)...);

38 }

41 return TLI.isOperationLegal(Op, VT);

42 }

45 bool LegalOnly = false) const {

46 return TLI.isOperationLegalOrCustom(Op, VT, LegalOnly);

47 }

50};

59public:

61 : DAG(DAG), TLI(TLI), RootMaskOp(), RootVectorLenOp() {

62 Root = _Root;

63 assert(Root->isVPOpcode());

65 RootMaskOp = Root->getOperand(*RootMaskPos);

66 else if (Root->getOpcode() == ISD::VP_SELECT)

67 RootMaskOp = DAG.getAllOnesConstant(SDLoc(Root),

68 Root->getOperand(0).getValueType());

71 RootVectorLenOp = Root->getOperand(*RootVLenPos);

72 }

76 Root->getOpcode(), !Root->getFlags().hasNoFPExcept());

77 assert(Opcode.has_value());

78 return *Opcode;

79 }

89 if (BaseOpc != Opc)

90 return false;

93 unsigned VPOpcode = OpVal->getOpcode();

96 if (RootMaskOp != MaskOp &&

98 return false;

99 }

100

101

103 if (RootVectorLenOp != OpVal.getOperand(*VLenPos))

104 return false;

105 return true;

106 }

107

108

109

110

111

116 return DAG.getNode(VPOpcode, DL, VT,

117 {Operand, RootMaskOp, RootVectorLenOp});

118 }

119

125 return DAG.getNode(VPOpcode, DL, VT, {N1, N2, RootMaskOp, RootVectorLenOp});

126 }

127

133 return DAG.getNode(VPOpcode, DL, VT,

134 {N1, N2, N3, RootMaskOp, RootVectorLenOp});

135 }

136

142 return DAG.getNode(VPOpcode, DL, VT, {Operand, RootMaskOp, RootVectorLenOp},

143 Flags);

144 }

145

151 return DAG.getNode(VPOpcode, DL, VT, {N1, N2, RootMaskOp, RootVectorLenOp},

152 Flags);

153 }

154

160 return DAG.getNode(VPOpcode, DL, VT,

161 {N1, N2, N3, RootMaskOp, RootVectorLenOp}, Flags);

162 }

163

166 return TLI.isOperationLegal(VPOp, VT);

167 }

168

170 bool LegalOnly = false) const {

172 return TLI.isOperationLegalOrCustom(VPOp, VT, LegalOnly);

173 }

174

176 return N->isVPOpcode() ? N->getNumOperands() - 2 : N->getNumOperands();

177 }

178};

179

180}

181

182#endif

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

This file describes how to lower LLVM code to machine code.

bool match(SDValue OpN, unsigned Opcode) const

Definition MatchContext.h:31

bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const

Definition MatchContext.h:44

unsigned getNumOperands(SDValue N) const

Definition MatchContext.h:49

EmptyMatchContext(SelectionDAG &DAG, const TargetLowering &TLI, SDNode *Root)

Definition MatchContext.h:27

unsigned getRootBaseOpcode()

Definition MatchContext.h:30

bool isOperationLegal(unsigned Op, EVT VT) const

Definition MatchContext.h:40

SDValue getNode(ArgT &&...Args)

Definition MatchContext.h:36

Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...

Represents one node in the SelectionDAG.

unsigned getOpcode() const

Return the SelectionDAG opcode value for this node.

SDNodeFlags getFlags() const

bool isVPOpcode() const

Test if this node is a vector predication operation.

Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.

SDNode * getNode() const

get the SDNode which holds the desired result

const SDValue & getOperand(unsigned i) const

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...

SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDNodeFlags Flags)

Definition MatchContext.h:146

bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const

Definition MatchContext.h:169

SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand, SDNodeFlags Flags)

Definition MatchContext.h:137

bool isOperationLegal(unsigned Op, EVT VT) const

Definition MatchContext.h:164

SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDNodeFlags Flags)

Definition MatchContext.h:155

SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3)

Definition MatchContext.h:128

bool match(SDValue OpVal, unsigned Opc) const

whether OpVal is a node that is functionally compatible with the NodeType Opc

Definition MatchContext.h:83

unsigned getRootBaseOpcode()

Definition MatchContext.h:74

SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand)

Definition MatchContext.h:112

VPMatchContext(SelectionDAG &DAG, const TargetLowering &TLI, SDNode *_Root)

Definition MatchContext.h:60

SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2)

Definition MatchContext.h:120

unsigned getNumOperands(SDValue N) const

Definition MatchContext.h:175

LLVM_ABI bool isConstantSplatVectorAllOnes(const SDNode *N, bool BuildVectorOnly=false)

Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where all of the elements are ~0 ...

LLVM_ABI std::optional< unsigned > getBaseOpcodeForVP(unsigned Opcode, bool hasFPExcept)

Translate this VP Opcode to its corresponding non-VP Opcode.

LLVM_ABI std::optional< unsigned > getVPMaskIdx(unsigned Opcode)

The operand position of the vector mask.

LLVM_ABI std::optional< unsigned > getVPExplicitVectorLengthIdx(unsigned Opcode)

The operand position of the explicit vector length parameter.

LLVM_ABI std::optional< unsigned > getVPForBaseOpcode(unsigned Opcode)

Translate this non-VP Opcode to its corresponding VP Opcode.

This is an optimization pass for GlobalISel generic memory operations.

DWARFExpression::Operation Op

These are IR-level optimization flags that may be propagated to SDNodes.

bool hasNoFPExcept() const