LLVM: llvm::SDNode Class Reference (original) (raw)

Represents one node in the SelectionDAG. More...

#include "[llvm/CodeGen/SelectionDAGNodes.h](SelectionDAGNodes%5F8h%5Fsource.html)"

Represents one node in the SelectionDAG.

Definition at line 512 of file SelectionDAGNodes.h.

◆ op_iterator

◆ value_iterator

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

Create an SDNode.

SDNodes are created without any operands, and never own the operand storage. To add operands, see SelectionDAG::createOperands.

Definition at line 1214 of file SelectionDAGNodes.h.

References assert(), llvm::move(), llvm::SDVTList::NumVTs, Opc, and RawSDNodeBits.

Referenced by llvm::AddrSpaceCastSDNode::AddrSpaceCastSDNode(), areOnlyUsersOf(), llvm::AssertAlignSDNode::AssertAlignSDNode(), llvm::AddrSpaceCastSDNode::classof(), llvm::AssertAlignSDNode::classof(), llvm::BasicBlockSDNode::classof(), llvm::BlockAddressSDNode::classof(), llvm::BuildVectorSDNode::classof(), llvm::CondCodeSDNode::classof(), llvm::ConstantFPSDNode::classof(), llvm::ConstantPoolSDNode::classof(), llvm::ConstantSDNode::classof(), llvm::DeactivationSymbolSDNode::classof(), llvm::ExternalSymbolSDNode::classof(), llvm::FrameIndexSDNode::classof(), llvm::GlobalAddressSDNode::classof(), llvm::JumpTableSDNode::classof(), llvm::LabelSDNode::classof(), llvm::LifetimeSDNode::classof(), llvm::MachineSDNode::classof(), llvm::MCSymbolSDNode::classof(), llvm::MDNodeSDNode::classof(), llvm::MemSDNode::classof(), llvm::PseudoProbeSDNode::classof(), llvm::RegisterMaskSDNode::classof(), llvm::RegisterSDNode::classof(), llvm::ShuffleVectorSDNode::classof(), llvm::SrcValueSDNode::classof(), llvm::TargetIndexSDNode::classof(), llvm::VTSDNode::classof(), getGluedNode(), getGluedUser(), llvm::HandleSDNode::HandleSDNode(), hasPredecessor(), hasPredecessorHelper(), isOnlyUserOf(), isOperandOf(), isPredecessorOf(), llvm::MemSDNode::MemSDNode(), llvm::BasicBlockSDNode::SelectionDAG, llvm::BlockAddressSDNode::SelectionDAG, llvm::CondCodeSDNode::SelectionDAG, llvm::ConstantFPSDNode::SelectionDAG, llvm::ConstantSDNode::SelectionDAG, llvm::DeactivationSymbolSDNode::SelectionDAG, llvm::ExternalSymbolSDNode::SelectionDAG, llvm::FrameIndexSDNode::SelectionDAG, llvm::GlobalAddressSDNode::SelectionDAG, llvm::JumpTableSDNode::SelectionDAG, llvm::LabelSDNode::SelectionDAG, llvm::LifetimeSDNode::SelectionDAG, llvm::MachineSDNode::SelectionDAG, llvm::MCSymbolSDNode::SelectionDAG, llvm::MDNodeSDNode::SelectionDAG, llvm::PseudoProbeSDNode::SelectionDAG, llvm::RegisterMaskSDNode::SelectionDAG, llvm::RegisterSDNode::SelectionDAG, llvm::SrcValueSDNode::SelectionDAG, llvm::VTSDNode::SelectionDAG, llvm::ShuffleVectorSDNode::ShuffleVectorSDNode(), and llvm::TargetIndexSDNode::TargetIndexSDNode().

◆ addUse()

◆ areOnlyUsersOf()

◆ bitcastToAPInt()

◆ dropFlags()

◆ DropOperands()

◆ dump() [1/2]

◆ dump() [2/2]

◆ dumpr() [1/2]

◆ dumpr() [2/2]

◆ dumprFull()

◆ dumprWithDepth()

◆ getAsAPIntVal()

◆ getAsZExtVal()

Helper method returns the zero-extended integer value of a ConstantSDNode.

Definition at line 1794 of file SelectionDAGNodes.h.

References llvm::cast().

Referenced by llvm::SIInstrInfo::areLoadsFromSameBasePtr(), combineGatherScatter(), expandDivFix(), llvm::PPC::get_VSPLTI_elt(), getCmp(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNode(), getOperationName(), getUnderlyingExtractedFromVec(), isF128MovedFromParts(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerINTRINSIC_W_CHAIN(), llvm::MSP430TargetLowering::LowerSETCC(), lowerVectorIntrinsicScalars(), matchMergedBFX(), llvm::ARMTargetLowering::PerformBRCONDCombine(), performBRCONDCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), PerformORCombineToBFI(), ReplaceINTRINSIC_W_CHAIN(), llvm::LoongArchTargetLowering::ReplaceNodeResults(), llvm::RISCVDAGToDAGISel::Select(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), splatPartsI64WithVL(), and tryFoldMADwithSRL().

◆ getCFIType()

◆ getCombinerWorklistIndex()

◆ getConstantOperandAPInt()

◆ getConstantOperandVal()

Helper method returns the integer value of a ConstantSDNode operand.

Definition at line 1790 of file SelectionDAGNodes.h.

References llvm::cast(), and getOperand().

Referenced by llvm::SIInstrInfo::areLoadsFromSameBasePtr(), checkBoolTestAndOrSetCCCombine(), CombineVLDDUP(), combineX86SubCmpForFlags(), extractPtrauthBlendDiscriminators(), extractPtrauthBlendDiscriminators(), foldCSELOfCSEL(), getMemVTFromNode(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(), narrowExtractedVectorSelect(), performBuildVectorCombine(), performConcatVectorsCombine(), performSetCCPunpkCombine(), performVectorDeinterleaveCombine(), PerformVMOVNCombine(), replaceZeroVectorStore(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), and simplifyMul24().

◆ getDebugLoc()

◆ getFlags()

Definition at line 1096 of file SelectionDAGNodes.h.

Referenced by combineBinOpOfExtractToReduceTree(), combineEXTEND_VECTOR_INREG(), combineFaddCFmul(), combineFneg(), combineLoad(), combineShiftOfShiftedLogic(), combineTruncate(), eliminateFPCastPair(), expandf64Toi32(), llvm::SelectionDAG::getNode(), isAddSubOrSubAdd(), isFMAddSubOrFMSubAdd(), isNoUnsignedWrap(), isNoUnsignedWrap(), lowerVECTOR_SHUFFLE(), llvm::VPMatchContext::match(), narrowExtractedVectorBinOp(), narrowInsertExtractVectorBinOp(), PerformFADDCombineWithOperands(), llvm::AMDGPUTargetLowering::performFNegCombine(), print_details(), llvm::X86TargetLowering::ReplaceNodeResults(), and llvm::TargetLowering::SimplifySetCC().

◆ getGluedNode()

If this node has a glue operand, return the node to which the glue operand points.

Otherwise return NULL.

Definition at line 1080 of file SelectionDAGNodes.h.

References llvm::SDValue::getNode(), getNumOperands(), getOperand(), getValueType(), and SDNode().

Referenced by canClobberPhysRegDefs(), llvm::ScheduleDAGSDNodes::dumpNode(), llvm::ScheduleDAGSDNodes::EmitSchedule(), isOperandOf(), llvm::ResourcePriorityQueue::isResourceAvailable(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), and llvm::ResourcePriorityQueue::reserveResources().

◆ getGluedUser()

◆ getHasDebugValue()

◆ getIndexedModeName()

◆ getIROrder()

◆ getMachineOpcode()

This may only be called if isMachineOpcode returns true.

It returns the MachineInstr opcode value that the node's opcode corresponds to.

Definition at line 761 of file SelectionDAGNodes.h.

References assert(), and isMachineOpcode().

Referenced by llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::X86InstrInfo::areLoadsFromSameBasePtr(), canClobberReachingPhysRegUse(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::TargetInstrInfo::getOperandLatency(), getOperationName(), getUsefulBitsForUse(), llvm::ResourcePriorityQueue::isResourceAvailable(), nodesHaveSameOperandValue(), llvm::ResourcePriorityQueue::reserveResources(), llvm::ARMBaseInstrInfo::shouldScheduleLoadsNear(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), and llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic().

◆ getMaxNumOperands()

◆ getNodeId()

◆ getNumOperands()

Return the number of values used by this operation.

Definition at line 1024 of file SelectionDAGNodes.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), checkWMMAElementsModifiersF16(), combineConcatVectorOfConcatVectors(), createMMXBuildVector(), llvm::BuildVectorSDNode::getConstantRawBits(), getGluedNode(), llvm::BuildVectorSDNode::getRepeatedSequence(), llvm::BuildVectorSDNode::getRepeatedSequence(), llvm::BuildVectorSDNode::getSplatValue(), llvm::BuildVectorSDNode::getSplatValue(), llvm::BuildVectorSDNode::isConstantSequence(), llvm::BuildVectorSDNode::isConstantSplat(), isF128MovedFromParts(), isValidMtVsrBmi(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), lowerBUILD_VECTORAsBroadCastLoad(), performANDCombine(), performSRACombine(), print(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), reduceBuildVecToShuffleWithZero(), replaceInChain(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), and llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic().

◆ getNumValues()

Return the number of values defined/returned by this operator.

Definition at line 1112 of file SelectionDAGNodes.h.

Referenced by AddCombineTo64bitMLAL(), BURRSort(), getCmp(), getFPBinOp(), getFPTernOp(), llvm::NVPTXDAGToDAGISel::getFromTypeWidthForLoad(), getOutputChainFromCallSeq(), llvm::SelectionDAGBuilder::getValueImpl(), hasAnyUseOfValue(), hasNUsesOfValue(), llvm::SelectionDAGISel::IsLegalToFold(), isMemOPCandidate(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), LowerLoad(), llvm::TargetLowering::LowerOperationWrapper(), narrowExtractedVectorBinOp(), narrowInsertExtractVectorBinOp(), llvm::DAGTypeLegalizer::NoteDeletion(), print_types(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::AVRTargetLowering::ReplaceNodeResults(), scalarizeExtractedBinOp(), llvm::ResourcePriorityQueue::scheduledNode(), and llvm::SelectionDAGISel::SelectCodeCommon().

◆ getOpcode()

Return the SelectionDAG opcode value for this node.

For pre-isel nodes (those for which isMachineOpcode returns false), these are the opcode values in the ISD and ISD namespaces. For post-isel opcodes, see getMachineOpcode.

Definition at line 703 of file SelectionDAGNodes.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddCombineTo64bitUMAAL(), allowARIDWithDisp(), AllowARIIWithZeroDisp(), llvm::RISCVDAGToDAGISel::areOffsetsWithinAlignment(), canEmitConjunction(), canEnableCoalescing(), canLowerSRLToRoundingShiftForVT(), CheckForMaskedLoad(), closestSucc(), CombineANDShift(), combineArithReduction(), combineBallotPattern(), CombineBaseUpdate(), combineBitOpWithShift(), combineShiftOfShiftedLogic(), combineSubShiftToOrcB(), combineToExtendCMOV(), CombineVLDDUP(), combineVqdotAccum(), combineX86SubCmpForFlags(), emitConjunctionRec(), extractPtrauthBlendDiscriminators(), extractPtrauthBlendDiscriminators(), findConsecutiveLoad(), foldAndOrOfSETCC(), foldBinOpIntoSelectIfProfitable(), foldBinOpIntoSelectIfProfitable(), llvm::SelectionDAG::FoldSymbolOffset(), getARMIndexedAddressParts(), llvm::AtomicSDNode::getBasePtr(), llvm::MemSDNode::getBasePtr(), llvm::VPBaseLoadStoreSDNode::getBasePtr(), llvm::VPGatherScatterSDNode::getBasePtr(), llvm::getBitwiseNotOperand(), getConstantLaneNumOfExtractHalfOperand(), llvm::AtomicSDNode::getExtensionType(), llvm::VPGatherScatterSDNode::getIndex(), llvm::MaskedLoadStoreSDNode::getMask(), llvm::VPBaseLoadStoreSDNode::getMask(), llvm::VPGatherScatterSDNode::getMask(), getMemVTFromNode(), getMVEIndexedAddressParts(), llvm::SelectionDAG::getNode(), getNormalLoadInput(), llvm::LSBaseSDNode::getOffset(), llvm::MaskedLoadStoreSDNode::getOffset(), llvm::VPBaseLoadStoreSDNode::getOffset(), getOperationName(), llvm::VPGatherScatterSDNode::getScale(), getT2IndexedAddressParts(), GetTLSADDR(), llvm::AtomicSDNode::getVal(), llvm::VPBaseLoadStoreSDNode::getVectorLength(), llvm::VPGatherScatterSDNode::getVectorLength(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), isAddSubOrSubAdd(), isBitfieldExtractOpFromAnd(), llvm::AtomicSDNode::isCompareAndSwap(), llvm::ARMTargetLowering::isDesirableToCommuteWithShift(), llvm::RISCVTargetLowering::isDesirableToCommuteWithShift(), isExtendedBUILD_VECTOR(), isFloatingPointZero(), llvm::isLegalAVL(), isMemOPCandidate(), isNoUnsignedWrap(), isNoUnsignedWrap(), isVPOpcode(), llvm::HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(), llvm::VETargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_64(), lowerCallFromStatepointLoweringInfo(), lowerLaneOp(), LowerMUL(), LowerVECTOR_SHUFFLE(), llvm::EmptyMatchContext::match(), llvm::VPMatchContext::match(), llvm::SelectionDAG::matchBinOpReduction(), matchSetCC(), matchSetCC(), narrowIndex(), ParseBFI(), PerformADDVecReduce(), performANDCombine(), PerformARMBUILD_VECTORCombine(), performBuildVectorCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), PerformExtractEltCombine(), PerformExtractEltToVMOVRRD(), PerformExtractFpToIntStores(), performExtractVectorEltCombine(), performINSERT_VECTOR_ELTCombine(), performMADD_MSUBCombine(), performMemPairCombine(), PerformMinMaxCombine(), performMOVFR2GR_SCombine(), performMulCombine(), performMulRdsvlCombine(), performORCombine(), performSETCCCombine(), performSetCCPunpkCombine(), performSPLIT_PAIR_F64Combine(), PerformSplittingMVETruncToNarrowingStores(), PerformSplittingToNarrowingStores(), performSRACombine(), PerformSTORECombine(), PerformSUBCombine(), performSubWithBorrowCombine(), PerformUMLALCombine(), PerformVCMPCombine(), PerformVECREDUCE_ADDCombine(), performVecReduceAddCombineWithUADDLP(), performVectorDeinterleaveCombine(), PerformVMOVhrCombine(), PerformVMOVNCombine(), PerformVMOVrhCombine(), PerformXORCombine(), performXORCombine(), promoteExtBeforeAdd(), reduceBuildVecToShuffleWithZero(), refinePtrAS(), replaceInChain(), resetVRegCycle(), scalarizeExtEltFP(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::RISCVDAGToDAGISel::selectShiftMask(), shouldCombineToPostInc(), simplifyMul24(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), stripModuloOnShift(), transformAddImmMulImm(), transformAddShlImm(), tryCombineMULLWithUZP1(), tryMemPairCombine(), tryToFoldExtendOfConstant(), tryToFoldExtendSelectLoad(), tryToWidenSetCCOperands(), widenAbs(), widenBuildVec(), and widenCtPop().

◆ getOperand()

Definition at line 1045 of file SelectionDAGNodes.h.

References assert().

Referenced by accumulateOffset(), AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddCombineTo64BitSMLAL16(), AddCombineTo64bitUMAAL(), AddCombineToVPADD(), llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::X86InstrInfo::areLoadsFromSameBasePtr(), CanCombineFCOPYSIGN_EXTEND_ROUND(), canEmitConjunction(), canLowerSRLToRoundingShiftForVT(), checkBoolTestAndOrSetCCCombine(), checkWMMAElementsModifiersF16(), CombineANDShift(), combineAndShuffleNot(), combineArithReduction(), combineBasicSADPattern(), combineCCMask(), combineCompareEqual(), combineConcatVectorOfShuffleAndItsOperands(), combineEXTRACT_SUBVECTOR(), combineFaddCFmul(), combineMaskedLoadConstantMask(), combineSext(), combineShiftAnd1ToBitTest(), combineShiftOfShiftedLogic(), combineShlAddIAddImpl(), combineShuffleOfBitcast(), combineShuffleOfScalars(), combineShuffleOfSplatVal(), combineShuffleToAnyExtendVectorInreg(), combineShuffleToZeroExtendVectorInReg(), combineStore(), combineSubShiftToOrcB(), combineToExtendCMOV(), combineTruncationShuffle(), combineTruncToVnclip(), combineVectorCompareAndMaskUnaryOp(), CombineVLDDUP(), CombineVMOVDRRCandidateWithVecOp(), combineVPDPBUSDPattern(), combineVqdotAccum(), combineVWADDSUBWSelect(), combineZext(), createMMXBuildVector(), emitConjunctionRec(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), extractPtrauthBlendDiscriminators(), extractPtrauthBlendDiscriminators(), foldAddSubMasked1(), foldBinOpIntoSelectIfProfitable(), foldBinOpIntoSelectIfProfitable(), foldCSELOfCSEL(), foldOverflowCheck(), foldSelectOfCTTZOrCTLZ(), foldShuffleOfConcatUndefs(), formSplatFromShuffles(), llvm::getAnnotatedNodeAVL(), getARMIndexedAddressParts(), llvm::AtomicSDNode::getBasePtr(), llvm::LoadSDNode::getBasePtr(), llvm::MaskedGatherScatterSDNode::getBasePtr(), llvm::MaskedHistogramSDNode::getBasePtr(), llvm::MaskedLoadSDNode::getBasePtr(), llvm::MaskedStoreSDNode::getBasePtr(), llvm::MemSDNode::getBasePtr(), llvm::StoreSDNode::getBasePtr(), llvm::VPBaseLoadStoreSDNode::getBasePtr(), llvm::VPGatherScatterSDNode::getBasePtr(), llvm::VPLoadFFSDNode::getBasePtr(), llvm::VPLoadSDNode::getBasePtr(), llvm::VPStoreSDNode::getBasePtr(), llvm::VPStridedLoadSDNode::getBasePtr(), llvm::VPStridedStoreSDNode::getBasePtr(), llvm::X86MaskedGatherScatterSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getCommutedVectorShuffle(), getConstantLaneNumOfExtractHalfOperand(), getConstantOperandAPInt(), getConstantOperandVal(), llvm::BuildVectorSDNode::getConstantRawBits(), llvm::LifetimeSDNode::getFrameIndex(), getGluedNode(), getHopForBuildVector(), llvm::MaskedHistogramSDNode::getInc(), llvm::MaskedGatherScatterSDNode::getIndex(), llvm::MaskedHistogramSDNode::getIndex(), llvm::VPGatherScatterSDNode::getIndex(), llvm::X86MaskedGatherScatterSDNode::getIndex(), llvm::MaskedHistogramSDNode::getIntID(), getKnownUndefForVectorBinop(), llvm::MaskedGatherScatterSDNode::getMask(), llvm::MaskedHistogramSDNode::getMask(), llvm::MaskedLoadSDNode::getMask(), llvm::MaskedLoadStoreSDNode::getMask(), llvm::MaskedStoreSDNode::getMask(), llvm::VPBaseLoadStoreSDNode::getMask(), llvm::VPGatherScatterSDNode::getMask(), llvm::VPLoadFFSDNode::getMask(), llvm::VPLoadSDNode::getMask(), llvm::VPStoreSDNode::getMask(), llvm::VPStridedLoadSDNode::getMask(), llvm::VPStridedStoreSDNode::getMask(), llvm::X86MaskedGatherScatterSDNode::getMask(), getMemVTFromNode(), getMVEIndexedAddressParts(), getNormalLoadInput(), llvm::LoadSDNode::getOffset(), llvm::LSBaseSDNode::getOffset(), llvm::MaskedLoadSDNode::getOffset(), llvm::MaskedLoadStoreSDNode::getOffset(), llvm::MaskedStoreSDNode::getOffset(), llvm::StoreSDNode::getOffset(), llvm::VPBaseLoadStoreSDNode::getOffset(), llvm::VPLoadSDNode::getOffset(), llvm::VPStoreSDNode::getOffset(), llvm::VPStridedLoadSDNode::getOffset(), llvm::VPStridedStoreSDNode::getOffset(), getOneTrueElt(), llvm::SDValue::getOperand(), getOperationName(), llvm::MaskedGatherSDNode::getPassThru(), llvm::MaskedLoadSDNode::getPassThru(), llvm::X86MaskedGatherSDNode::getPassThru(), llvm::BuildVectorSDNode::getRepeatedSequence(), llvm::MaskedGatherScatterSDNode::getScale(), llvm::MaskedHistogramSDNode::getScale(), llvm::VPGatherScatterSDNode::getScale(), llvm::X86MaskedGatherScatterSDNode::getScale(), getShuffleScalarElt(), llvm::BuildVectorSDNode::getSplatValue(), llvm::VPStridedLoadSDNode::getStride(), llvm::VPStridedStoreSDNode::getStride(), getT2IndexedAddressParts(), getUnderlyingExtractedFromVec(), getUsefulBitsForUse(), llvm::AtomicSDNode::getVal(), llvm::MaskedScatterSDNode::getValue(), llvm::MaskedStoreSDNode::getValue(), llvm::StoreSDNode::getValue(), llvm::VPScatterSDNode::getValue(), llvm::VPStoreSDNode::getValue(), llvm::VPStridedStoreSDNode::getValue(), llvm::X86MaskedScatterSDNode::getValue(), llvm::VPBaseLoadStoreSDNode::getVectorLength(), llvm::VPGatherScatterSDNode::getVectorLength(), llvm::VPLoadFFSDNode::getVectorLength(), llvm::VPLoadSDNode::getVectorLength(), llvm::VPStoreSDNode::getVectorLength(), llvm::VPStridedLoadSDNode::getVectorLength(), llvm::VPStridedStoreSDNode::getVectorLength(), llvm::SelectionDAG::getVectorShuffle(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), haveEfficientBuildVectorPattern(), incDecVectorConstant(), isAddSubOrSubAdd(), isAddSubOrSubAdd(), isAllConstantBuildVector(), isBitfieldExtractOpFromAnd(), llvm::BuildVectorSDNode::isConstantSequence(), llvm::BuildVectorSDNode::isConstantSplat(), llvm::X86TargetLowering::isDesirableToCombineLogicOpOfSETCC(), llvm::ARMTargetLowering::isDesirableToCommuteWithShift(), llvm::RISCVTargetLowering::isDesirableToCommuteWithShift(), isExtendedBUILD_VECTOR(), isF128MovedFromParts(), isFloatingPointZero(), isFusableLoadOpStorePattern(), isFusableLoadOpStorePattern(), isHopBuildVector(), llvm::SelectionDAG::isKnownToBeAPowerOfTwo(), isMemOPCandidate(), llvm::HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), lowerBitreverseShuffle(), lowerBUILD_VECTORAsBroadCastLoad(), lowerBuildVectorAsBlend(), LowerBuildVectorv4x32(), lowerCallFromStatepointLoweringInfo(), lowerDisjointIndicesShuffle(), lowerLaneOp(), LowerMLOAD(), LowerMUL(), lowerShuffleViaVRegSplitting(), LowerToHorizontalOp(), LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLEAsRotate(), lowerVECTOR_SHUFFLEAsVRGatherVX(), llvm::SelectionDAG::matchBinOpReduction(), matchPMADDWD(), MergeInputChains(), narrowExtractedVectorSelect(), narrowShuffle(), nodesHaveSameOperandValue(), llvm::SDNodeIterator::operator*(), ParseBFI(), peekThroughBitcasts(), PerformADDCombineWithOperands(), PerformADDVecReduce(), performANDCombine(), PerformARMBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformBRCONDCombine(), performBuildShuffleExtendCombine(), performBuildVectorCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformExtractEltCombine(), performExtractVectorEltCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), PerformHWLoopCombine(), performINSERT_VECTOR_ELTCombine(), performLDNT1Combine(), performMADD_MSUBCombine(), performMemPairCombine(), PerformMinMaxCombine(), performMULCombine(), performMulCombine(), performMulRdsvlCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), PerformORCombine(), performORCombine(), performORCombine(), PerformORCombineToSMULWBT(), PerformREMCombine(), PerformSELECTCombine(), performSetccAddFolding(), performSETCCCombine(), performSetCCPunpkCombine(), PerformShiftCombine(), performSHLCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), performSignExtendCombine(), performSignExtendInRegCombine(), performSignExtendSetCCCombine(), PerformSplittingMVETruncToNarrowingStores(), PerformSplittingToNarrowingStores(), performSRACombine(), performSRLCombine(), performSTNT1Combine(), PerformSTORECombine(), PerformSUBCombine(), performSubsToAndsCombine(), performSVEAndCombine(), performSVEMulAddSubCombine(), PerformUMLALCombine(), PerformVECREDUCE_ADDCombine(), performVecReduceAddCombineWithUADDLP(), performVectorDeinterleaveCombine(), PerformVMOVhrCombine(), PerformVMOVNCombine(), PerformVMOVrhCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), performVSelectCombine(), PerformXORCombine(), performXORCombine(), print(), promoteExtBeforeAdd(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), ReconstructShuffleWithRuntimeMask(), reduceBuildVecToShuffleWithZero(), refinePtrAS(), replaceAtomicSwap128(), replaceInChain(), scalarizeExtEltFP(), scalarizeExtractedBinOp(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::AMDGPUDAGToDAGISel::SelectVectorShuffle(), simplifyMul24(), llvm::TargetLowering::SimplifySetCC(), simplifyShuffleOfShuffle(), SkipExtensionForVMULL(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), stripModuloOnShift(), transformAddImmMulImm(), transformAddShlImm(), tryBitfieldInsertOpFromOr(), tryBuildVectorShuffle(), tryCombineMULLWithUZP1(), tryLowerToBSL(), tryToConvertShuffleOfTbl2ToTbl4(), tryToFoldExtendOfConstant(), widenAbs(), widenBuildVec(), widenBuildVector(), and widenCtPop().

◆ getOperationName()

Return the opcode of this operation for printing.

Definition at line 58 of file SelectionDAGDumper.cpp.

References llvm::ISD::ABDS, llvm::ISD::ABDU, llvm::ISD::ABS, llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::ADDE, llvm::ISD::ADDROFRETURNADDR, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::ANY_EXTEND_VECTOR_INREG, llvm::ISD::AssertAlign, llvm::ISD::AssertNoFPClass, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::AVGCEILS, llvm::ISD::AVGCEILU, llvm::ISD::AVGFLOORS, llvm::ISD::AVGFLOORU, llvm::ISD::BasicBlock, llvm::ISD::BITREVERSE, llvm::ISD::BlockAddress, llvm::ISD::BSWAP, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::ISD::CARRY_FALSE, llvm::cast(), llvm::ISD::CLEAR_CACHE, llvm::ISD::CONCAT_VECTORS, llvm::ISD::CONDCODE, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::ISD::ConstantPool, llvm::ISD::CopyFromReg, llvm::ISD::CopyToReg, llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::ISD::DELETED_NODE, llvm::ISD::EH_DWARF_CFA, llvm::ISD::EH_RETURN, llvm::ISD::EH_SJLJ_LONGJMP, llvm::ISD::EH_SJLJ_SETJMP, llvm::ISD::EH_SJLJ_SETUP_DISPATCH, llvm::ISD::EntryToken, llvm::ISD::ExternalSymbol, llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FADD, llvm::ISD::FCANONICALIZE, llvm::ISD::FCOPYSIGN, llvm::ISD::FDIV, llvm::ISD::FGETSIGN, llvm::ISD::FMA, llvm::ISD::FMAD, llvm::ISD::FMUL, llvm::ISD::FMULADD, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_SINT_SAT, llvm::ISD::FP_TO_UINT, llvm::ISD::FP_TO_UINT_SAT, llvm::ISD::FPTRUNC_ROUND, llvm::ISD::FRAME_TO_ARGS_OFFSET, llvm::ISD::FRAMEADDR, llvm::ISD::FrameIndex, llvm::ISD::FREEZE, llvm::ISD::FREM, llvm::ISD::FSHL, llvm::ISD::FSHR, llvm::ISD::FSUB, G, llvm::get(), llvm::ISD::GET_ROUNDING, getAsZExtVal(), llvm::Intrinsic::getBaseName(), getMachineOpcode(), getOpcode(), getOperand(), llvm::SelectionDAGTargetInfo::getTargetNodeName(), llvm::TargetLowering::getTargetNodeName(), llvm::ISD::GLOBAL_OFFSET_TABLE, llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::ISD::IS_FPCLASS, isMachineOpcode(), llvm::ISD::JumpTable, llvm_unreachable, llvm::ISD::LOCAL_RECOVER, llvm::ISD::LOOP_DEPENDENCE_RAW_MASK, llvm::ISD::LOOP_DEPENDENCE_WAR_MASK, llvm::ISD::MCSymbol, llvm::ISD::MERGE_VALUES, llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, llvm::ISD::OR, llvm::ISD::PARITY, llvm::ISD::POISON, llvm::ISD::PtrAuthGlobalAddress, llvm::ISD::READ_REGISTER, llvm::ISD::Register, llvm::ISD::RegisterMask, llvm::ISD::RETURNADDR, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDO, llvm::ISD::SADDO_CARRY, llvm::ISD::SADDSAT, llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SCMP, llvm::ISD::SDIV, llvm::ISD::SDIVFIX, llvm::ISD::SDIVFIXSAT, llvm::ISD::SDIVREM, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, SelectionDAG, llvm::ISD::SETCC, llvm::ISD::SETCCCARRY, llvm::ISD::SETEQ, llvm::ISD::SETFALSE, llvm::ISD::SETFALSE2, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETTRUE, llvm::ISD::SETTRUE2, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, llvm::ISD::SHL, llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ISD::SINT_TO_FP, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMUL_LOHI, llvm::ISD::SMULFIX, llvm::ISD::SMULFIXSAT, llvm::ISD::SMULO, llvm::ISD::SPLAT_VECTOR, llvm::ISD::SPLAT_VECTOR_PARTS, llvm::ISD::SPONENTRY, llvm::ISD::SRA, llvm::ISD::SRA_PARTS, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SRL_PARTS, llvm::ISD::SSHLSAT, llvm::ISD::SSUBO, llvm::ISD::SSUBO_CARRY, llvm::ISD::SSUBSAT, llvm::ISD::STEP_VECTOR, llvm::StringRef::str(), llvm::ISD::STRICT_FACOS, llvm::ISD::STRICT_FADD, llvm::ISD::STRICT_FASIN, llvm::ISD::STRICT_FATAN, llvm::ISD::STRICT_FATAN2, llvm::ISD::STRICT_FCEIL, llvm::ISD::STRICT_FCOS, llvm::ISD::STRICT_FCOSH, llvm::ISD::STRICT_FDIV, llvm::ISD::STRICT_FEXP, llvm::ISD::STRICT_FEXP2, llvm::ISD::STRICT_FFLOOR, llvm::ISD::STRICT_FLDEXP, llvm::ISD::STRICT_FLOG, llvm::ISD::STRICT_FLOG10, llvm::ISD::STRICT_FLOG2, llvm::ISD::STRICT_FMA, llvm::ISD::STRICT_FMAXIMUM, llvm::ISD::STRICT_FMAXNUM, llvm::ISD::STRICT_FMINIMUM, llvm::ISD::STRICT_FMINNUM, llvm::ISD::STRICT_FMUL, llvm::ISD::STRICT_FNEARBYINT, llvm::ISD::STRICT_FP_EXTEND, llvm::ISD::STRICT_FP_ROUND, llvm::ISD::STRICT_FP_TO_SINT, llvm::ISD::STRICT_FP_TO_UINT, llvm::ISD::STRICT_FPOW, llvm::ISD::STRICT_FPOWI, llvm::ISD::STRICT_FREM, llvm::ISD::STRICT_FRINT, llvm::ISD::STRICT_FROUND, llvm::ISD::STRICT_FROUNDEVEN, llvm::ISD::STRICT_FSETCC, llvm::ISD::STRICT_FSETCCS, llvm::ISD::STRICT_FSIN, llvm::ISD::STRICT_FSINH, llvm::ISD::STRICT_FSQRT, llvm::ISD::STRICT_FSUB, llvm::ISD::STRICT_FTAN, llvm::ISD::STRICT_FTANH, llvm::ISD::STRICT_FTRUNC, llvm::ISD::STRICT_LLRINT, llvm::ISD::STRICT_LLROUND, llvm::ISD::STRICT_LRINT, llvm::ISD::STRICT_LROUND, llvm::ISD::STRICT_SINT_TO_FP, llvm::ISD::STRICT_UINT_TO_FP, llvm::ISD::SUB, llvm::ISD::SUBC, llvm::ISD::SUBE, llvm::ISD::TargetBlockAddress, llvm::ISD::TargetConstant, llvm::ISD::TargetConstantFP, llvm::ISD::TargetConstantPool, llvm::ISD::TargetExternalSymbol, llvm::ISD::TargetFrameIndex, llvm::ISD::TargetGlobalAddress, llvm::ISD::TargetGlobalTLSAddress, llvm::ISD::TargetIndex, llvm::ISD::TargetJumpTable, TII, llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, llvm::ISD::TRUNCATE_SSAT_S, llvm::ISD::TRUNCATE_SSAT_U, llvm::ISD::TRUNCATE_USAT_U, llvm::ISD::UADDO, llvm::ISD::UADDO_CARRY, llvm::ISD::UADDSAT, llvm::ISD::UCMP, llvm::ISD::UDIV, llvm::ISD::UDIVFIX, llvm::ISD::UDIVFIXSAT, llvm::ISD::UDIVREM, llvm::ISD::UINT_TO_FP, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMUL_LOHI, llvm::ISD::UMULFIX, llvm::ISD::UMULFIXSAT, llvm::ISD::UMULO, llvm::ISD::UNDEF, llvm::ISD::UREM, llvm::ISD::USHLSAT, llvm::ISD::USUBO, llvm::ISD::USUBO_CARRY, llvm::ISD::USUBSAT, llvm::utostr(), llvm::ISD::VALUETYPE, llvm::ISD::VECTOR_COMPRESS, llvm::ISD::VECTOR_DEINTERLEAVE, llvm::ISD::VECTOR_INTERLEAVE, llvm::ISD::VECTOR_REVERSE, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VECTOR_SPLICE, llvm::ISD::VSELECT, llvm::ISD::WRITE_REGISTER, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.

Referenced by printr().

◆ getSDVTList()

◆ getSimpleValueType()

Return the type of a specified result as a simple type.

Definition at line 1121 of file SelectionDAGNodes.h.

References llvm::EVT::getSimpleVT(), and getValueType().

Referenced by combineLoad(), getHopForBuildVector(), incDecVectorConstant(), isAddSubOrSubAdd(), isHopBuildVector(), lowerBitreverseShuffle(), lowerBUILD_VECTORAsBroadCastLoad(), lowerBuildVectorAsBlend(), lowerBuildVectorAsBroadcast(), lowerDisjointIndicesShuffle(), lowerShuffleViaVRegSplitting(), lowerToAddSubOrFMAddSub(), LowerToHorizontalOp(), lowerVECTOR_SHUFFLEAsVRGatherVX(), narrowExtractedVectorSelect(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::RISCVDAGToDAGISel::Select(), llvm::RISCVDAGToDAGISel::selectScalarFPAsInt(), and widenBuildVector().

◆ getValueSizeInBits()

◆ getValueType()

Return the type of a specified result.

Definition at line 1115 of file SelectionDAGNodes.h.

References assert().

Referenced by AddCombineTo64bitMLAL(), AdjustLength(), CanCombineFCOPYSIGN_EXTEND_ROUND(), combineADDToMAT_PCREL_ADDR(), combineArithReduction(), combineBasicSADPattern(), combineCarryDiamond(), combineConstantPoolLoads(), combineLoad(), combineMinMaxReduction(), combinePredicateReduction(), combineShiftOfShiftedLogic(), combineShuffleOfBitcast(), combineShuffleOfScalars(), combineShuffleOfSplatVal(), combineShuffleToAnyExtendVectorInreg(), combineShuffleToZeroExtendVectorInReg(), combineToExtendCMOV(), combineTruncate(), combineTruncationShuffle(), combineUADDO_CARRYDiamond(), combineVectorCompareAndMaskUnaryOp(), CombineVMOVDRRCandidateWithVecOp(), combineVPDPBUSDPattern(), combineX86SubCmpForFlags(), Expand64BitShift(), foldBinOpIntoSelectIfProfitable(), foldBinOpIntoSelectIfProfitable(), llvm::SelectionDAG::FoldConstantBuildVector(), foldShuffleOfConcatUndefs(), formSplatFromShuffles(), llvm::SelectionDAG::getCommutedVectorShuffle(), llvm::BuildVectorSDNode::getConstantRawBits(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getGluedNode(), llvm::ShuffleVectorSDNode::getMask(), llvm::ShuffleVectorSDNode::getMaskElt(), getMemVTFromNode(), getOneTrueElt(), getSimpleValueType(), llvm::PPC::getSplatIdxForPPCMnemonics(), GetTLSADDR(), getValueSizeInBits(), incDecVectorConstant(), INITIALIZE_PASS(), isAddCarryChain(), isAllConstantBuildVector(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromShr(), llvm::BuildVectorSDNode::isConstantSequence(), llvm::BuildVectorSDNode::isConstantSplat(), llvm::isConstOrConstSplat(), isExtendedBUILD_VECTOR(), isHalvingTruncateAndConcatOfLegalIntScalableType(), llvm::SelectionDAGISel::IsLegalToFold(), isSaturatingMinMax(), isSubBorrowChain(), isValidMtVsrBmi(), lookThroughSignExtension(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), lowerDSPIntr(), lowerMSACopyIntr(), llvm::SystemZTargetLowering::LowerOperationWrapper(), LowerToTLSExecModel(), LowerToTLSLocalDynamicModel(), lowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLEAsRotate(), narrowExtractedVectorLoad(), narrowShuffle(), performAddUADDVCombine(), performANDORCSELCombine(), performCONDCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performEXTRACT_VECTOR_ELTCombine(), PerformExtractEltToVMOVRRD(), performINTRINSIC_WO_CHAINCombine(), performMADD_MSUBCombine(), PerformMinMaxFpToSatCombine(), performSetccAddFolding(), performSETCCCombine(), performSetCCPunpkCombine(), performSignExtendSetCCCombine(), performSubsToAndsCombine(), performSunpkloCombine(), performSVEAndCombine(), PerformVECREDUCE_ADDCombine(), performVecReduceAddCombineWithUADDLP(), performVECTOR_SHUFFLECombine(), PerformVMOVRRDCombine(), performVP_STORECombine(), performVSELECTCombine(), PerformXORCombine(), print_types(), promoteExtBeforeAdd(), reduceBuildVecToShuffleWithZero(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::SparcTargetLowering::ReplaceNodeResults(), resolveBuildVector(), scalarizeExtEltFP(), scalarizeExtractedBinOp(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), tryBuildVectorShuffle(), llvm::RISCVDAGToDAGISel::tryIndexedLoad(), trySimplifySrlAddToRshrnb(), tryToFoldExtendOfConstant(), tryToFoldExtOfMaskedLoad(), tryToWidenSetCCOperands(), widenAbs(), widenBuildVec(), and widenCtPop().

◆ getVTList()

Definition at line 1073 of file SelectionDAGNodes.h.

References X.

Referenced by combineAdd(), combineAddOrSubToADCOrSBB(), combineCarryDiamond(), combineCarryThroughADD(), combineSub(), combineUADDO_CARRYDiamond(), llvm::NVPTXTargetLowering::LowerCall(), performANDCombine(), performCONDCombine(), performSRACombine(), performSubsToAndsCombine(), and simplifyMul24().

◆ hasAnyUseOfValue()

◆ hasNUsesOfValue()

◆ hasOneUse()

Return true if there is exactly one use of this node.

Definition at line 775 of file SelectionDAGNodes.h.

References llvm::hasSingleElement(), and uses().

Referenced by combineAdd(), combineAddOrSubToADCOrSBB(), combineAnd(), combineAndnp(), CombineANDShift(), combineCarryThroughADD(), combineSelectAndUseCommutative(), combineSelectAndUseCommutative(), combineSetCC(), combineSetCCMOVMSK(), combineShuffleOfScalars(), combineSub(), combineTargetShuffle(), combineVectorShiftImm(), emitConjunctionRec(), getBT(), getPostIndexedLoadStoreOp(), GetTLSADDR(), isAddSubOrSubAdd(), isAddSubSExt(), isAddSubSExt(), isAddSubZExt(), isAddSubZExt(), IsCMPZCSINC(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), llvm::AMDGPUTargetLowering::isDesirableToCommuteWithShift(), llvm::ARMTargetLowering::isDesirableToCommuteWithShift(), llvm::RISCVTargetLowering::isDesirableToCommuteWithShift(), llvm::TargetLowering::isDesirableToCommuteWithShift(), isF128MovedFromParts(), isI128MovedFromParts(), isLoadOrMultipleLoads(), lower1BitShuffle(), matchBSwapHWordOrAndAnd(), narrowIndex(), PerformADDCombineWithOperands(), PerformADDCombineWithOperands(), performANDORCSELCombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), PerformExtractEltToVMOVRRD(), performMulCombine(), performNegCMovCombine(), performNegCSelCombine(), PerformSTORECombine(), PerformSUBCombine(), PerformSUBCombine(), performVANDNCombine(), PerformVMOVRRDCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), transformAddImmMulImm(), transformAddShlImm(), tryCombineMULLWithUZP1(), and TryDistrubutionADDVecReduce().

◆ hasPoisonGeneratingFlags()

◆ hasPredecessor()

◆ hasPredecessorHelper()

Returns true if N is a predecessor of any node in Worklist.

This helper keeps Visited and Worklist sets externally to allow unions searches to be performed in parallel, caching of results across queries and incremental addition to Worklist. Stops early if N is found but will resume. Remember to clear Visited and Worklists if DAG changes. MaxSteps gives a maximum number of nodes to visit before giving up. The TopologicalPrune flag signals that positive NodeIds are topologically ordered (Operands have strictly smaller node id) and search can be pruned leveraging this.

Definition at line 964 of file SelectionDAGNodes.h.

References llvm::SmallVectorImpl< T >::append(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::SmallPtrSetImpl< PtrType >::count(), llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::SmallPtrSetImpl< PtrType >::insert(), MaxSteps, N, op_values(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), SDNode(), llvm::SmallPtrSetImplBase::size(), and llvm::ISD::TokenFactor.

Referenced by canFoldStoreIntoLibCallOutputPointers(), findNonImmUse(), getPostIndexedLoadStoreOp(), HandleMergeInputChains(), hasPredecessor(), isFusableLoadOpStorePattern(), isFusableLoadOpStorePattern(), isValidBaseUpdate(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), shouldCombineToPostInc(), and tryMemPairCombine().

◆ intersectFlagsWith()

Clear any flags in this node that aren't also set in Flags.

If Flags is not in a defined state then this has no effect.

Definition at line 13192 of file SelectionDAG.cpp.

◆ isAnyAdd()

◆ isAssert()

◆ isDivergent()

Definition at line 769 of file SelectionDAGNodes.h.

References SDNodeBits.

Referenced by llvm::SITargetLowering::isEligibleForTailCallOptimization(), llvm::SITargetLowering::isReassocProfitable(), llvm::SITargetLowering::LowerCall(), llvm::SITargetLowering::PostISelFolding(), print(), print_details(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), and llvm::SITargetLowering::shouldExpandVectorDynExt().

◆ isMachineOpcode()

Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.

Definition at line 756 of file SelectionDAGNodes.h.

Referenced by llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::X86InstrInfo::areLoadsFromSameBasePtr(), getMachineOpcode(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::TargetInstrInfo::getOperandLatency(), getOperationName(), getUsefulBitsForUse(), llvm::ResourcePriorityQueue::isResourceAvailable(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::ResourcePriorityQueue::regPressureDelta(), llvm::ResourcePriorityQueue::reserveResources(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), and usesAllOnesMask().

◆ isMemIntrinsic()

◆ isOnlyUserOf()

◆ isOperandOf()

◆ isPredecessorOf()

◆ isStrictFPOpcode()

◆ isTargetOpcode()

◆ isUndef()

Returns true if the node type is UNDEF or POISON.

Definition at line 710 of file SelectionDAGNodes.h.

References llvm::ISD::POISON, and llvm::ISD::UNDEF.

Referenced by combineBinOpToReduce(), ExpandHorizontalBinOp(), llvm::BuildVectorSDNode::getRepeatedSequence(), llvm::BuildVectorSDNode::getSplatValue(), LowerToHorizontalOp(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv8i8(), llvm::VETargetLowering::lowerVVP_GATHER_SCATTER(), llvm::VETargetLowering::lowerVVP_LOAD_STORE(), llvm::RISCVTargetLowering::PerformDAGCombine(), performSPLIT_PAIR_F64Combine(), performUnpackCombine(), and PerformVMOVNCombine().

◆ isVPOpcode()

◆ op_begin()

◆ op_end()

◆ op_values()

Definition at line 1068 of file SelectionDAGNodes.h.

References llvm::make_range(), op_begin(), and op_end().

Referenced by combineX86SubCmpForFlags(), findNonImmUse(), llvm::SelectionDAG::FoldConstantBuildVector(), hasPredecessorHelper(), llvm::BuildVectorSDNode::isConstant(), llvm::SelectionDAG::isUndef(), isValidMtVsrBmi(), LowerToHorizontalOp(), performExtBinopLoadFold(), performVSelectCombine(), and widenBuildVec().

◆ ops()

Definition at line 1054 of file SelectionDAGNodes.h.

References llvm::ArrayRef(), op_begin(), and op_end().

Referenced by canFoldStoreIntoLibCallOutputPointers(), combineBitcast(), combineConcatVectorOfShuffleAndItsOperands(), combineEXTRACT_SUBVECTOR(), combineShuffleToZeroExtendVectorInReg(), combineStore(), ExtendToType(), extractSubVector(), extractSubVector(), findConsecutiveLoad(), insert1BitVector(), isFusableLoadOpStorePattern(), isFusableLoadOpStorePattern(), llvm::SelectionDAG::isKnownToBeAPowerOfTwo(), lowerBuildVectorAsBlend(), LowerShift(), mergeEltWithShuffle(), narrowIndex(), performBuildShuffleExtendCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), performINSERT_VECTOR_ELTCombine(), replaceAtomicSwap128(), scalarizeExtEltFP(), and widenSubVector().

◆ print()

◆ print_details()

Definition at line 680 of file SelectionDAGDumper.cpp.

References A(), llvm::dyn_cast(), llvm::ISD::EXTLOAD, G, getFlags(), getHasDebugValue(), getIndexedModeName(), getIROrder(), llvm::Value::getName(), getNodeId(), hasNoSignedWrap(), hasNoUnsignedWrap(), llvm::APFloatBase::IEEEdouble(), llvm::APFloatBase::IEEEsingle(), llvm::isa(), isDivergent(), N, printMemOperand(), llvm::printReg(), Scaled, SelectionDAG, llvm::ISD::SEXTLOAD, llvm::Signed, VerboseDAGDumping, and llvm::ISD::ZEXTLOAD.

Referenced by printr().

◆ print_types()

◆ printr()

◆ printrFull()

◆ printrWithDepth()

◆ Profile()

◆ setCFIType()

◆ setCombinerWorklistIndex()

◆ setDebugLoc()

Set source location info.

Try to avoid this, putting it in the constructor is preferable.

Definition at line 804 of file SelectionDAGNodes.h.

◆ setFlags()

◆ setHasDebugValue()

◆ setIROrder()

◆ setNodeId()

◆ use_begin()

◆ use_empty()

◆ use_end()

◆ use_size()

◆ user_begin()

◆ user_end()

◆ users() [1/2]

Definition at line 907 of file SelectionDAGNodes.h.

References llvm::make_range(), user_begin(), and user_end().

Referenced by llvm::AMDGPUTargetLowering::addTokenForArgument(), adjustForLTGFR(), llvm::RISCVDAGToDAGISel::areOffsetsWithinAlignment(), combineBROADCAST_LOAD(), combineConstantPoolLoads(), combineExtractVectorElt(), combineLoad(), combineShiftToMULH(), findConsecutiveLoad(), hasVolatileUser(), isHorizontalBinOp(), isOnlyUsedByStores(), isWorthFoldingSHL(), lowerShufflePairAsUNPCKAndPermute(), mayBeSRetTailCallCompatible(), narrowBitOpRMW(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformExtractEltToVMOVRRD(), PerformFADDCombineWithOperands(), llvm::AMDGPUTargetLowering::performFNegCombine(), performGlobalAddressCombine(), PerformREMCombine(), performSRACombine(), promoteExtBeforeAdd(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), tryCombineMULLWithUZP1(), tryToFoldExtOfLoad(), and useSinCos().

◆ users() [2/2]

◆ uses() [1/2]

Definition at line 895 of file SelectionDAGNodes.h.

References llvm::make_range(), use_begin(), and use_end().

Referenced by CombineBaseUpdate(), combineTruncate(), CombineVLDDUP(), ExtendUsesToFormExtLoad(), getGluedUser(), getPostIndexedLoadStoreOp(), hasAnyUseOfValue(), hasNUsesOfValue(), hasOneUse(), performExtractVectorEltCombine(), performMemPairCombine(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), and llvm::SelectionDAGISel::SelectCodeCommon().

◆ uses() [2/2]

◆ value_begin()

◆ value_end()

◆ values()

◆ HandleSDNode

◆ SelectionDAG

Definition at line 653 of file SelectionDAGNodes.h.

References SelectionDAG.

Referenced by dump(), dumpr(), dumprFull(), dumprWithDepth(), getOperationName(), print(), print_details(), print_types(), printr(), printrFull(), printrWithDepth(), and SelectionDAG.

◆ [union]

◆ ConstantSDNodeBits

◆ LoadSDNodeBits

Definition at line 627 of file SelectionDAGNodes.h.

Referenced by llvm::AtomicSDNode::AtomicSDNode(), llvm::AtomicSDNode::getExtensionType(), llvm::LoadSDNode::getExtensionType(), llvm::MaskedGatherSDNode::getExtensionType(), llvm::MaskedLoadSDNode::getExtensionType(), llvm::VPLoadSDNode::getExtensionType(), llvm::VPStridedLoadSDNode::getExtensionType(), llvm::MaskedLoadSDNode::isExpandingLoad(), llvm::VPLoadSDNode::isExpandingLoad(), llvm::VPStridedLoadSDNode::isExpandingLoad(), llvm::MaskedGatherSDNode::MaskedGatherSDNode(), llvm::MaskedLoadSDNode::MaskedLoadSDNode(), llvm::LoadSDNode::SelectionDAG, llvm::VPLoadSDNode::VPLoadSDNode(), and llvm::VPStridedLoadSDNode::VPStridedLoadSDNode().

◆ LSBaseSDNodeBits

Definition at line 626 of file SelectionDAGNodes.h.

Referenced by llvm::LSBaseSDNode::getAddressingMode(), llvm::MaskedLoadStoreSDNode::getAddressingMode(), llvm::VPBaseLoadStoreSDNode::getAddressingMode(), llvm::MaskedGatherScatterSDNode::getIndexType(), llvm::MaskedHistogramSDNode::getIndexType(), llvm::VPGatherScatterSDNode::getIndexType(), llvm::LSBaseSDNode::LSBaseSDNode(), llvm::MaskedGatherScatterSDNode::MaskedGatherScatterSDNode(), llvm::MaskedLoadStoreSDNode::MaskedLoadStoreSDNode(), llvm::VPBaseLoadStoreSDNode::VPBaseLoadStoreSDNode(), and llvm::VPGatherScatterSDNode::VPGatherScatterSDNode().

◆ MemSDNodeBits

◆ PersistentId

uint16_t llvm::SDNode::PersistentId = 0xffff

Unique and persistent id per SDNode in the DAG.

Used for debug printing. We do not place that under #if LLVM_ENABLE_ABI_BREAKING_CHECKS intentionally because it adds unneeded complexity without noticeable benefits (see discussion with @thakis in D120714). Currently, there are two padding bytes after this field.

Definition at line 650 of file SelectionDAGNodes.h.

Referenced by llvm::HandleSDNode::HandleSDNode().

◆ RawSDNodeBits

◆ SDNodeBits

◆ StoreSDNodeBits

Definition at line 628 of file SelectionDAGNodes.h.

Referenced by llvm::MaskedStoreSDNode::isCompressingStore(), llvm::VPStoreSDNode::isCompressingStore(), llvm::VPStridedStoreSDNode::isCompressingStore(), llvm::MaskedScatterSDNode::isTruncatingStore(), llvm::MaskedStoreSDNode::isTruncatingStore(), llvm::StoreSDNode::isTruncatingStore(), llvm::VPStoreSDNode::isTruncatingStore(), llvm::VPStridedStoreSDNode::isTruncatingStore(), llvm::MaskedScatterSDNode::MaskedScatterSDNode(), llvm::MaskedStoreSDNode::MaskedStoreSDNode(), llvm::StoreSDNode::SelectionDAG, llvm::VPStoreSDNode::VPStoreSDNode(), and llvm::VPStridedStoreSDNode::VPStridedStoreSDNode().

The documentation for this class was generated from the following files:

• include/llvm/CodeGen/SelectionDAGNodes.h
• lib/CodeGen/SelectionDAG/SelectionDAG.cpp
• lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp