LLVM: lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp Source File (original) (raw)
1
2
3
4
5
6
7
8
9
10
11
12
24using namespace llvm;
25
26#define DEBUG_TYPE "asm-printer"
27
28#define PRINT_ALIAS_INSTR
29#include "MipsGenAsmWriter.inc"
30
31template
33 assert(MI.getOperand(OpNo).isReg() && "Register operand expected.");
34 return MI.getOperand(OpNo).getReg() == R;
35}
36
38 switch (CC) {
71 }
73}
74
79
83 switch (MI->getOpcode()) {
84 default:
85 break;
86 case Mips::RDHWR:
87 case Mips::RDHWR64:
88 O << "\t.set\tpush\n";
89 O << "\t.set\tmips32r2\n";
90 break;
91 case Mips::Save16:
92 O << "\tsave\t";
93 printSaveRestore(MI, STI, O);
94 O << " # 16 bit inst\n";
95 return;
96 case Mips::SaveX16:
97 O << "\tsave\t";
98 printSaveRestore(MI, STI, O);
99 O << "\n";
100 return;
101 case Mips::Restore16:
102 O << "\trestore\t";
103 printSaveRestore(MI, STI, O);
104 O << " # 16 bit inst\n";
105 return;
106 case Mips::RestoreX16:
107 O << "\trestore\t";
108 printSaveRestore(MI, STI, O);
109 O << "\n";
110 return;
111 }
112
113
115 !printAlias(*MI, Address, STI, O))
118
119 switch (MI->getOpcode()) {
120 default:
121 break;
122 case Mips::RDHWR:
123 case Mips::RDHWR64:
124 O << "\n\t.set\tpop";
125 }
126}
127
128void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
131 if (Op.isReg()) {
133 return;
134 }
135
136 if (Op.isImm()) {
138 return;
139 }
140
141 assert(Op.isExpr() && "unknown operand kind in printOperand");
142 MAI.printExpr(O, *Op.getExpr());
143}
144
145void MipsInstPrinter::printJumpOperand(const MCInst *MI, unsigned OpNo,
148 const MCOperand &Op = MI->getOperand(OpNo);
149 if (.isImm())
150 return printOperand(MI, OpNo, STI, O);
151
154 else
156}
157
158void MipsInstPrinter::printBranchOperand(const MCInst *MI, uint64_t Address,
159 unsigned OpNo,
162 const MCOperand &Op = MI->getOperand(OpNo);
163 if (.isImm())
164 return printOperand(MI, OpNo, STI, O);
165
168 if (STI.hasFeature(Mips::FeatureMips32))
169 Target &= 0xffffffff;
170 else if (STI.hasFeature(Mips::FeatureMips16))
173 } else {
175 }
176}
177
178template <unsigned Bits, unsigned Offset>
179void MipsInstPrinter::printUImm(const MCInst *MI, int opNum,
181 const MCOperand &MO = MI->getOperand(opNum);
182 if (MO.isImm()) {
188 return;
189 }
190
191 printOperand(MI, opNum, STI, O);
192}
193
194void MipsInstPrinter::printMemOperand(const MCInst *MI, int opNum,
197
198
199
200
201
202
203 switch (MI->getOpcode()) {
204 default:
205 break;
206 case Mips::SWM32_MM:
207 case Mips::LWM32_MM:
208 case Mips::SWM16_MM:
209 case Mips::SWM16_MMR6:
210 case Mips::LWM16_MM:
211 case Mips::LWM16_MMR6:
212 opNum = MI->getNumOperands() - 2;
213 break;
214 }
215
217 printOperand(MI, opNum + 1, STI, O);
218 O << "(";
219 printOperand(MI, opNum, STI, O);
220 O << ")";
221}
222
223void MipsInstPrinter::printMemOperandEA(const MCInst *MI, int opNum,
226
227
228 printOperand(MI, opNum, STI, O);
229 O << ", ";
230 printOperand(MI, opNum + 1, STI, O);
231}
232
233void MipsInstPrinter::printFCCOperand(const MCInst *MI, int opNum,
236 const MCOperand &MO = MI->getOperand(opNum);
238}
239
240void MipsInstPrinter::
243}
244
245bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
246 uint64_t Address, unsigned OpNo,
248 bool IsBranch) {
249 OS << "\t" << Str << "\t";
250 if (IsBranch)
251 printBranchOperand(&MI, Address, OpNo, STI, OS);
252 else
253 printOperand(&MI, OpNo, STI, OS);
254 return true;
255}
256
257bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
258 uint64_t Address, unsigned OpNo0,
261 printAlias(Str, MI, Address, OpNo0, STI, OS, IsBranch);
262 OS << ", ";
263 if (IsBranch)
264 printBranchOperand(&MI, Address, OpNo1, STI, OS);
265 else
266 printOperand(&MI, OpNo1, STI, OS);
267 return true;
268}
269
270bool MipsInstPrinter::printAlias(const MCInst &MI, uint64_t Address,
272 switch (MI.getOpcode()) {
273 case Mips::BEQ:
274 case Mips::BEQ_MM:
275
276
278 printAlias("b", MI, Address, 2, STI, OS, true)) ||
280 printAlias("beqz", MI, Address, 0, 2, STI, OS, true));
281 case Mips::BEQ64:
282
284 printAlias("beqz", MI, Address, 0, 2, STI, OS, true);
285 case Mips::BNE:
286 case Mips::BNE_MM:
287
289 printAlias("bnez", MI, Address, 0, 2, STI, OS, true);
290 case Mips::BNE64:
291
293 printAlias("bnez", MI, Address, 0, 2, STI, OS, true);
294 case Mips::BGEZAL:
295
297 printAlias("bal", MI, Address, 1, STI, OS, true);
298 case Mips::BC1T:
299
301 printAlias("bc1t", MI, Address, 1, STI, OS, true);
302 case Mips::BC1F:
303
305 printAlias("bc1f", MI, Address, 1, STI, OS, true);
306 case Mips::JALR:
307
308
310 printAlias("jr", MI, Address, 1, STI, OS)) ||
312 printAlias("jalr", MI, Address, 1, STI, OS));
313 case Mips::JALR64:
314
315
317 printAlias("jr", MI, Address, 1, STI, OS)) ||
319 printAlias("jalr", MI, Address, 1, STI, OS));
320 case Mips::NOR:
321 case Mips::NOR_MM:
322 case Mips::NOR_MMR6:
323
325 printAlias("not", MI, Address, 0, 1, STI, OS);
326 case Mips::NOR64:
327
329 printAlias("not", MI, Address, 0, 1, STI, OS);
330 case Mips::OR:
331 case Mips::ADDu:
332
333
335 printAlias("move", MI, Address, 0, 1, STI, OS);
336 default:
337 return false;
338 }
339}
340
341void MipsInstPrinter::printSaveRestore(const MCInst *MI,
344 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
345 if (i != 0) O << ", ";
346 if (MI->getOperand(i).isReg())
348 else
349 printUImm<16>(MI, i, STI, O);
350 }
351}
352
353void MipsInstPrinter::printRegisterList(const MCInst *MI, int opNum,
356
357
358 for (int i = opNum, e = MI->getNumOperands() - 2; i != e; ++i) {
359 if (i != opNum)
360 O << ", ";
362 }
363}
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static bool isReg(const MCInst &MI, unsigned OpNo)
Definition MipsInstPrinter.cpp:32
WithMarkup markup(raw_ostream &OS, Markup M)
format_object< int64_t > formatHex(int64_t Value) const
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
bool PrintBranchImmAsAddress
If true, a branch immediate (e.g.
Instances of this class represent a single low-level machine instruction.
Instances of this class represent operands of the MCInst class.
Wrapper class representing physical registers. Should be passed by value.
Generic base class for all target subtargets.
bool hasFeature(unsigned Feature) const
void printRegName(raw_ostream &OS, MCRegister Reg) override
Print the assembler register name.
Definition MipsInstPrinter.cpp:75
void printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
Definition MipsInstPrinter.cpp:80
static const char * getRegisterName(MCRegister Reg)
bool printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &OS)
StringRef - Represent a constant reference to a string, i.e.
LLVM_ABI std::string lower() const
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const char * MipsFCCToString(Mips::CondCode CC)
Definition MipsInstPrinter.cpp:37
This is an optimization pass for GlobalISel generic memory operations.
DWARFExpression::Operation Op