MipsTargetStreamer.cpp Source File (original) (raw)

32using namespace llvm;

34namespace {

36 "mips-round-section-sizes", cl::init(false),

37 cl::desc("Round section sizes up to the section alignment"), cl::Hidden);

38}

41 return STI->hasFeature(Mips::FeatureMicroMips);

42}

45 return STI->hasFeature(Mips::FeatureMips32r6);

46}

51}

74}

85 unsigned ReturnReg) {}

88}

91}

112}

115}

124

125

126

127

128

129

130

131

132

134 return;

135

137

139}

144 return true;

145}

148}

150 bool SaveLocationIsRegister) {}

151

153

157}

170}

174}

175

181 TmpInst.setLoc(IDLoc);

183}

184

191 TmpInst.setLoc(IDLoc);

193}

194

198}

199

203}

204

211 TmpInst.setLoc(IDLoc);

213}

214

223 TmpInst.setLoc(IDLoc);

225}

226

228 unsigned Reg2, SMLoc IDLoc,

231}

232

242 TmpInst.setLoc(IDLoc);

244}

245

247 int16_t Imm, SMLoc IDLoc,

250}

251

253 unsigned Reg1, int16_t Imm0, int16_t Imm1,

254 int16_t Imm2, SMLoc IDLoc,

263 TmpInst.setLoc(IDLoc);

265}

266

268 unsigned TrgReg, bool Is64Bit,

270 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(),

271 STI);

272}

273

275 int16_t ShiftAmount, SMLoc IDLoc,

277 if (ShiftAmount >= 32) {

278 emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);

279 return;

280 }

281

282 emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);

283}

284

287

288 unsigned Opc = Mips::SLL;

290 Opc = isMips32r6(STI) ? Mips::MOVE16_MMR6 : Mips::MOVE16_MM;

291 emitRR(Opc, Mips::ZERO, Mips::ZERO, IDLoc, STI);

292 return;

293 }

294

296 Opc = isMips32r6(STI) ? Mips::SLL_MMR6 : Mips::SLL_MM;

297

298 emitRRI(Opc, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);

299}

300

303 emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);

304 else

305 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);

306}

307

308

312}

313

314

316 unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset,

319 if (isInt<16>(Offset)) {

320 emitRRI(Opcode, SrcReg, BaseReg, Offset, IDLoc, STI);

321 return;

322 }

323

324

325

326

327

328 unsigned ATReg = GetATReg();

329 if (!ATReg)

330 return;

331

332 unsigned LoOffset = Offset & 0x0000ffff;

333 unsigned HiOffset = (Offset & 0xffff0000) >> 16;

334

335

336

337 if (LoOffset & 0x8000)

338 HiOffset++;

339

340

341 emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);

342 if (BaseReg != Mips::ZERO)

343 emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);

344

345 emitRRI(Opcode, SrcReg, ATReg, LoOffset, IDLoc, STI);

346}

347

348

349

350

351

353 unsigned BaseReg, int64_t Offset,

354 unsigned TmpReg, SMLoc IDLoc,

356 if (isInt<16>(Offset)) {

357 emitRRI(Opcode, DstReg, BaseReg, Offset, IDLoc, STI);

358 return;

359 }

360

361

362

363

364

365

366

367

368 unsigned LoOffset = Offset & 0x0000ffff;

369 unsigned HiOffset = (Offset & 0xffff0000) >> 16;

370

371

372

373 if (LoOffset & 0x8000)

374 HiOffset++;

375

376

377 emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);

378 if (BaseReg != Mips::ZERO)

379 emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);

380

381 emitRRI(Opcode, DstReg, TmpReg, LoOffset, IDLoc, STI);

382}

383

387

389 OS << "\t.set\tmicromips\n";

391}

392

394 OS << "\t.set\tnomicromips\n";

396}

397

399 OS << "\t.set\tmips16\n";

401}

402

404 OS << "\t.set\tnomips16\n";

406}

407

409 OS << "\t.set\treorder\n";

411}

412

414 OS << "\t.set\tnoreorder\n";

416}

417

419 OS << "\t.set\tmacro\n";

421}

422

424 OS << "\t.set\tnomacro\n";

426}

427

429 OS << "\t.set\tmsa\n";

431}

432

434 OS << "\t.set\tnomsa\n";

436}

437

439 OS << "\t.set\tmt\n";

441}

442

444 OS << "\t.set\tnomt\n";

446}

447

449 OS << "\t.set\tcrc\n";

451}

452

454 OS << "\t.set\tnocrc\n";

456}

457

459 OS << "\t.set\tvirt\n";

461}

462

464 OS << "\t.set\tnovirt\n";

466}

467

469 OS << "\t.set\tginv\n";

471}

472

474 OS << "\t.set\tnoginv\n";

476}

477

479 OS << "\t.set\tat\n";

481}

482

484 OS << "\t.set\tat=$" << Twine(RegNo) << "\n";

486}

487

489 OS << "\t.set\tnoat\n";

491}

492

494 OS << "\t.end\t" << Name << '\n';

495}

496

498 OS << "\t.ent\t" << Symbol.getName() << '\n';

499}

500

502

504

506 OS << "\t.nan\tlegacy\n";

507}

508

510 OS << "\t.option\tpic0\n";

511}

512

514 OS << "\t.option\tpic2\n";

515}

516

519 OS << "\t.insn\n";

520}

521

523 unsigned ReturnReg) {

524 OS << "\t.frame\t$"

526 << StackSize << ",$"

528}

529

531 OS << "\t.set arch=" << Arch << "\n";

533}

534

536 OS << "\t.set\tmips0\n";

538}

539

541 OS << "\t.set\tmips1\n";

543}

544

546 OS << "\t.set\tmips2\n";

548}

549

551 OS << "\t.set\tmips3\n";

553}

554

556 OS << "\t.set\tmips4\n";

558}

559

561 OS << "\t.set\tmips5\n";

563}

564

566 OS << "\t.set\tmips32\n";

568}

569

571 OS << "\t.set\tmips32r2\n";

573}

574

576 OS << "\t.set\tmips32r3\n";

578}

579

581 OS << "\t.set\tmips32r5\n";

583}

584

586 OS << "\t.set\tmips32r6\n";

588}

589

591 OS << "\t.set\tmips64\n";

593}

594

596 OS << "\t.set\tmips64r2\n";

598}

599

601 OS << "\t.set\tmips64r3\n";

603}

604

606 OS << "\t.set\tmips64r5\n";

608}

609

611 OS << "\t.set\tmips64r6\n";

613}

614

616 OS << "\t.set\tdsp\n";

618}

619

621 OS << "\t.set\tdspr2\n";

623}

624

626 OS << "\t.set\tnodsp\n";

628}

629

631 OS << "\t.set\tmips3d\n";

633}

634

636 OS << "\t.set\tnomips3d\n";

638}

639

641 OS << "\t.set\tpop\n";

643}

644

646 OS << "\t.set\tpush\n";

648}

649

651 OS << "\t.set\tsoftfloat\n";

653}

654

656 OS << "\t.set\thardfloat\n";

658}

659

660

662 OS << "0x";

663 for (int i = 7; i >= 0; i--)

665}

666

668 int CPUTopSavedRegOff) {

669 OS << "\t.mask \t";

671 OS << ',' << CPUTopSavedRegOff << '\n';

672}

673

675 int FPUTopSavedRegOff) {

676 OS << "\t.fmask\t";

678 OS << "," << FPUTopSavedRegOff << '\n';

679}

680

682 OS << "\t.cpadd\t$"

685}

686

688 OS << "\t.cpload\t$"

691}

692

694 OS << "\t.cplocal\t$"

697}

698

703 OS << "\t.cprestore\t" << Offset << "\n";

704 return true;

705}

706

708 int RegOrOffset,

710 bool IsReg) {

711 OS << "\t.cpsetup\t$"

713

714 if (IsReg)

715 OS << "$"

717 else

718 OS << RegOrOffset;

719

720 OS << ", ";

721

722 OS << Sym.getName();

724}

725

727 bool SaveLocationIsRegister) {

728 OS << "\t.cpreturn";

730}

731

735 OS << "\t.module\tsoftfloat\n";

736 else

738}

739

743

744 OS << "\t.set\tfp=";

746}

747

750

752}

753

756 OS << "\t.set\toddspreg\n";

757}

758

761 OS << "\t.set\tnooddspreg\n";

762}

763

765 OS << "\t.module\tsoftfloat\n";

766}

767

769 OS << "\t.module\thardfloat\n";

770}

771

773 OS << "\t.module\tmt\n";

774}

775

777 OS << "\t.module\tcrc\n";

778}

779

781 OS << "\t.module\tnocrc\n";

782}

783

785 OS << "\t.module\tvirt\n";

786}

787

789 OS << "\t.module\tnovirt\n";

790}

791

793 OS << "\t.module\tginv\n";

794}

795

797 OS << "\t.module\tnoginv\n";

798}

799

800

806

807

808

809

810

811

812

813

815

817

818

819

820

821

822

823

824

825

826

827

828

829 unsigned EFlags = W.getELFHeaderEFlags();

830

831

832

833

834

835

841

842

843 if (Features[Mips::FeatureMips64r6])

845 else if (Features[Mips::FeatureMips64r2] ||

846 Features[Mips::FeatureMips64r3] ||

847 Features[Mips::FeatureMips64r5])

849 else if (Features[Mips::FeatureMips64])

851 else if (Features[Mips::FeatureMips5])

853 else if (Features[Mips::FeatureMips4])

855 else if (Features[Mips::FeatureMips3])

857 else if (Features[Mips::FeatureMips32r6])

859 else if (Features[Mips::FeatureMips32r2] ||

860 Features[Mips::FeatureMips32r3] ||

861 Features[Mips::FeatureMips32r5])

863 else if (Features[Mips::FeatureMips32])

865 else if (Features[Mips::FeatureMips2])

867 else

869

870

871 if (Features[Mips::FeatureCnMips])

873

874

875 if (Features[Mips::FeatureNaN2008])

877

878 W.setELFHeaderEFlags(EFlags);

879}

880

882 auto *Symbol = cast(S);

886 return;

887

890}

891

897

898

905

909

910 if (RoundSectionSizes) {

911

912

913

914

917

918 Align Alignment = Section.getAlign();

920 if (Section.useCodeAlign())

922 else

924 }

925 }

926

928

929

930

931 unsigned EFlags = W.getELFHeaderEFlags();

932

933

934

939

940 if (Features[Mips::FeatureGP64Bit]) {

943 } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])

945

946

947

948 if (!Features[Mips::FeatureNoABICalls])

950

951 if (Pic)

953

954 W.setELFHeaderEFlags(EFlags);

955

956

957

958

961

963}

964

966 auto *Symbol = cast(S);

967

969 return;

970 const auto &RhsSym = cast(

972

974 return;

975

977}

978

981}

982

984 MicroMipsEnabled = true;

986}

987

989 MicroMipsEnabled = false;

991}

992

995 unsigned Flags = W.getELFHeaderEFlags();

997 W.setELFHeaderEFlags(Flags);

998}

999

1002 unsigned Flags = W.getELFHeaderEFlags();

1004 W.setELFHeaderEFlags(Flags);

1006}

1007

1010 unsigned Flags = W.getELFHeaderEFlags();

1012 W.setELFHeaderEFlags(Flags);

1014}

1015

1020

1021 OS.pushSection();

1023 OS.switchSection(Sec);

1025

1029

1030 OS.emitValueImpl(ExprRef, 4);

1031

1034

1037

1041

1042

1043

1045

1046 OS.popSection();

1047

1048

1050 OS.emitLabel(CurPCSym);

1053 ExprRef, Context);

1054

1055

1056

1057

1059}

1060

1063

1064

1066}

1067

1070 unsigned Flags = W.getELFHeaderEFlags();

1072 W.setELFHeaderEFlags(Flags);

1073}

1074

1077 unsigned Flags = W.getELFHeaderEFlags();

1079 W.setELFHeaderEFlags(Flags);

1080}

1081

1084 unsigned Flags = W.getELFHeaderEFlags();

1085 Flags &= ~ELF::EF_MIPS_NAN2008;

1086 W.setELFHeaderEFlags(Flags);

1087}

1088

1091 unsigned Flags = W.getELFHeaderEFlags();

1092

1093 Pic = false;

1094 Flags &= ~ELF::EF_MIPS_PIC;

1095 W.setELFHeaderEFlags(Flags);

1096}

1097

1100 unsigned Flags = W.getELFHeaderEFlags();

1101 Pic = true;

1102

1103

1104

1105

1107 W.setELFHeaderEFlags(Flags);

1108}

1109

1114}

1115

1117 unsigned ReturnReg_) {

1120

1125}

1126

1128 int CPUTopSavedRegOff) {

1132}

1133

1135 int FPUTopSavedRegOff) {

1139}

1140

1142

1143

1144

1145 if (!Pic)

1146 return;

1147

1150}

1151

1153

1154

1155

1156

1157

1158

1159 if (!Pic || (getABI().IsN32() || getABI().IsN64()))

1160 return;

1161

1162

1163

1164

1165

1166

1167

1168

1173

1184

1185 TmpInst.clear();

1186

1197

1198 TmpInst.clear();

1199

1205

1207}

1208

1210 if (Pic)

1212}

1213

1218

1219

1220

1221

1222

1223

1224

1225

1226 if (!Pic || (getABI().IsN32() || getABI().IsN64()))

1227 return true;

1228

1229

1231 STI);

1232 return true;

1233}

1234

1236 int RegOrOffset,

1238 bool IsReg) {

1239

1240 if (!Pic || !(getABI().IsN32() || getABI().IsN64()))

1241 return;

1242

1244

1247

1248

1249 if (IsReg) {

1250

1251 emitRRR(Mips::OR64, RegOrOffset, GPReg, Mips::ZERO, SMLoc(), &STI);

1252 } else {

1253

1255 }

1256

1263

1264

1266

1267

1269 &STI);

1270

1271

1272 if (getABI().IsN32())

1274 else

1276}

1277

1279 bool SaveLocationIsRegister) {

1280

1281 if (!Pic || !(getABI().IsN32() || getABI().IsN64()))

1282 return;

1283

1285

1286 if (SaveLocationIsRegister) {

1291 } else {

1296 }

1298

1300}

1301

1308 OS.switchSection(Sec);

1310

1312}

static bool hasShortDelaySlot(MCInst &Inst)

static bool isMicroMips(const MCSubtargetInfo *STI)

static void printHex32(unsigned Value, raw_ostream &OS)

static bool isMips32r6(const MCSubtargetInfo *STI)

Container class for subtarget features.

MCContext & getContext() const

bool registerSymbol(const MCSymbol &Symbol)

static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)

Context object for machine code objects.

const MCObjectFileInfo * getObjectFileInfo() const

MCSymbol * createTempSymbol()

Create a temporary symbol with a unique name.

MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)

const MCRegisterInfo * getRegisterInfo() const

MCSymbol * getOrCreateSymbol(const Twine &Name)

Lookup the symbol inside with the specified Name.

void emitValueToAlignment(Align, int64_t, unsigned, unsigned) override

Emit some number of copies of Value until the byte alignment ByteAlignment is reached.

ELFObjectWriter & getWriter()

Base class for the full range of assembler expressions which are needed for parsing.

@ SymbolRef

References to labels and assigned expressions.

Instances of this class represent a single low-level machine instruction.

void addOperand(const MCOperand Op)

void setOpcode(unsigned Op)

MCSection * getBSSSection() const

bool isPositionIndependent() const

MCSection * getTextSection() const

MCSection * getDataSection() const

MCAssembler & getAssembler()

void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override

Emit the given Instruction into the current section.

void emitCodeAlignment(Align ByteAlignment, const MCSubtargetInfo *STI, unsigned MaxBytesToEmit=0) override

Emit nops until the byte alignment ByteAlignment is reached.

Instances of this class represent operands of the MCInst class.

static MCOperand createExpr(const MCExpr *Val)

static MCOperand createReg(MCRegister Reg)

static MCOperand createImm(int64_t Val)

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

uint16_t getEncodingValue(MCRegister Reg) const

Returns the encoding for Reg.

This represents a section on linux, lots of unix variants and some bare metal systems.

Instances of this class represent a uniqued identifier for a section in the current translation unit.

void setAlignment(Align Value)

void ensureMinAlignment(Align MinAlignment)

Makes sure that Alignment is at least MinAlignment.

Streaming machine code generation interface.

virtual void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)

Emit the given Instruction into the current section.

virtual void switchSection(MCSection *Section, uint32_t Subsec=0)

Set the current section where code is being emitted to Section.

Generic base class for all target subtargets.

bool hasFeature(unsigned Feature) const

const Triple & getTargetTriple() const

const FeatureBitset & getFeatureBits() const

Represent a reference to a symbol from inside an expression.

static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

Target specific streamer interface.

MCStreamer & getStreamer()

void EmitMipsOptionRecords()

Emits all the option records stored up until the point it's called.

void createPendingLabelRelocs()

Mark labels as microMIPS, if necessary for the subtarget.

static const char * getRegisterName(MCRegister Reg)

static const MipsMCExpr * create(MipsExprKind Kind, const MCExpr *Expr, MCContext &Ctx)

static const MipsMCExpr * createGpOff(MipsExprKind Kind, const MCExpr *Expr, MCContext &Ctx)

void emitDirectiveSetMips32R3() override

void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value) override

void emitDirectiveSetArch(StringRef Arch) override

void emitDirectiveModuleGINV() override

bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) override

Emit a .cprestore directive.

MipsTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS)

void emitDirectiveSetMips5() override

void emitDirectiveCpLoad(unsigned RegNo) override

void emitDirectiveSetNoVirt() override

void emitDirectiveSetNoAt() override

void emitDirectiveSetNoCRC() override

void emitDirectiveSetMips32R5() override

void emitDirectiveSetNoMacro() override

void emitDirectiveModuleMT() override

void emitDirectiveSetNoOddSPReg() override

void emitDirectiveModuleCRC() override

void emitDirectiveEnt(const MCSymbol &Symbol) override

void emitDirectiveSetDspr2() override

void emitDirectiveSetMips1() override

void emitDirectiveSetMips64R2() override

void emitDirectiveSetMips4() override

void emitDirectiveModuleSoftFloat() override

void emitDirectiveSetMips16() override

void emitDirectiveSetMt() override

void emitDirectiveInsn() override

void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) override

void emitDirectiveSetMicroMips() override

void emitDirectiveModuleNoCRC() override

void emitDirectiveSetMips32R6() override

void emitDirectiveSetNoGINV() override

void emitDirectiveSetMips64R5() override

void emitDirectiveSetMips32() override

void emitDirectiveCpLocal(unsigned RegNo) override

void emitDirectiveSetNoMips3D() override

void emitDirectiveSetPush() override

void emitDirectiveSetNoMips16() override

void emitDirectiveSetNoDsp() override

void emitDirectiveSetMips32R2() override

void emitDirectiveSetMips64() override

void emitDirectiveModuleHardFloat() override

void emitDirectiveOptionPic0() override

void emitDirectiveSetMacro() override

void emitDirectiveSetCRC() override

void emitDirectiveSetNoReorder() override

void emitDirectiveEnd(StringRef Name) override

void emitDirectiveSetMips64R3() override

void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override

void emitDirectiveSetNoMt() override

void emitDirectiveAbiCalls() override

void emitDirectiveSetMsa() override

void emitDirectiveOptionPic2() override

void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override

void emitDirectiveModuleVirt() override

void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) override

void emitDirectiveSetGINV() override

void emitDirectiveSetNoMsa() override

void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister) override

void emitDirectiveCpAdd(unsigned RegNo) override

void emitDirectiveModuleNoVirt() override

void emitDirectiveNaN2008() override

void emitDirectiveSetPop() override

void emitDirectiveSetMips3() override

void emitDirectiveSetMips0() override

void emitDirectiveSetHardFloat() override

void emitDirectiveModuleNoGINV() override

void emitDirectiveSetVirt() override

void emitDirectiveModuleFP() override

void emitDirectiveSetMips2() override

void emitDirectiveSetMips3D() override

void emitDirectiveSetAtWithArg(unsigned RegNo) override

void emitDirectiveSetReorder() override

void emitDirectiveNaNLegacy() override

void emitDirectiveSetMips64R6() override

void emitDirectiveSetSoftFloat() override

void emitDirectiveSetNoMicroMips() override

void emitDirectiveSetAt() override

void emitDirectiveSetOddSPReg() override

void emitDirectiveModuleOddSPReg() override

void emitDirectiveSetDsp() override

void emitDirectiveCpAdd(unsigned RegNo) override

void emitDirectiveCpLoad(unsigned RegNo) override

MipsTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI)

void emitDirectiveNaN2008() override

void emitDirectiveSetNoMicroMips() override

void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) override

void emitDirectiveInsn() override

void setUsesMicroMips() override

void emitDirectiveOptionPic2() override

bool isMicroMipsEnabled() const

void emitDirectiveEnd(StringRef Name) override

bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) override

void emitDirectiveSetMicroMips() override

void emitLabel(MCSymbol *Symbol) override

void emitDirectiveCpLocal(unsigned RegNo) override

void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override

void emitDirectiveAbiCalls() override

void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override

void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) override

void emitAssignment(MCSymbol *Symbol, const MCExpr *Value) override

void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister) override

void emitDirectiveSetMips16() override

void emitDirectiveOptionPic0() override

void emitDirectiveEnt(const MCSymbol &Symbol) override

void emitDirectiveSetNoReorder() override

void emitDirectiveNaNLegacy() override

MCELFStreamer & getStreamer()

std::optional< MipsABIInfo > ABI

virtual void emitDirectiveSetMips64R5()

virtual void emitDirectiveSetAt()

virtual void emitDirectiveModuleNoVirt()

virtual void emitDirectiveSetReorder()

void emitRRIII(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm0, int16_t Imm1, int16_t Imm2, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetNoCRC()

virtual void emitDirectiveModuleNoGINV()

void emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetSoftFloat()

virtual void emitDirectiveSetNoDsp()

void forbidModuleDirective()

virtual void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister)

virtual void emitDirectiveSetNoMicroMips()

void emitStoreWithImmOffset(unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)

Emit a store instruction with an offset.

virtual void emitDirectiveSetDspr2()

void emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveNaN2008()

virtual void emitDirectiveSetMips64R2()

virtual void emitDirectiveSetMips3D()

virtual void emitDirectiveEnd(StringRef Name)

virtual void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value)

virtual void emitDirectiveSetCRC()

virtual void emitDirectiveSetMips64R3()

void emitAddu(unsigned DstReg, unsigned SrcReg, unsigned TrgReg, bool Is64Bit, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetNoVirt()

virtual void emitDirectiveSetGINV()

virtual void emitDirectiveSetMacro()

virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg)

void emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetMips3()

virtual void emitDirectiveSetNoGINV()

virtual void setUsesMicroMips()

virtual void emitDirectiveSetMips32R3()

virtual void emitDirectiveSetMips32R2()

virtual void emitDirectiveEnt(const MCSymbol &Symbol)

virtual void emitDirectiveSetMips1()

virtual void emitDirectiveSetDsp()

virtual void emitDirectiveSetNoMips3D()

virtual void emitDirectiveCpLocal(unsigned RegNo)

virtual void emitDirectiveCpLoad(unsigned RegNo)

virtual void emitDirectiveSetHardFloat()

void emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetNoMips16()

virtual void emitDirectiveSetMips5()

virtual void emitDirectiveSetMips2()

virtual void emitDirectiveSetPush()

virtual void emitDirectiveSetMt()

virtual void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg)

virtual void emitDirectiveSetNoOddSPReg()

void emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetOddSPReg()

virtual void emitDirectiveSetNoMt()

virtual void emitDirectiveModuleCRC()

virtual void emitDirectiveModuleGINV()

void emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetNoAt()

virtual void emitDirectiveNaNLegacy()

virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)

void emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetPop()

virtual void emitDirectiveSetMicroMips()

void emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetMips0()

void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveModuleSoftFloat()

virtual void emitDirectiveSetArch(StringRef Arch)

virtual void emitDirectiveSetAtWithArg(unsigned RegNo)

void emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, MCOperand Op3, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)

void emitLoadWithImmOffset(unsigned Opcode, unsigned DstReg, unsigned BaseReg, int64_t Offset, unsigned TmpReg, SMLoc IDLoc, const MCSubtargetInfo *STI)

Emit a load instruction with an immediate offset.

virtual void emitDirectiveModuleNoCRC()

virtual void emitDirectiveSetNoMacro()

const MipsABIInfo & getABI() const

virtual void emitDirectiveModuleOddSPReg()

virtual void emitDirectiveCpAdd(unsigned RegNo)

virtual void emitDirectiveInsn()

virtual void emitDirectiveSetMips64R6()

virtual void emitDirectiveSetNoMsa()

virtual void emitDirectiveSetVirt()

void emitGPRestore(int Offset, SMLoc IDLoc, const MCSubtargetInfo *STI)

Emit the $gp restore operation for .cprestore.

MipsTargetStreamer(MCStreamer &S)

virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)

virtual void emitDirectiveModuleVirt()

void emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetNoReorder()

void emitDSLL(unsigned DstReg, unsigned SrcReg, int16_t ShiftAmount, SMLoc IDLoc, const MCSubtargetInfo *STI)

virtual void emitDirectiveSetMips32()

virtual void emitDirectiveOptionPic0()

virtual void emitDirectiveModuleMT()

virtual void emitDirectiveModuleHardFloat()

virtual void emitDirectiveSetMips32R5()

virtual void emitDirectiveSetMsa()

virtual void emitDirectiveSetMips32R6()

virtual void emitDirectiveSetMips4()

virtual void emitDirectiveOptionPic2()

virtual void emitDirectiveSetMips16()

virtual void emitDirectiveSetMips64()

virtual void emitDirectiveAbiCalls()

virtual void emitDirectiveModuleFP()

MipsABIFlagsSection ABIFlagsSection

Represents a location in source code.

StringRef - Represent a constant reference to a string, i.e.

std::string lower() const

ArchType getArch() const

Get the parsed architecture type of this triple.

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

The instances of the Type class are immutable: once they are created, they are never changed.

LLVM Value Representation.

formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...

An efficient, type-erasing, non-owning reference to a callable.

This class implements an extremely fast bulk output stream that can only output to a stream.

raw_ostream & write_hex(unsigned long long N)

Output N in hexadecimal, without any prefix or padding.

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

void report_fatal_error(Error Err, bool gen_crash_diag=true)

Report a serious error, calling any installed error handler.

This struct is a compact representation of a valid (non-zero power of two) alignment.

uint64_t value() const

This is a hole in the type system and should not be abused.

StringRef getFpABIString(FpABIKind Value)