LLVM: lib/Target/PowerPC/PPCSelectionDAGInfo.h Source File (original) (raw)

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9#ifndef LLVM_LIB_TARGET_POWERPC_PPCSELECTIONDAGINFO_H

10#define LLVM_LIB_TARGET_POWERPC_PPCSELECTIONDAGINFO_H

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14#define GET_SDNODE_ENUM

15#include "PPCGenSDNodeInfo.inc"

16

17namespace llvm {

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60};

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62}

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65public:

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73 const SDNode *N) const override;

74

75 std::pair<SDValue, SDValue>

78 const CallInst *CI) const override;

79 std::pair<SDValue, SDValue>

82};

83

84}

85

86#endif

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

This class represents a function call, abstracting a target machine's calling convention.

std::pair< SDValue, SDValue > EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, const CallInst *CI) const override

Emit target-specific code that performs a memcmp/bcmp, in cases where that is faster than a libcall.

const char * getTargetNodeName(unsigned Opcode) const override

Returns the name of the given target-specific opcode, suitable for debug printing.

~PPCSelectionDAGInfo() override

std::pair< SDValue, SDValue > EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, const CallInst *CI) const override

void verifyTargetNode(const SelectionDAG &DAG, const SDNode *N) const override

Checks that the given target-specific node is valid. Aborts if it is not.

Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...

Represents one node in the SelectionDAG.

Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.

SelectionDAGGenTargetInfo(const SDNodeInfo &GenNodeInfo)

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

NodeType

Definition PPCSelectionDAGInfo.h:20

@ BDNZ

CHAIN = BDNZ CHAIN, DESTBB - These are used to create counter-based loops.

Definition PPCSelectionDAGInfo.h:48

@ ANDI_rec_1_GT_BIT

Definition PPCSelectionDAGInfo.h:40

@ ANDI_rec_1_EQ_BIT

i1 = ANDI_rec_1_[EQ|GT]_BIT(i32 or i64 x) - Represents the result of the eq or gt bit of CR0 after ex...

Definition PPCSelectionDAGInfo.h:39

@ READ_TIME_BASE

Definition PPCSelectionDAGInfo.h:44

@ MFOCRF

R32 = MFOCRF(CRREG, INFLAG) - Represents the MFOCRF instruction.

Definition PPCSelectionDAGInfo.h:33

@ VADD_SPLAT

VRRC = VADD_SPLAT Elt, EltSize - Temporary node to be expanded during instruction selection to optimi...

Definition PPCSelectionDAGInfo.h:59

@ PPC32_PICGOT

GPRC = address of GLOBAL_OFFSET_TABLE.

Definition PPCSelectionDAGInfo.h:53

@ GlobalBaseReg

The result of the mflr at function entry, used for PIC code.

Definition PPCSelectionDAGInfo.h:22

@ SRA_ADDZE

The combination of sra[wd]i and addze used to implemented signed integer division by a power of 2.

Definition PPCSelectionDAGInfo.h:28

@ BDZ

Definition PPCSelectionDAGInfo.h:49

This is an optimization pass for GlobalISel generic memory operations.