LLVM: lib/Target/RISCV/RISCVRegisterInfo.h File Reference (original) (raw)
#include "[llvm/CodeGen/TargetRegisterInfo.h](TargetRegisterInfo%5F8h%5Fsource.html)"#include "[llvm/TargetParser/RISCVTargetParser.h](RISCVTargetParser%5F8h%5Fsource.html)"#include "RISCVGenRegisterInfo.inc"
Go to the source code of this file.
| Classes | |
|---|---|
| struct | llvm::RISCVRegisterInfo |
| Namespaces | |
|---|---|
| namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations. | |
| namespace | llvm::RISCVRI |
| Macros | |
|---|---|
| #define | GET_REGINFO_HEADER |
| Enumerations | |
|---|---|
| enum | : uint8_t { llvm::RISCVRI::IsVRegClassShift = 0 , llvm::RISCVRI::IsVRegClassShiftMask = 0b1 << IsVRegClassShift , llvm::RISCVRI::VLMulShift = IsVRegClassShift + 1 , llvm::RISCVRI::VLMulShiftMask = 0b11 << VLMulShift , llvm::RISCVRI::NFShift = VLMulShift + 2 , llvm::RISCVRI::NFShiftMask = 0b111 << NFShift } |
| enum | { llvm::RISCVRI::RegPairOdd = 1 , llvm::RISCVRI::RegPairEven = 2 } |
| Register allocation hints for Zilsd register pairs. More... |
| Functions | |
|---|---|
| static bool | llvm::RISCVRI::isVRegClass (uint8_t TSFlags) |
| static RISCVVType::VLMUL | llvm::RISCVRI::getLMul (uint8_t TSFlags) |
| static unsigned | llvm::RISCVRI::getNF (uint8_t TSFlags) |
Macro Definition Documentation
◆ GET_REGINFO_HEADER
#define GET_REGINFO_HEADER
Definition at line 19 of file RISCVRegisterInfo.h.