LLVM: include/llvm/CodeGen/RegisterClassInfo.h Source File (original) (raw)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16#ifndef LLVM_CODEGEN_REGISTERCLASSINFO_H
17#define LLVM_CODEGEN_REGISTERCLASSINFO_H
18
25#include
26#include
27
28namespace llvm {
29
31 struct RCInfo {
32 unsigned Tag = 0;
33 unsigned NumRegs = 0;
34 bool ProperSubClass = false;
37 std::unique_ptr<MCPhysReg[]> Order;
38
39 RCInfo() = default;
40
42 return ArrayRef(Order.get(), NumRegs);
43 }
44 };
45
46
47 std::unique_ptr<RCInfo[]> RegClass;
48
49
50
51 unsigned Tag = 0;
52
53 bool Reverse = false;
54
57
58
59
61
62
64
65
66
68
69
71
72 std::unique_ptr<unsigned[]> PSetLimits;
73
74
76
77
79
80
82 const RCInfo &RCI = RegClass[RC->getID()];
83 if (Tag != RCI.Tag)
84 compute(RC);
85 return RCI;
86 }
87
88public:
90
91
92
93
95 bool Rev = false);
96
97
98
100 return get(RC).NumRegs;
101 }
102
103
104
105
107 return get(RC);
108 }
109
110
111
112
113
114
115
117 return get(RC).ProperSubClass;
118 }
119
120
121
122
125 for (MCRegUnit Unit : TRI->regunits(PhysReg)) {
126 CSR = CalleeSavedAliases[static_cast<unsigned>(Unit)];
127 if (CSR)
128 break;
129 }
130 return CSR;
131 }
132
133
134
135
137 return get(RC).MinCost;
138 }
139
140
141
142
143
145 return get(RC).LastCostChange;
146 }
147
148
149
150
152 if (!PSetLimits[Idx])
154 return PSetLimits[Idx];
155 }
156
157protected:
159};
160
161}
162
163#endif
This file implements the BitVector class.
This file defines the SmallVector class.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Wrapper class representing physical registers. Should be passed by value.
unsigned getLastCostChange(const TargetRegisterClass *RC) const
Get the position of the last cost change in getOrder(RC).
Definition RegisterClassInfo.h:144
bool isProperSubClass(const TargetRegisterClass *RC) const
isProperSubClass - Returns true if RC has a legal super-class with more allocatable registers.
Definition RegisterClassInfo.h:116
unsigned getNumAllocatableRegs(const TargetRegisterClass *RC) const
getNumAllocatableRegs - Returns the number of actually allocatable registers in RC in the current fun...
Definition RegisterClassInfo.h:99
unsigned getRegPressureSetLimit(unsigned Idx) const
Get the register unit limit for the given pressure set index.
Definition RegisterClassInfo.h:151
LLVM_ABI void runOnMachineFunction(const MachineFunction &MF, bool Rev=false)
runOnFunction - Prepare to answer questions about MF.
uint8_t getMinCost(const TargetRegisterClass *RC) const
Get the minimum register cost in RC's allocation order.
Definition RegisterClassInfo.h:136
MCRegister getLastCalleeSavedAlias(MCRegister PhysReg) const
getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg,...
Definition RegisterClassInfo.h:123
LLVM_ABI RegisterClassInfo()
ArrayRef< MCPhysReg > getOrder(const TargetRegisterClass *RC) const
getOrder - Returns the preferred allocation order for RC.
Definition RegisterClassInfo.h:106
LLVM_ABI unsigned computePSetLimit(unsigned Idx) const
This is not accurate because two overlapping register sets may have some nonoverlapping reserved regi...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
unsigned getID() const
Return the register class ID number.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
ArrayRef(const T &OneElt) -> ArrayRef< T >