SystemZAsmPrinter.cpp Source File (original) (raw)

39using namespace llvm;

44 if (MI->isCompare())

47 .addImm(MI->getOperand(1).getImm());

48 else

52 .addImm(MI->getOperand(2).getImm());

53}

58 if (MI->isCompare())

61 .addImm(MI->getOperand(1).getImm());

62 else

66 .addImm(MI->getOperand(2).getImm());

67}

88 StringRef Name = "_GLOBAL_OFFSET_TABLE_";

90 Context);

91}

98 unsigned Opcode) {

99 if (MI->memoperands_empty())

100 return;

101

104 EE = MI->memoperands_end(); MMOI != EE; ++MMOI)

105 if ((*MMOI)->getAlign() < Alignment)

106 Alignment = (*MMOI)->getAlign();

107

108 unsigned AlignmentHint = 0;

109 if (Alignment >= Align(16))

110 AlignmentHint = 4;

111 else if (Alignment >= Align(8))

112 AlignmentHint = 3;

113 if (AlignmentHint == 0)

114 return;

115

118}

119

120

121

125 .addReg(MI->getOperand(1).getReg())

126 .addImm(MI->getOperand(2).getImm())

127 .addReg(MI->getOperand(3).getReg());

128}

129

130

131

135 .addReg(MI->getOperand(1).getReg())

136 .addImm(MI->getOperand(2).getImm())

137 .addReg(MI->getOperand(3).getReg())

139}

140

141

149

150

155 .addReg(MI->getOperand(1).getReg())

158}

159

160

161

162

163

164

165void SystemZAsmPrinter::emitCallInformation(CallType CT) {

167 MCInstBuilder(SystemZ::BCRAsm)

168 .addImm(0)

170}

171

172uint32_t SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MCSymbol *Sym,

173 unsigned SlotKind) {

174 auto Key = std::make_pair(Sym, SlotKind);

175 auto It = Displacements.find(Key);

176

177 if (It != Displacements.end())

178 return (*It).second;

179

180

182 switch (SlotKind) {

184 Length = 2 * PointerSize;

185 break;

186 default:

187 Length = PointerSize;

188 break;

189 }

190

191 uint32_t Displacement = NextDisplacement;

192 Displacements[std::make_pair(Sym, SlotKind)] = NextDisplacement;

193 NextDisplacement += Length;

194

195 return Displacement;

196}

197

198uint32_t

199SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MachineOperand MO) {

202 const GlobalValue *GV = MO.getGlobal();

204 assert(Sym && "No symbol");

208 assert(Sym && "No symbol");

209 } else

211

213 return insert(Sym, ADAslotType);

214}

215

217 SystemZ_MC::verifyInstructionPredicates(MI->getOpcode(),

219

222 switch (MI->getOpcode()) {

223 case SystemZ::Return:

225 .addReg(SystemZ::R14D);

226 break;

227

228 case SystemZ::Return_XPLINK:

230 .addReg(SystemZ::R7D)

233 break;

234

235 case SystemZ::CondReturn:

237 .addImm(MI->getOperand(0).getImm())

238 .addImm(MI->getOperand(1).getImm())

239 .addReg(SystemZ::R14D);

240 break;

241

242 case SystemZ::CondReturn_XPLINK:

244 .addImm(MI->getOperand(0).getImm())

245 .addImm(MI->getOperand(1).getImm())

246 .addReg(SystemZ::R7D)

249 break;

250

251 case SystemZ::CRBReturn:

253 .addReg(MI->getOperand(0).getReg())

254 .addReg(MI->getOperand(1).getReg())

255 .addImm(MI->getOperand(2).getImm())

256 .addReg(SystemZ::R14D)

258 break;

259

260 case SystemZ::CGRBReturn:

262 .addReg(MI->getOperand(0).getReg())

263 .addReg(MI->getOperand(1).getReg())

264 .addImm(MI->getOperand(2).getImm())

265 .addReg(SystemZ::R14D)

267 break;

268

269 case SystemZ::CIBReturn:

271 .addReg(MI->getOperand(0).getReg())

272 .addImm(MI->getOperand(1).getImm())

273 .addImm(MI->getOperand(2).getImm())

274 .addReg(SystemZ::R14D)

276 break;

277

278 case SystemZ::CGIBReturn:

280 .addReg(MI->getOperand(0).getReg())

281 .addImm(MI->getOperand(1).getImm())

282 .addImm(MI->getOperand(2).getImm())

283 .addReg(SystemZ::R14D)

285 break;

286

287 case SystemZ::CLRBReturn:

289 .addReg(MI->getOperand(0).getReg())

290 .addReg(MI->getOperand(1).getReg())

291 .addImm(MI->getOperand(2).getImm())

292 .addReg(SystemZ::R14D)

294 break;

295

296 case SystemZ::CLGRBReturn:

298 .addReg(MI->getOperand(0).getReg())

299 .addReg(MI->getOperand(1).getReg())

300 .addImm(MI->getOperand(2).getImm())

301 .addReg(SystemZ::R14D)

303 break;

304

305 case SystemZ::CLIBReturn:

307 .addReg(MI->getOperand(0).getReg())

308 .addImm(MI->getOperand(1).getImm())

309 .addImm(MI->getOperand(2).getImm())

310 .addReg(SystemZ::R14D)

312 break;

313

314 case SystemZ::CLGIBReturn:

316 .addReg(MI->getOperand(0).getReg())

317 .addImm(MI->getOperand(1).getImm())

318 .addImm(MI->getOperand(2).getImm())

319 .addReg(SystemZ::R14D)

321 break;

322

323 case SystemZ::CallBRASL_XPLINK64:

325 .addReg(SystemZ::R7D)

326 .addExpr(Lower.getExpr(MI->getOperand(0),

328 emitCallInformation(CallType::BRASL7);

329 return;

330

331 case SystemZ::CallBASR_XPLINK64:

333 .addReg(SystemZ::R7D)

334 .addReg(MI->getOperand(0).getReg()));

335 emitCallInformation(CallType::BASR76);

336 return;

337

338 case SystemZ::CallBASR_STACKEXT:

340 .addReg(SystemZ::R3D)

341 .addReg(MI->getOperand(0).getReg()));

342 emitCallInformation(CallType::BASR33);

343 return;

344

345 case SystemZ::ADA_ENTRY_VALUE:

346 case SystemZ::ADA_ENTRY: {

349 uint32_t Disp = ADATable.insert(MI->getOperand(1));

350 Register TargetReg = MI->getOperand(0).getReg();

351

352 Register ADAReg = MI->getOperand(2).getReg();

353 Disp += MI->getOperand(3).getImm();

354 bool LoadAddr = MI->getOpcode() == SystemZ::ADA_ENTRY;

355

356 unsigned Op0 = LoadAddr ? SystemZ::LA : SystemZ::LG;

357 unsigned Op = TII->getOpcodeForOffset(Op0, Disp);

358

360 if () {

361 if (TargetReg != ADAReg) {

362 IndexReg = TargetReg;

363

366 MCInstBuilder(SystemZ::LLILF).addReg(TargetReg).addImm(Disp));

367 } else

369 .addReg(TargetReg)

370 .addReg(TargetReg)

371 .addImm(Disp));

372 Disp = 0;

373 Op = Op0;

374 }

376 .addReg(TargetReg)

377 .addReg(ADAReg)

378 .addImm(Disp)

379 .addReg(IndexReg));

380

381 return;

382 }

383 case SystemZ::CallBRASL:

385 .addReg(SystemZ::R14D)

387 break;

388

389 case SystemZ::CallBASR:

391 .addReg(SystemZ::R14D)

392 .addReg(MI->getOperand(0).getReg());

393 break;

394

395 case SystemZ::CallJG:

398 break;

399

400 case SystemZ::CallBRCL:

402 .addImm(MI->getOperand(0).getImm())

403 .addImm(MI->getOperand(1).getImm())

405 break;

406

407 case SystemZ::CallBR:

409 .addReg(MI->getOperand(0).getReg());

410 break;

411

412 case SystemZ::CallBCR:

414 .addImm(MI->getOperand(0).getImm())

415 .addImm(MI->getOperand(1).getImm())

416 .addReg(MI->getOperand(2).getReg());

417 break;

418

419 case SystemZ::CRBCall:

421 .addReg(MI->getOperand(0).getReg())

422 .addReg(MI->getOperand(1).getReg())

423 .addImm(MI->getOperand(2).getImm())

424 .addReg(MI->getOperand(3).getReg())

426 break;

427

428 case SystemZ::CGRBCall:

430 .addReg(MI->getOperand(0).getReg())

431 .addReg(MI->getOperand(1).getReg())

432 .addImm(MI->getOperand(2).getImm())

433 .addReg(MI->getOperand(3).getReg())

435 break;

436

437 case SystemZ::CIBCall:

439 .addReg(MI->getOperand(0).getReg())

440 .addImm(MI->getOperand(1).getImm())

441 .addImm(MI->getOperand(2).getImm())

442 .addReg(MI->getOperand(3).getReg())

444 break;

445

446 case SystemZ::CGIBCall:

448 .addReg(MI->getOperand(0).getReg())

449 .addImm(MI->getOperand(1).getImm())

450 .addImm(MI->getOperand(2).getImm())

451 .addReg(MI->getOperand(3).getReg())

453 break;

454

455 case SystemZ::CLRBCall:

457 .addReg(MI->getOperand(0).getReg())

458 .addReg(MI->getOperand(1).getReg())

459 .addImm(MI->getOperand(2).getImm())

460 .addReg(MI->getOperand(3).getReg())

462 break;

463

464 case SystemZ::CLGRBCall:

466 .addReg(MI->getOperand(0).getReg())

467 .addReg(MI->getOperand(1).getReg())

468 .addImm(MI->getOperand(2).getImm())

469 .addReg(MI->getOperand(3).getReg())

471 break;

472

473 case SystemZ::CLIBCall:

475 .addReg(MI->getOperand(0).getReg())

476 .addImm(MI->getOperand(1).getImm())

477 .addImm(MI->getOperand(2).getImm())

478 .addReg(MI->getOperand(3).getReg())

480 break;

481

482 case SystemZ::CLGIBCall:

484 .addReg(MI->getOperand(0).getReg())

485 .addImm(MI->getOperand(1).getImm())

486 .addImm(MI->getOperand(2).getImm())

487 .addReg(MI->getOperand(3).getReg())

489 break;

490

491 case SystemZ::TLS_GDCALL:

492 LoweredMI =

494 .addReg(SystemZ::R14D)

497 break;

498

499 case SystemZ::TLS_LDCALL:

500 LoweredMI =

502 .addReg(SystemZ::R14D)

505 break;

506

507 case SystemZ::GOT:

509 .addReg(MI->getOperand(0).getReg())

511 break;

512

513 case SystemZ::IILF64:

516 .addImm(MI->getOperand(2).getImm());

517 break;

518

519 case SystemZ::IIHF64:

522 .addImm(MI->getOperand(2).getImm());

523 break;

524

525 case SystemZ::RISBHH:

526 case SystemZ::RISBHL:

528 break;

529

530 case SystemZ::RISBLH:

531 case SystemZ::RISBLL:

533 break;

534

535 case SystemZ::VLVGP32:

537 .addReg(MI->getOperand(0).getReg())

540 break;

541

542 case SystemZ::VLR32:

543 case SystemZ::VLR64:

547 break;

548

549 case SystemZ::VL:

550 Lower.lower(MI, LoweredMI);

552 break;

553

554 case SystemZ::VST:

555 Lower.lower(MI, LoweredMI);

557 break;

558

559 case SystemZ::VLM:

560 Lower.lower(MI, LoweredMI);

562 break;

563

564 case SystemZ::VSTM:

565 Lower.lower(MI, LoweredMI);

567 break;

568

569 case SystemZ::VL16:

571 break;

572

573 case SystemZ::VL32:

575 break;

576

577 case SystemZ::VL64:

579 break;

580

581 case SystemZ::VST16:

583 break;

584

585 case SystemZ::VST32:

587 break;

588

589 case SystemZ::VST64:

591 break;

592

593 case SystemZ::LFER:

595 break;

596

597 case SystemZ::LFER_16:

599 break;

600

601 case SystemZ::LEFR:

603 break;

604

605 case SystemZ::LEFR_16:

607 break;

608

609#define LOWER_LOW(NAME) \

610 case SystemZ::NAME##64: LoweredMI = lowerRILow(MI, SystemZ::NAME); break

611

623

624#undef LOWER_LOW

625

626#define LOWER_HIGH(NAME) \

627 case SystemZ::NAME##64: LoweredMI = lowerRIHigh(MI, SystemZ::NAME); break

628

640

641#undef LOWER_HIGH

642

643 case SystemZ::Serialize:

647 else

650 break;

651

652

653

654

655

656 case SystemZ::Trap: {

659

664 }

665 break;

666

667

668

669 case SystemZ::CondTrap: {

672

676 .addImm(MI->getOperand(0).getImm())

677 .addImm(MI->getOperand(1).getImm())

679 }

680 break;

681

682 case TargetOpcode::FENTRY_CALL:

683 LowerFENTRY_CALL(*MI, Lower);

684 return;

685

686 case TargetOpcode::STACKMAP:

687 LowerSTACKMAP(*MI);

688 return;

689

690 case TargetOpcode::PATCHPOINT:

691 LowerPATCHPOINT(*MI, Lower);

692 return;

693

694 case TargetOpcode::PATCHABLE_FUNCTION_ENTER:

695 LowerPATCHABLE_FUNCTION_ENTER(*MI, Lower);

696 return;

697

698 case TargetOpcode::PATCHABLE_RET:

699 LowerPATCHABLE_RET(*MI, Lower);

700 return;

701

702 case TargetOpcode::PATCHABLE_FUNCTION_EXIT:

703 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");

704

705 case TargetOpcode::PATCHABLE_TAIL_CALL:

706

707

708 llvm_unreachable("Tail call is handled in the normal case. See comments "

709 "around this assert.");

710

711 case SystemZ::EXRL_Pseudo: {

712 unsigned TargetInsOpc = MI->getOperand(0).getImm();

713 Register LenMinus1Reg = MI->getOperand(1).getReg();

714 Register DestReg = MI->getOperand(2).getReg();

715 int64_t DestDisp = MI->getOperand(3).getImm();

716 Register SrcReg = MI->getOperand(4).getReg();

717 int64_t SrcDisp = MI->getOperand(5).getImm();

718

727 auto [It, Inserted] = TS->EXRLTargets2Sym.try_emplace(ET_STI);

728 if (Inserted)

729 It->second = OutContext.createTempSymbol();

730 MCSymbol *DotSym = It->second;

734 MCInstBuilder(SystemZ::EXRL).addReg(LenMinus1Reg).addExpr(Dot));

735 return;

736 }

737

738

739

740 case SystemZ::EH_SjLj_Setup:

741 return;

742

743 default:

744 Lower.lower(MI, LoweredMI);

745 break;

746 }

748}

749

750

751

754 if (NumBytes < 2) {

756 return 0;

757 }

758 else if (NumBytes < 4) {

760 MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI);

761 return 2;

762 }

763 else if (NumBytes < 6) {

765 MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0),

766 STI);

767 return 4;

768 }

769 else {

774 MCInstBuilder(SystemZ::BRCLAsm).addImm(0).addExpr(Dot), STI);

775 return 6;

776 }

777}

778

779void SystemZAsmPrinter::LowerFENTRY_CALL(const MachineInstr &MI,

780 SystemZMCInstLower &Lower) {

781 MCContext &Ctx = MF->getContext();

782 if (MF->getFunction().hasFnAttribute("mrecord-mcount")) {

790 }

791

792 if (MF->getFunction().hasFnAttribute("mnop-mcount")) {

794 return;

795 }

796

798 const MCSymbolRefExpr *Op =

801 MCInstBuilder(SystemZ::BRASL).addReg(SystemZ::R0D).addExpr(Op),

803}

804

805void SystemZAsmPrinter::LowerSTACKMAP(const MachineInstr &MI) {

806 auto *TII = MF->getSubtarget().getInstrInfo();

807

808 unsigned NumNOPBytes = MI.getOperand(1).getImm();

809

813

814 SM.recordStackMap(*MILabel, MI);

815 assert(NumNOPBytes % 2 == 0 && "Invalid number of NOP bytes requested!");

816

817

818 unsigned ShadowBytes = 0;

819 const MachineBasicBlock &MBB = *MI.getParent();

821 ++MII;

822 while (ShadowBytes < NumNOPBytes) {

823 if (MII == MBB.end() ||

824 MII->getOpcode() == TargetOpcode::PATCHPOINT ||

825 MII->getOpcode() == TargetOpcode::STACKMAP)

826 break;

828 if (MII->isCall())

829 break;

830 ++MII;

831 }

832

833

834 while (ShadowBytes < NumNOPBytes)

837}

838

839

840

841void SystemZAsmPrinter::LowerPATCHPOINT(const MachineInstr &MI,

842 SystemZMCInstLower &Lower) {

846

847 SM.recordPatchPoint(*MILabel, MI);

848 PatchPointOpers Opers(&MI);

849

850 unsigned EncodedBytes = 0;

851 const MachineOperand &CalleeMO = Opers.getCallTarget();

852

853 if (CalleeMO.isImm()) {

854 uint64_t CallTarget = CalleeMO.getImm();

855 if (CallTarget) {

856 unsigned ScratchIdx = -1;

857 unsigned ScratchReg = 0;

858 do {

859 ScratchIdx = Opers.getNextScratchIdx(ScratchIdx + 1);

860 ScratchReg = MI.getOperand(ScratchIdx).getReg();

861 } while (ScratchReg == SystemZ::R0D);

862

863

865 .addReg(ScratchReg)

866 .addImm(CallTarget & 0xFFFFFFFF));

867 EncodedBytes += 6;

868 if (CallTarget >> 32) {

870 .addReg(ScratchReg)

871 .addImm(CallTarget >> 32));

872 EncodedBytes += 6;

873 }

874

876 .addReg(SystemZ::R14D)

877 .addReg(ScratchReg));

878 EncodedBytes += 2;

879 }

880 } else if (CalleeMO.isGlobal()) {

883 .addReg(SystemZ::R14D)

884 .addExpr(Expr));

885 EncodedBytes += 6;

886 }

887

888

889 unsigned NumBytes = Opers.getNumPatchBytes();

890 assert(NumBytes >= EncodedBytes &&

891 "Patchpoint can't request size less than the length of a call.");

892 assert((NumBytes - EncodedBytes) % 2 == 0 &&

893 "Invalid number of NOP bytes requested!");

894 while (EncodedBytes < NumBytes)

897}

898

899void SystemZAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(

900 const MachineInstr &MI, SystemZMCInstLower &Lower) {

901

902

903

904

905

906

907

908

909

910 bool HasVectorFeature =

911 TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector) &&

912 .getMCSubtargetInfo()->hasFeature(SystemZ::FeatureSoftFloat);

914 HasVectorFeature ? "__xray_FunctionEntryVec" : "__xray_FunctionEntry");

915 MCSymbol *BeginOfSled = OutContext.createTempSymbol("xray_sled_", true);

919 MCInstBuilder(SystemZ::J)

923 MCInstBuilder(SystemZ::LLILF).addReg(SystemZ::R2D).addImm(0));

925 .addReg(SystemZ::R14D)

930}

931

932void SystemZAsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,

933 SystemZMCInstLower &Lower) {

934 unsigned OpCode = MI.getOperand(0).getImm();

935 MCSymbol *FallthroughLabel = nullptr;

936 if (OpCode == SystemZ::CondReturn) {

937 FallthroughLabel = OutContext.createTempSymbol();

938 int64_t Cond0 = MI.getOperand(1).getImm();

939 int64_t Cond1 = MI.getOperand(2).getImm();

941 .addImm(Cond0)

942 .addImm(Cond1 ^ Cond0)

945 }

946

947

948

949

950

951

952

953

954

955 bool HasVectorFeature =

956 TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector) &&

957 .getMCSubtargetInfo()->hasFeature(SystemZ::FeatureSoftFloat);

959 HasVectorFeature ? "__xray_FunctionExitVec" : "__xray_FunctionExit");

960 MCSymbol *BeginOfSled = OutContext.createTempSymbol("xray_sled_", true);

963 MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D));

966 MCInstBuilder(SystemZ::LLILF).addReg(SystemZ::R2D).addImm(0));

970 if (FallthroughLabel)

971 OutStreamer->emitLabel(FallthroughLabel);

973}

974

975

976

977

978void SystemZAsmPrinter::emitAttributes(Module &M) {

979 if (M.getModuleFlag("s390x-visible-vector-ABI")) {

980 bool HasVectorFeature =

981 TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector);

982 OutStreamer->emitGNUAttribute(8, HasVectorFeature ? 2 : 1);

983 }

984}

985

986

987

989 switch (Modifier) {

998 }

1000}

1001

1005

1007 getSymbol(ZCPV->getGlobalValue()),

1010

1012}

1013

1019

1022 } else {

1025 }

1026}

1027

1029 if ( Reg )

1030 OS << '0';

1031 else

1033}

1034

1037 if (MCOp.isReg())

1039 else if (MCOp.isImm())

1040 OS << MCOp.getImm();

1041 else if (MCOp.isExpr())

1043 else

1045}

1046

1048 const MCOperand &DispMO, unsigned Index,

1051 if (Base || Index) {

1052 OS << '(';

1053 if (Index) {

1056 OS << ',';

1057 }

1060 OS << ')';

1061 }

1062}

1063

1065 const char *ExtraCode,

1070 if (ExtraCode) {

1071 if (ExtraCode[0] == 'N' && !ExtraCode[1] && MO.isReg() &&

1072 SystemZ::GR128BitRegClass.contains(MO.getReg()))

1073 MCOp =

1075 else

1077 } else {

1079 MCOp = Lower.lowerOperand(MO);

1080 }

1082 return false;

1083}

1084

1086 unsigned OpNo,

1087 const char *ExtraCode,

1089 if (ExtraCode && ExtraCode[0] && !ExtraCode[1]) {

1090 switch (ExtraCode[0]) {

1091 case 'A':

1092

1093

1094

1095 return false;

1096 case 'O':

1097 OS << MI->getOperand(OpNo + 1).getImm();

1098 return false;

1099 case 'R':

1101 return false;

1102 }

1103 }

1106 MI->getOperand(OpNo + 2).getReg(), OS);

1107 return false;

1108}

1109

1111 auto TT = OutContext.getTargetTriple();

1112 if (TT.isOSzOS()) {

1113 emitADASection();

1114 emitIDRLSection(M);

1115 }

1116 emitAttributes(M);

1117

1118

1119 getTargetStreamer()->emitEnd();

1120}

1121

1122void SystemZAsmPrinter::emitADASection() {

1124

1127

1128 unsigned EmittedBytes = 0;

1129 for (auto &Entry : ADATable.getTable()) {

1131 unsigned SlotKind;

1132 std::tie(Sym, SlotKind) = Entry.first;

1133 unsigned Offset = Entry.second;

1134 assert(Offset == EmittedBytes && "Offset not as expected");

1135 (void)EmittedBytes;

1136#define EMIT_COMMENT(Str) \

1137 OutStreamer->AddComment(Twine("Offset ") \

1138 .concat(utostr(Offset)) \

1139 .concat(" " Str " ") \

1140 .concat(Sym->getName()));

1141 switch (SlotKind) {

1143

1144

1149 PointerSize);

1153 PointerSize);

1154 EmittedBytes += PointerSize * 2;

1155 break;

1161 PointerSize);

1162 EmittedBytes += PointerSize;

1163 break;

1170

1171 EMIT_COMMENT("pointer to function descriptor");

1175 PointerSize);

1176 EmittedBytes += PointerSize;

1177 break;

1178 }

1179 default:

1181 }

1182#undef EMIT_COMMENT

1183 }

1185}

1186

1188 std::string ProductID;

1189 if (auto *MD = M.getModuleFlag("zos_product_id"))

1191 if (ProductID.empty())

1192 ProductID = "LLVM";

1193 return ProductID;

1194}

1195

1198 M.getModuleFlag("zos_product_major_version")))

1199 return VersionVal->getZExtValue();

1200 return LLVM_VERSION_MAJOR;

1201}

1202

1205 M.getModuleFlag("zos_product_minor_version")))

1206 return ReleaseVal->getZExtValue();

1207 return LLVM_VERSION_MINOR;

1208}

1209

1212 M.getModuleFlag("zos_product_patchlevel")))

1213 return PatchVal->getZExtValue();

1214 return LLVM_VERSION_PATCH;

1215}

1216

1218 std::time_t Time = 0;

1220 M.getModuleFlag("zos_translation_time"))) {

1221 long SecondsSinceEpoch = Val->getSExtValue();

1222 Time = static_cast<time_t>(SecondsSinceEpoch);

1223 }

1224 return Time;

1225}

1226

1227void SystemZAsmPrinter::emitIDRLSection(Module &M) {

1230 constexpr unsigned IDRLDataLength = 30;

1232

1235

1237

1238 SmallString<IDRLDataLength + 1> TempStr;

1239 raw_svector_ostream O(TempStr);

1240 O << formatv("{0,-10}{1,0-2:d}{2,0-2:d}{3:%Y%m%d%H%M%S}{4,0-2}",

1241 ProductID.substr(0, 10).c_str(), ProductVersion, ProductRelease,

1243 SmallString Data;

1245

1248 OutStreamer->emitInt16(IDRLDataLength);

1251}

1252

1254 if (TM.getTargetTriple().isOSzOS()) {

1255

1256

1259

1263 emitPPA1(FnEndSym);

1265

1266 CurrentFnPPA1Sym = nullptr;

1267 CurrentFnEPMarkerSym = nullptr;

1268 }

1269}

1270

1273 bool EHBlock, bool HasArgAreaLength, bool HasName) {

1274 enum class PPA1Flag1 : uint8_t {

1275 DSA64Bit = (0x80 >> 0),

1276 VarArg = (0x80 >> 7),

1278 };

1279 enum class PPA1Flag2 : uint8_t {

1280 ExternalProcedure = (0x80 >> 0),

1281 STACKPROTECTOR = (0x80 >> 3),

1283 };

1284 enum class PPA1Flag3 : uint8_t {

1285 HasArgAreaLength = (0x80 >> 1),

1286 FPRMask = (0x80 >> 2),

1288 };

1289 enum class PPA1Flag4 : uint8_t {

1290 EPMOffsetPresent = (0x80 >> 0),

1291 VRMask = (0x80 >> 2),

1292 EHBlock = (0x80 >> 3),

1293 ProcedureNamePresent = (0x80 >> 7),

1295 };

1296

1297

1298 auto Flags1 = PPA1Flag1(0);

1299 auto Flags2 = PPA1Flag2::ExternalProcedure;

1300 auto Flags3 = PPA1Flag3(0);

1301 auto Flags4 = PPA1Flag4::EPMOffsetPresent;

1302

1303 Flags1 |= PPA1Flag1::DSA64Bit;

1304

1305 if (VarArg)

1306 Flags1 |= PPA1Flag1::VarArg;

1307

1309 Flags2 |= PPA1Flag2::STACKPROTECTOR;

1310

1311 if (HasArgAreaLength)

1312 Flags3 |= PPA1Flag3::HasArgAreaLength;

1313

1314

1315 if (FPRMask)

1316 Flags3 |= PPA1Flag3::FPRMask;

1317

1318 if (VRMask)

1319 Flags4 |= PPA1Flag4::VRMask;

1320

1321 if (EHBlock)

1322 Flags4 |= PPA1Flag4::EHBlock;

1323

1324 if (HasName)

1325 Flags4 |= PPA1Flag4::ProcedureNamePresent;

1326

1327 OutStreamer->AddComment("PPA1 Flags 1");

1328 if ((Flags1 & PPA1Flag1::DSA64Bit) == PPA1Flag1::DSA64Bit)

1329 OutStreamer->AddComment(" Bit 0: 1 = 64-bit DSA");

1330 else

1331 OutStreamer->AddComment(" Bit 0: 0 = 32-bit DSA");

1332 if ((Flags1 & PPA1Flag1::VarArg) == PPA1Flag1::VarArg)

1333 OutStreamer->AddComment(" Bit 7: 1 = Vararg function");

1335

1336 OutStreamer->AddComment("PPA1 Flags 2");

1337 if ((Flags2 & PPA1Flag2::ExternalProcedure) == PPA1Flag2::ExternalProcedure)

1338 OutStreamer->AddComment(" Bit 0: 1 = External procedure");

1339 if ((Flags2 & PPA1Flag2::STACKPROTECTOR) == PPA1Flag2::STACKPROTECTOR)

1340 OutStreamer->AddComment(" Bit 3: 1 = STACKPROTECT is enabled");

1341 else

1342 OutStreamer->AddComment(" Bit 3: 0 = STACKPROTECT is not enabled");

1344

1345 OutStreamer->AddComment("PPA1 Flags 3");

1346 if ((Flags3 & PPA1Flag3::HasArgAreaLength) == PPA1Flag3::HasArgAreaLength)

1348 " Bit 1: 1 = Argument Area Length is in optional area");

1349 if ((Flags3 & PPA1Flag3::FPRMask) == PPA1Flag3::FPRMask)

1350 OutStreamer->AddComment(" Bit 2: 1 = FP Reg Mask is in optional area");

1352 static_cast<uint8_t>(Flags3));

1353

1354 OutStreamer->AddComment("PPA1 Flags 4");

1355 if ((Flags4 & PPA1Flag4::VRMask) == PPA1Flag4::VRMask)

1356 OutStreamer->AddComment(" Bit 2: 1 = Vector Reg Mask is in optional area");

1357 if ((Flags4 & PPA1Flag4::EHBlock) == PPA1Flag4::EHBlock)

1358 OutStreamer->AddComment(" Bit 3: 1 = C++ EH block");

1359 if ((Flags4 & PPA1Flag4::ProcedureNamePresent) ==

1360 PPA1Flag4::ProcedureNamePresent)

1361 OutStreamer->AddComment(" Bit 7: 1 = Name Length and Name");

1363 Flags4));

1364}

1365

1370 if (NameSize < UINT16_MAX) {

1372 } else {

1373 OutName = OutName.substr(0, UINT16_MAX);

1374 OutSize = UINT16_MAX;

1375 }

1376

1377 uint8_t ExtraZeros = 4 - ((2 + OutSize) % 4);

1378

1381 OutName = OutnameConv.str();

1382

1383 OutStreamer->AddComment("Length of Name");

1385 OutStreamer->AddComment("Name of Function");

1388}

1389

1390void SystemZAsmPrinter::emitPPA1(MCSymbol *FnEndSym) {

1391 assert(PPA2Sym != nullptr && "PPA2 Symbol not defined");

1392

1393 const TargetRegisterInfo *TRI = MF->getRegInfo().getTargetRegisterInfo();

1394 const SystemZSubtarget &Subtarget = MF->getSubtarget();

1395 const auto TargetHasVector = Subtarget.hasVector();

1396

1397 const SystemZMachineFunctionInfo *ZFI =

1398 MF->getInfo();

1399 const auto *ZFL = static_cast<const SystemZXPLINKFrameLowering *>(

1401 const MachineFrameInfo &MFFrame = MF->getFrameInfo();

1402

1403

1404 const std::vector &CSI = MFFrame.getCalleeSavedInfo();

1405 uint16_t SavedGPRMask = 0;

1406 uint16_t SavedFPRMask = 0;

1407 uint8_t SavedVRMask = 0;

1408 int64_t OffsetFPR = 0;

1409 int64_t OffsetVR = 0;

1410 const int64_t TopOfStack =

1412

1413

1414

1417 I && E && I <= E; ++I) {

1418 unsigned V = TRI->getEncodingValue((Register)I);

1419 assert(V < 16 && "GPR index out of range");

1420 SavedGPRMask |= 1 << (15 - V);

1421 }

1422

1423 for (auto &CS : CSI) {

1424 unsigned Reg = CS.getReg();

1425 unsigned I = TRI->getEncodingValue(Reg);

1426

1427 if (SystemZ::FP64BitRegClass.contains(Reg)) {

1428 assert(I < 16 && "FPR index out of range");

1429 SavedFPRMask |= 1 << (15 - I);

1430 int64_t Temp = MFFrame.getObjectOffset(CS.getFrameIdx());

1431 if (Temp < OffsetFPR)

1432 OffsetFPR = Temp;

1433 } else if (SystemZ::VR128BitRegClass.contains(Reg)) {

1434 assert(I >= 16 && I <= 23 && "VPR index out of range");

1435 unsigned BitNum = I - 16;

1436 SavedVRMask |= 1 << (7 - BitNum);

1437 int64_t Temp = MFFrame.getObjectOffset(CS.getFrameIdx());

1438 if (Temp < OffsetVR)

1439 OffsetVR = Temp;

1440 }

1441 }

1442

1443

1444 OffsetFPR += (OffsetFPR < 0) ? TopOfStack : 0;

1445 OffsetVR += (OffsetVR < 0) ? TopOfStack : 0;

1446

1447

1448 uint8_t FrameReg = TRI->getEncodingValue(TRI->getFrameRegister(*MF));

1449 uint8_t AllocaReg = ZFL->hasFP(*MF) ? FrameReg : 0;

1450 assert(AllocaReg < 16 && "Can't have alloca register larger than 15");

1451 (void)AllocaReg;

1452

1453

1454 uint32_t FrameAndFPROffset = 0;

1455 if (SavedFPRMask) {

1456 uint64_t FPRSaveAreaOffset = OffsetFPR;

1457 assert(FPRSaveAreaOffset < 0x10000000 && "Offset out of range");

1458

1459 FrameAndFPROffset = FPRSaveAreaOffset & 0x0FFFFFFF;

1460 FrameAndFPROffset |= FrameReg << 28;

1461 }

1462

1463

1464 uint32_t FrameAndVROffset = 0;

1465 if (TargetHasVector && SavedVRMask) {

1466 uint64_t VRSaveAreaOffset = OffsetVR;

1467 assert(VRSaveAreaOffset < 0x10000000 && "Offset out of range");

1468

1469 FrameAndVROffset = VRSaveAreaOffset & 0x0FFFFFFF;

1470 FrameAndVROffset |= FrameReg << 28;

1471 }

1472

1473

1475 OutStreamer->emitLabel(CurrentFnPPA1Sym);

1477 OutStreamer->emitInt8(0x02);

1478 OutStreamer->AddComment("LE Signature X'CE'");

1479 OutStreamer->emitInt8(0xCE);

1480 OutStreamer->AddComment("Saved GPR Mask");

1482 OutStreamer->AddComment("Offset to PPA2");

1483 OutStreamer->emitAbsoluteSymbolDiff(PPA2Sym, CurrentFnPPA1Sym, 4);

1484

1485 bool NeedEmitEHBlock = ->getLandingPads().empty();

1486

1487

1488

1489

1490

1491

1492

1493

1494

1495

1496

1497 bool HasArgAreaLength =

1499

1500 bool HasName =

1501 MF->getFunction().hasName() && MF->getFunction().getName().size() > 0;

1502

1505 TargetHasVector && SavedVRMask != 0, NeedEmitEHBlock,

1506 HasArgAreaLength, HasName);

1507

1508 OutStreamer->AddComment("Length/4 of Parms");

1510 static_cast<uint16_t>(ZFI->getSizeOfFnParams() / 4));

1511 OutStreamer->AddComment("Length of Code");

1512 OutStreamer->emitAbsoluteSymbolDiff(FnEndSym, CurrentFnEPMarkerSym, 4);

1513

1514 if (HasArgAreaLength) {

1515 OutStreamer->AddComment("Argument Area Length");

1517 }

1518

1519

1520 if (SavedFPRMask) {

1524 OutStreamer->emitInt16(0);

1525 OutStreamer->AddComment("FPR Save Area Locator");

1526 OutStreamer->AddComment(Twine(" Bit 0-3: Register R")

1528 .str());

1529 OutStreamer->AddComment(Twine(" Bit 4-31: Offset ")

1530 .concat(utostr(FrameAndFPROffset & 0x0FFFFFFF))

1531 .str());

1532 OutStreamer->emitInt32(FrameAndFPROffset);

1533

1534

1535 }

1536

1537

1538 if (TargetHasVector && SavedVRMask) {

1542 OutStreamer->emitInt16(0);

1543 OutStreamer->AddComment("VR Save Area Locator");

1544 OutStreamer->AddComment(Twine(" Bit 0-3: Register R")

1546 .str());

1547 OutStreamer->AddComment(Twine(" Bit 4-31: Offset ")

1548 .concat(utostr(FrameAndVROffset & 0x0FFFFFFF))

1549 .str());

1550 OutStreamer->emitInt32(FrameAndVROffset);

1551 }

1552

1553

1554 const Function *Per = nullptr;

1555 if (NeedEmitEHBlock) {

1557 MF->getFunction().getPersonalityFn()->stripPointerCasts());

1558 MCSymbol *PersonalityRoutine =

1559 Per ? MF->getTarget().getSymbol(Per) : nullptr;

1560 assert(PersonalityRoutine && "Missing personality routine");

1561

1565 OutStreamer->emitInt32(0);

1566 OutStreamer->AddComment("Personality routine");

1569 OutStreamer->AddComment("LSDA location");

1570 MCSymbol *GCCEH = MF->getContext().getOrCreateSymbol(

1571 Twine("GCC_except_table") + Twine(MF->getFunctionNumber()));

1574 }

1575

1576

1577 if (HasName)

1579

1580

1581 OutStreamer->emitAbsoluteSymbolDiff(CurrentFnEPMarkerSym, CurrentFnPPA1Sym,

1582 4);

1583}

1584

1586 if (TM.getTargetTriple().isOSzOS())

1587 emitPPA2(M);

1589}

1590

1591void SystemZAsmPrinter::emitPPA2(Module &M) {

1596

1597 const char *StartSymbolName = "CELQSTRT";

1599

1600

1603

1608

1612

1615 ostr << formatv("{0,0-2:d}{1,0-2:d}{2,0-2:d}", ProductVersion, ProductRelease,

1616 ProductPatch);

1617

1618

1619 SmallString<sizeof(CompilationTime) - 1> CompilationTimeStr;

1621

1624

1625 enum class PPA2MemberId : uint8_t {

1626

1627

1628 LE_C_Runtime = 3,

1629 };

1630 enum class PPA2MemberSubId : uint8_t {

1631

1632 C = 0x00,

1633 CXX = 0x01,

1635 Go = 0x60,

1636 LLVMBasedLang = 0xe7,

1637 };

1638

1639 enum class PPA2Flags : uint8_t {

1640 CompileForBinaryFloatingPoint = 0x80,

1641 CompiledWithXPLink = 0x01,

1642 CompiledUnitASCII = 0x04,

1643 HasServiceInfo = 0x20,

1644 };

1645

1646 PPA2MemberSubId MemberSubId = PPA2MemberSubId::LLVMBasedLang;

1647 if (auto *MD = M.getModuleFlag("zos_cu_language")) {

1649 MemberSubId = StringSwitch(Language)

1650 .Case("C", PPA2MemberSubId::C)

1651 .Case("C++", PPA2MemberSubId::CXX)

1652 .Case("Swift", PPA2MemberSubId::Swift)

1653 .Case("Go", PPA2MemberSubId::Go)

1654 .Default(PPA2MemberSubId::LLVMBasedLang);

1655 }

1656

1657

1659 OutStreamer->emitInt8(static_cast<uint8_t>(PPA2MemberId::LE_C_Runtime));

1660 OutStreamer->emitInt8(static_cast<uint8_t>(MemberSubId));

1661 OutStreamer->emitInt8(0x22);

1662 OutStreamer->emitInt8(0x04);

1663 OutStreamer->emitAbsoluteSymbolDiff(CELQSTRT, PPA2Sym, 4);

1665 OutStreamer->emitAbsoluteSymbolDiff(DateVersionSym, PPA2Sym, 4);

1667 0x00000000);

1668 uint8_t Flgs = static_cast<uint8_t>(PPA2Flags::CompileForBinaryFloatingPoint);

1669 Flgs |= static_cast<uint8_t>(PPA2Flags::CompiledWithXPLink);

1670

1671 if (auto *MD = M.getModuleFlag("zos_le_char_mode")) {

1672 const StringRef &CharMode = cast(MD)->getString();

1673 if (CharMode == "ascii") {

1674 Flgs |= static_cast<uint8_t>(

1675 PPA2Flags::CompiledUnitASCII);

1676 } else if (CharMode != "ebcdic") {

1678 "Only ascii or ebcdic are valid values for zos_le_char_mode "

1679 "metadata");

1680 }

1681 }

1682

1684 OutStreamer->emitInt8(0x00);

1685

1686

1687

1688 OutStreamer->emitInt16(0x0000);

1689

1690

1692 OutStreamer->emitBytes(CompilationTimeStr.str());

1693 OutStreamer->emitBytes(VersionStr.str());

1694

1695 OutStreamer->emitInt16(0x0000);

1696

1697

1698

1700

1701

1702 OutStreamer->AddComment("A(PPA2-CELQSTRT)");

1703 OutStreamer->emitAbsoluteSymbolDiff(PPA2Sym, CELQSTRT, 8);

1705}

1706

1709

1710 if (Subtarget.getTargetTriple().isOSzOS()) {

1712

1713

1714 std::string N(MF->getFunction().hasName()

1716 : "");

1717

1718 CurrentFnEPMarkerSym =

1720 CurrentFnPPA1Sym =

1722

1723

1728

1729

1731 if (IsLeaf)

1732 Flags |= 0x08;

1733 if (IsUsingAlloca)

1734 Flags |= 0x04;

1735

1736

1737 uint32_t DSAAndFlags = DSASize & 0xFFFFFFE0;

1738 DSAAndFlags |= Flags;

1739

1740

1741 OutStreamer->AddComment("XPLINK Routine Layout Entry");

1742 OutStreamer->emitLabel(CurrentFnEPMarkerSym);

1743 OutStreamer->AddComment("Eyecatcher 0x00C300C500C500");

1744 OutStreamer->emitIntValueInHex(0x00C300C500C500, 7);

1745 OutStreamer->AddComment("Mark Type C'1'");

1746 OutStreamer->emitInt8(0xF1);

1747 OutStreamer->AddComment("Offset to PPA1");

1748 OutStreamer->emitAbsoluteSymbolDiff(CurrentFnPPA1Sym, CurrentFnEPMarkerSym,

1749 4);

1753 if (Flags & 0x08)

1754 OutStreamer->AddComment(" Bit 1: 1 = Leaf function");

1755 else

1756 OutStreamer->AddComment(" Bit 1: 0 = Non-leaf function");

1757 if (Flags & 0x04)

1758 OutStreamer->AddComment(" Bit 2: 1 = Uses alloca");

1759 else

1760 OutStreamer->AddComment(" Bit 2: 0 = Does not use alloca");

1761 }

1763 }

1764

1766}

1767

1769

1771 "SystemZ Assembly Printer", false, false)

1772

1773

1775LLVMInitializeSystemZAsmPrinter() {

1777}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")

#define LLVM_EXTERNAL_VISIBILITY

This file provides utility functions for converting between EBCDIC-1047 and UTF-8.

Module.h This file contains the declarations for the Module class.

Machine Check Debug Module

Promote Memory to Register

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)

static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)

static MCInst lowerVecEltExtraction(const MachineInstr *MI, unsigned Opcode)

Definition SystemZAsmPrinter.cpp:142

static uint8_t getSpecifierFromModifier(SystemZCP::SystemZCPModifier Modifier)

Definition SystemZAsmPrinter.cpp:988

static void emitPPA1Name(std::unique_ptr< MCStreamer > &OutStreamer, StringRef OutName)

Definition SystemZAsmPrinter.cpp:1366

static void lowerAlignmentHint(const MachineInstr *MI, MCInst &LoweredMI, unsigned Opcode)

Definition SystemZAsmPrinter.cpp:97

#define EMIT_COMMENT(Str)

static const MCSymbolRefExpr * getGlobalOffsetTable(MCContext &Context)

Definition SystemZAsmPrinter.cpp:87

static void printFormattedRegName(const MCAsmInfo *MAI, unsigned RegNo, raw_ostream &OS)

Definition SystemZAsmPrinter.cpp:1014

static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode)

Definition SystemZAsmPrinter.cpp:43

static uint32_t getProductVersion(Module &M)

Definition SystemZAsmPrinter.cpp:1196

static std::string getProductID(Module &M)

Definition SystemZAsmPrinter.cpp:1187

static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode)

Definition SystemZAsmPrinter.cpp:57

static void printAddress(const MCAsmInfo *MAI, unsigned Base, const MCOperand &DispMO, unsigned Index, raw_ostream &OS)

Definition SystemZAsmPrinter.cpp:1047

static time_t getTranslationTime(Module &M)

Definition SystemZAsmPrinter.cpp:1217

static const MCSymbolRefExpr * getTLSGetOffset(MCContext &Context)

Definition SystemZAsmPrinter.cpp:81

static void emitPPA1Flags(std::unique_ptr< MCStreamer > &OutStreamer, bool VarArg, bool StackProtector, bool FPRMask, bool VRMask, bool EHBlock, bool HasArgAreaLength, bool HasName)

Definition SystemZAsmPrinter.cpp:1271

static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode)

Definition SystemZAsmPrinter.cpp:132

static unsigned EmitNop(MCContext &OutContext, MCStreamer &OutStreamer, unsigned NumBytes, const MCSubtargetInfo &STI)

Definition SystemZAsmPrinter.cpp:752

static MCInst lowerVecEltInsertion(const MachineInstr *MI, unsigned Opcode)

Definition SystemZAsmPrinter.cpp:151

static uint32_t getProductRelease(Module &M)

Definition SystemZAsmPrinter.cpp:1203

static MCInst lowerSubvectorLoad(const MachineInstr *MI, unsigned Opcode)

Definition SystemZAsmPrinter.cpp:122

static uint32_t getProductPatch(Module &M)

Definition SystemZAsmPrinter.cpp:1210

static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode)

Definition SystemZAsmPrinter.cpp:71

static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")

const TargetLoweringObjectFile & getObjFileLowering() const

Return information about object file lowering.

MCSymbol * getSymbol(const GlobalValue *GV) const

void EmitToStreamer(MCStreamer &S, const MCInst &Inst)

TargetMachine & TM

Target machine description.

const MCAsmInfo * MAI

Target Asm Printer information.

MachineFunction * MF

The current machine function.

virtual void emitStartOfAsmFile(Module &)

This virtual method can be overridden by targets that want to emit something at the start of their fi...

void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind, uint8_t Version=0)

MCContext & OutContext

This is the context for the output file that we are streaming.

MCSymbol * createTempSymbol(const Twine &Name) const

std::unique_ptr< MCStreamer > OutStreamer

This is the MCStreamer object for the file we are generating.

const DataLayout & getDataLayout() const

Return information about data layout.

virtual void emitFunctionEntryLabel()

EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.

const MCSubtargetInfo & getSubtargetInfo() const

Return information about subtarget.

virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

LLVM_ABI TypeSize getTypeAllocSize(Type *Ty) const

Returns the offset in bytes between successive objects of the specified type, including alignment pad...

LLVM_ABI unsigned getPointerSize(unsigned AS=0) const

The pointer representation size in bytes, rounded up to a whole number of bytes.

This class is intended to be used as a base class for asm properties and features specific to the tar...

unsigned getAssemblerDialect() const

void printExpr(raw_ostream &, const MCExpr &) const

static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx, SMLoc Loc=SMLoc())

static LLVM_ABI const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)

Context object for machine code objects.

LLVM_ABI MCSymbol * createTempSymbol()

Create a temporary symbol with a unique name.

MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)

LLVM_ABI MCSymbol * getOrCreateSymbol(const Twine &Name)

Lookup the symbol inside with the specified Name.

Base class for the full range of assembler expressions which are needed for parsing.

MCInstBuilder & addReg(MCRegister Reg)

Add a new register operand.

MCInstBuilder & addImm(int64_t Val)

Add a new integer immediate operand.

MCInstBuilder & addExpr(const MCExpr *Val)

Add a new MCExpr operand.

Instances of this class represent a single low-level machine instruction.

void addOperand(const MCOperand Op)

void setOpcode(unsigned Op)

Instances of this class represent operands of the MCInst class.

static MCOperand createReg(MCRegister Reg)

static MCOperand createImm(int64_t Val)

MCRegister getReg() const

Returns the register number.

const MCExpr * getExpr() const

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

static const MCSpecifierExpr * create(const MCExpr *Expr, Spec S, MCContext &Ctx, SMLoc Loc=SMLoc())

Streaming machine code generation interface.

Generic base class for all target subtargets.

Represent a reference to a symbol from inside an expression.

static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx, SMLoc Loc=SMLoc())

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

StringRef getName() const

getName - Get the symbol name.

MachineInstrBundleIterator< const MachineInstr > const_iterator

Abstract base class for all machine specific constantpool value subclasses.

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

bool hasVarSizedObjects() const

This method may be called any time after instruction selection is complete to determine if the stack ...

uint64_t getStackSize() const

Return the number of bytes that must be allocated to hold all of the fixed size frame objects.

uint64_t getMaxCallFrameSize() const

Return the maximum size of a call frame that must be allocated for an outgoing function call.

int64_t getOffsetAdjustment() const

Return the correction for frame offsets.

const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const

Returns a reference to call saved info vector for the current function.

bool hasStackProtectorIndex() const

int64_t getObjectOffset(int ObjectIdx) const

Return the assigned stack offset of the specified object from the incoming stack pointer.

MCContext & getContext() const

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

Representation of each machine instruction.

ArrayRef< MachineMemOperand * >::iterator mmo_iterator

LLVM_ABI const MachineFunction * getMF() const

Return the function that contains the basic block that this instruction belongs to.

MachineOperand class - Representation of each machine instruction operand.

const GlobalValue * getGlobal() const

bool isReg() const

isReg - Tests if this is a MO_Register operand.

bool isImm() const

isImm - Tests if this is a MO_Immediate operand.

MachineInstr * getParent()

getParent - Return the instruction that this operand belongs to.

unsigned getTargetFlags() const

bool isGlobal() const

isGlobal - Tests if this is a MO_GlobalAddress operand.

MachineOperandType getType() const

getType - Returns the MachineOperandType for this operand.

const char * getSymbolName() const

getReg - Returns the register number.

@ MO_GlobalAddress

Address of a global value.

@ MO_ExternalSymbol

Name of external global symbol.

A Module instance is used to store all the information related to an LLVM module.

Wrapper class representing virtual and physical registers.

SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...

StringRef str() const

Explicit conversion to StringRef.

StringRef - Represent a constant reference to a string, i.e.

constexpr StringRef substr(size_t Start, size_t N=npos) const

Return a reference to the substring from [Start, Start + N).

constexpr size_t size() const

size - Get the string size.

void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override

Definition SystemZAsmPrinter.cpp:1002

void emitFunctionBodyEnd() override

Targets can override this to emit stuff after the last basic block in the function.

Definition SystemZAsmPrinter.cpp:1253

void emitStartOfAsmFile(Module &M) override

This virtual method can be overridden by targets that want to emit something at the start of their fi...

Definition SystemZAsmPrinter.cpp:1585

void emitInstruction(const MachineInstr *MI) override

Targets should implement this to emit instructions.

Definition SystemZAsmPrinter.cpp:216

bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS) override

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...

Definition SystemZAsmPrinter.cpp:1085

void emitFunctionEntryLabel() override

EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.

Definition SystemZAsmPrinter.cpp:1707

bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS) override

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

Definition SystemZAsmPrinter.cpp:1064

void emitEndOfAsmFile(Module &M) override

This virtual method can be overridden by targets that want to emit something at the end of their file...

Definition SystemZAsmPrinter.cpp:1110

A SystemZ-specific constant pool value.

static const char * getRegisterName(MCRegister Reg)

SystemZ::GPRRegs getSpillGPRRegs() const

unsigned getSizeOfFnParams() const

const SystemZInstrInfo * getInstrInfo() const override

const TargetFrameLowering * getFrameLowering() const override

std::pair< MCInst, const MCSubtargetInfo * > MCInstSTIPair

EXRLT2SymMap EXRLTargets2Sym

virtual unsigned getInstSizeInBytes(const MachineInstr &MI) const

Returns the size in bytes of the specified MachineInstr, or ~0U when this function is not implemented...

MCSymbol * getSymbol(const GlobalValue *GV) const

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

LLVM_ABI std::string str() const

Return the twine contents as a std::string.

Twine concat(const Twine &Suffix) const

static Twine utohexstr(uint64_t Val)

This class implements an extremely fast bulk output stream that can only output to a stream.

A raw_ostream that writes to an SmallVector or SmallString.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

constexpr char Language[]

Key for Kernel::Metadata::mLanguage.

@ Swift

Calling convention for Swift.

@ C

The default llvm calling convention, compatible with C.

LLVM_ABI std::error_code convertToEBCDIC(StringRef Source, SmallVectorImpl< char > &Result)

@ MO_ADA_DATA_SYMBOL_ADDR

@ MO_ADA_DIRECT_FUNC_DESC

@ MO_ADA_INDIRECT_FUNC_DESC

unsigned getRegAsGR32(unsigned Reg)

const unsigned GR64Regs[16]

unsigned getRegAsGRH32(unsigned Reg)

unsigned getRegAsVR128(unsigned Reg)

unsigned getRegAsGR64(unsigned Reg)

constexpr size_t NameSize

std::enable_if_t< detail::IsValidPointer< X, Y >::value, X * > extract_or_null(Y &&MD)

Extract a Value from Metadata, allowing null.

UtcTime< std::chrono::seconds > toUtcTime(std::time_t T)

Convert a std::time_t to a UtcTime.

This is an optimization pass for GlobalISel generic memory operations.

Target & getTheSystemZTarget()

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

std::string utostr(uint64_t X, bool isNeg=false)

detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)

Returns a concatenated range across two or more ranges.

auto formatv(bool Validate, const char *Fmt, Ts &&...Vals)

FunctionAddr VTableAddr uintptr_t uintptr_t Version

LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)

LLVM_ATTRIBUTE_VISIBILITY_DEFAULT AnalysisKey InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key

@ LLVM_MARK_AS_BITMASK_ENUM

FunctionAddr VTableAddr uintptr_t uintptr_t Data

DWARFExpression::Operation Op

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

@ MCSA_IndirectSymbol

.indirect_symbol (MachO)

This struct is a compact representation of a valid (non-zero power of two) alignment.

RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...