SystemZMachineScheduler.cpp Source File (original) (raw)

20using namespace llvm;

22#define DEBUG_TYPE "machine-scheduler"

24#ifndef NDEBUG

26void SystemZPostRASchedStrategy::SUSet::

28 dbgs() << "{";

29 for (auto &SU : *this) {

31 if (SU != *rbegin())

32 dbgs() << ", ";

33 }

34 dbgs() << "}\n";

35}

36#endif

43 if (MBB->pred_size() == 1)

44 PredMBB = *MBB->pred_begin();

51 PredMBB = (Pred == MBB ? nullptr : Pred);

52 }

55 && "Loop MBB should not consider predecessor outside of loop.");

57 return PredMBB;

58}

60void SystemZPostRASchedStrategy::

64 ((LastEmittedMI != nullptr && LastEmittedMI->getParent() == MBB) ?

65 std::next(LastEmittedMI) : MBB->begin());

67 for (; I != NextBegin; ++I) {

68 if (I->isPosition() || I->isDebugInstr())

69 continue;

70 HazardRec->emitInstruction(&*I);

71 }

72}

75 Available.clear();

77}

80 assert ((SchedStates.find(NextMBB) == SchedStates.end()) &&

81 "Entering MBB twice?");

84 MBB = NextMBB;

91 dbgs() << ":\n";);

97 if (SinglePredMBB == nullptr)

98 return;

99 auto It = SchedStates.find(SinglePredMBB);

100 if (It == SchedStates.end())

101 return;

102

105

106 HazardRec->copyState(It->second);

108

109

110

111 for (MachineInstr &MI : SinglePredMBB->terminators()) {

112 LLVM_DEBUG(dbgs() << "** Emitting incoming branch: "; MI.dump(););

113 bool TakenBranch = (MI.isBranch() &&

114 (TII->getBranchInfo(MI).isIndirect() ||

115 TII->getBranchInfo(MI).getMBBTarget() == MBB));

116 HazardRec->emitInstruction(&MI, TakenBranch);

117 if (TakenBranch)

118 break;

119 }

120}

121

124

125

126

127 advanceTo(MBB->getFirstTerminator());

128}

129

132 : MLI(C->MLI),

134 (C->MF->getSubtarget().getInstrInfo())),

135 MBB(nullptr), HazardRec(nullptr) {

137 SchedModel.init(ST);

138}

139

141

142 for (auto I : SchedStates) {

144 delete hazrec;

145 }

146}

147

150 unsigned NumRegionInstrs) {

151

152 if (Begin->isTerminator())

153 return;

154

155

156 advanceTo(Begin);

157}

158

159

161

162 IsTopNode = true;

163

164 if (Available.empty())

165 return nullptr;

166

167

168 if (Available.size() == 1) {

170 HazardRec->dumpSU(*Available.begin(), dbgs()); dbgs() << "\n";);

171 return *Available.begin();

172 }

173

174

175 LLVM_DEBUG(dbgs() << "** Available: "; Available.dump(*HazardRec););

176

177 Candidate Best;

178 for (auto *SU : Available) {

179

180

181 Candidate c(SU, *HazardRec);

182

183

184 if (Best.SU == nullptr || c < Best) {

185 Best = c;

187 } else

189 LLVM_DEBUG(HazardRec->dumpSU(c.SU, dbgs()); c.dumpCosts();

191

192

193

194 if (!SU->isScheduleHigh && Best.noCost())

195 break;

196 }

197

198 assert (Best.SU != nullptr);

199 return Best.SU;

200}

201

202SystemZPostRASchedStrategy::Candidate::

204 SU = SU_;

205

206

207

208

210

211

213}

214

215bool SystemZPostRASchedStrategy::Candidate::

216operator<(const Candidate &other) {

217

218

219 if (GroupingCost < other.GroupingCost)

220 return true;

221 if (GroupingCost > other.GroupingCost)

222 return false;

223

224

225 if (ResourcesCost < other.ResourcesCost)

226 return true;

227 if (ResourcesCost > other.ResourcesCost)

228 return false;

229

230

231 if (SU->getHeight() > other.SU->getHeight())

232 return true;

233 if (SU->getHeight() < other.SU->getHeight())

234 return false;

235

236

237 if (SU->NodeNum < other.SU->NodeNum)

238 return true;

239

240 return false;

241}

242

245 if (Available.size() == 1) dbgs() << "(only one) ";

246 Candidate c(SU, *HazardRec); c.dumpCosts(); dbgs() << "\n";);

247

248

249 Available.erase(SU);

250 HazardRec->EmitInstruction(SU);

251}

252

254

255

259

260

261 Available.insert(SU);

262}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

static MachineBasicBlock * getSingleSchedPred(MachineBasicBlock *MBB, const MachineLoop *Loop)

Definition SystemZMachineScheduler.cpp:40

bool contains(const LoopT *L) const

Return true if the specified loop is contained within in this loop.

BlockT * getHeader() const

Represents a single loop in the control flow graph.

MachineInstrBundleIterator< MachineInstr > iterator

Representation of each machine instruction.

Scheduling unit. This is a node in the scheduling DAG.

unsigned NodeNum

Entry # of node in the node vector.

bool isUnbuffered

Uses an unbuffered resource.

unsigned getHeight() const

Returns the height of this node, which is the length of the maximum path down to any node which has n...

bool isScheduleHigh

True if preferable to schedule high.

ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions ac...

SystemZHazardRecognizer maintains the state for one MBB during scheduling.

int groupingCost(SUnit *SU) const

Return the cost of decoder grouping for SU.

void dumpSU(SUnit *SU, raw_ostream &OS) const

int resourcesCost(SUnit *SU)

Return the cost of SU in regards to processor resources usage.

SUnit * pickNode(bool &IsTopNode) override

Pick the next node to schedule, or return NULL.

Definition SystemZMachineScheduler.cpp:160

void leaveMBB() override

Tell the strategy that current MBB is done.

Definition SystemZMachineScheduler.cpp:122

~SystemZPostRASchedStrategy() override

Definition SystemZMachineScheduler.cpp:140

void initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) override

Called for a region before scheduling.

Definition SystemZMachineScheduler.cpp:148

void schedNode(SUnit *SU, bool IsTopNode) override

ScheduleDAGMI has scheduled an instruction - tell HazardRec about it.

Definition SystemZMachineScheduler.cpp:243

void initialize(ScheduleDAGMI *dag) override

Initialize the strategy after building the DAG for a new region.

Definition SystemZMachineScheduler.cpp:74

void enterMBB(MachineBasicBlock *NextMBB) override

Tell the strategy that MBB is about to be processed.

Definition SystemZMachineScheduler.cpp:79

SystemZPostRASchedStrategy(const MachineSchedContext *C)

Definition SystemZMachineScheduler.cpp:131

void releaseTopNode(SUnit *SU) override

SU has had all predecessor dependencies resolved.

Definition SystemZMachineScheduler.cpp:253

TargetSubtargetInfo - Generic base class for all target subtargets.

@ C

The default llvm calling convention, compatible with C.

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

LLVM_ABI Printable printMBBReference(const MachineBasicBlock &MBB)

Prints a machine basic block reference.

Summarize the scheduling resources required for an instruction of a particular scheduling class.

MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...