TargetPassConfig.cpp Source File (original) (raw)

53#include

54#include

55#include

57using namespace llvm;

61 cl::desc("Enable interprocedural register allocation "

62 "to reduce load/store at procedure calls."));

64 cl::desc("Disable Post Regalloc Scheduler"));

66 cl::desc("Disable branch folding"));

68 cl::desc("Disable tail duplication"));

70 cl::desc("Disable pre-register allocation tail duplication"));

74 cl::Hidden, cl::desc("Collect probability-driven block placement stats"));

76 cl::desc("Disable Stack Slot Coloring"));

78 cl::desc("Disable Machine Dead Code Elimination"));

80 cl::desc("Disable Early If-conversion"));

82 cl::desc("Disable Machine LICM"));

84 cl::desc("Disable Machine Common Subexpression Elimination"));

87 cl::desc("Enable optimized register allocation compilation path."));

90 cl::desc("Disable Machine LICM"));

92 cl::desc("Disable Machine Sinking"));

95 cl::desc("Disable PostRA Machine Sinking"));

97 cl::desc("Disable Loop Strength Reduction Pass"));

101 cl::desc("Disable Codegen Prepare"));

103 cl::desc("Disable Copy Propagation pass"));

107 "disable-atexit-based-global-dtor-lowering", cl::Hidden,

108 cl::desc("For MachO, disable atexit()-based global destructor lowering"));

110 "enable-implicit-null-checks",

111 cl::desc("Fold null checks into faulting memory operations"),

114 cl::desc("Disable MergeICmps Pass"),

118 cl::desc("Print LLVM IR input to isel pass"));

121 cl::desc("Verify generated machine code"));

124 cl::desc("Debugify MIR before and Strip debug after "

125 "each pass except those known to be unsafe "

126 "when debug info is present"));

128 "debugify-check-and-strip-all-safe", cl::Hidden,

130 "Debugify MIR before, by checking and stripping the debug info after, "

131 "each pass except those known to be unsafe when debug info is "

132 "present"));

133

135 "enable-machine-outliner", cl::desc("Enable the machine outliner"),

138 "Run on all functions guaranteed to be beneficial"),

139 clEnumValN(RunOutliner::NeverOutline, "never",

140 "Disable all outlining"),

141

142 clEnumValN(RunOutliner::AlwaysOutline, "", "")));

144 "enable-global-merge-func", cl::Hidden,

145 cl::desc("Enable global merge functions that are based on hash function"));

146

147

148

150 cl::desc("Disable the CFI fixup pass"));

151

152

153

156 cl::desc("Enable the \"fast\" instruction selector"));

157

160 cl::desc("Enable the \"global\" instruction selector"));

161

162

163

166 cl::desc("Print machine instrs after ISel"));

167

170 cl::desc("Enable abort calls when \"global\" instruction selection "

171 "fails to lower/select an instruction"),

173 clEnumValN(GlobalISelAbortMode::Disable, "0", "Disable the abort"),

174 clEnumValN(GlobalISelAbortMode::Enable, "1", "Enable the abort"),

175 clEnumValN(GlobalISelAbortMode::DisableWithDiag, "2",

176 "Disable the abort but emit a diagnostic on failure")));

177

178

179

182 cl::desc("Disable MIRProfileLoader before RegAlloc"));

183

184

187 cl::desc("Disable MIRProfileLoader before BlockPlacement"));

188

192

195 cl::desc("Flow Sensitive profile remapping file name."), cl::Hidden);

196

197

198

199

200

201

205 "Run MachineScheduler post regalloc (independent of preRA sched)"));

206

207

209 cl::desc("Run live interval analysis earlier in the pipeline"));

210

212 "disable-replace-with-vec-lib", cl::Hidden,

213 cl::desc("Disable replace with vector math call pass"));

214

215

216

217

222

225 cl::desc("Resume compilation after a specific pass"),

227

230 cl::desc("Resume compilation before a specific pass"),

232

235 cl::desc("Stop compilation after a specific pass"),

237

240 cl::desc("Stop compilation before a specific pass"),

242

243

245 "enable-split-machine-functions", cl::Hidden,

246 cl::desc("Split out cold blocks from machine functions based on profile "

247 "information."));

248

249

252 cl::desc("Disable the expand reduction intrinsics pass from running"));

253

254

257 cl::desc("Disable the select-optimization pass from running"));

258

259

262 cl::desc("Enable garbage-collecting empty basic blocks"));

263

266 cl::desc("Split static data sections into hot and cold "

267 "sections using profile information"));

268

269

270

271

272

274 bool Override) {

275 if (Override)

277 return PassID;

278}

279

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336 return TargetID;

337}

338

339

340

344 const std::optional &PGOOpt = TM->getPGOOption();

346 return std::string();

347 return PGOOpt->ProfileFile;

348}

349

350

351

355 const std::optional &PGOOpt = TM->getPGOOption();

357 return std::string();

358 return PGOOpt->ProfileRemappingFile;

359}

360

361

362

363

364

366 "Target Pass Configuration", false, false)

368

369namespace {

370

374

376 : TargetPassID(TargetPassID), InsertedPassID(InsertedPassID) {}

377

379 assert(InsertedPassID.isValid() && "Illegal Pass ID!");

383 assert(NP && "Pass ID not registered");

384 return NP;

385 }

386};

387

388}

389

390namespace llvm {

391

393

395public:

396

397

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399

400

401

402

404

405

406

408};

409

410}

411

412

415}

416

419 return nullptr;

420

423 if (!PI)

425 Twine("\" pass is not registered."));

426 return PI;

427}

428

432}

433

434static std::pair<StringRef, unsigned>

437 std::tie(Name, InstanceNumStr) = PassName.split(',');

438

439 unsigned InstanceNum = 0;

440 if (!InstanceNumStr.empty() && InstanceNumStr.getAsInteger(10, InstanceNum))

442

443 return std::make_pair(Name, InstanceNum);

444}

445

446void TargetPassConfig::setStartStopPasses() {

448 std::tie(StartBeforeName, StartBeforeInstanceNum) =

450

452 std::tie(StartAfterName, StartAfterInstanceNum) =

454

456 std::tie(StopBeforeName, StopBeforeInstanceNum)

458

460 std::tie(StopAfterName, StopAfterInstanceNum)

462

467 if (StartBefore && StartAfter)

470 if (StopBefore && StopAfter)

473 Started = (StartAfter == nullptr) && (StartBefore == nullptr);

474}

475

478

479#define SET_OPTION(Option) \

480 if (Option.getNumOccurrences()) \

481 Opt.Option = Option;

482

494

495#define SET_BOOLEAN_OPTION(Option) Opt.Option = Option;

496

515

516 return Opt;

517}

518

521

522

524

525#define DISABLE_PASS(Option, Name) \

526 if (Option && P.contains(#Name)) \

527 return false;

542

543 return true;

544 });

545}

546

549 auto [StartBefore, StartBeforeInstanceNum] =

551 auto [StartAfter, StartAfterInstanceNum] =

553 auto [StopBefore, StopBeforeInstanceNum] =

555 auto [StopAfter, StopAfterInstanceNum] =

557

558 if (!StartBefore.empty() && !StartAfter.empty())

559 return make_error(

561 std::make_error_code(std::errc::invalid_argument));

562 if (!StopBefore.empty() && !StopAfter.empty())

563 return make_error(

565 std::make_error_code(std::errc::invalid_argument));

566

568 Result.StartPass = StartBefore.empty() ? StartAfter : StartBefore;

569 Result.StopPass = StopBefore.empty() ? StopAfter : StopBefore;

570 Result.StartInstanceNum =

571 StartBefore.empty() ? StartAfterInstanceNum : StartBeforeInstanceNum;

572 Result.StopInstanceNum =

573 StopBefore.empty() ? StopAfterInstanceNum : StopBeforeInstanceNum;

574 Result.StartAfter = !StartAfter.empty();

575 Result.StopAfter = !StopAfter.empty();

576 Result.StartInstanceNum += Result.StartInstanceNum == 0;

577 Result.StopInstanceNum += Result.StopInstanceNum == 0;

578 return Result;

579}

580

581

582

586

587

588

590

591

594

597 else {

598

600 }

601

604

607

608 setStartStopPasses();

609}

610

613}

614

615

619 TargetPassID != InsertedPassID.getID()) ||

622 "Insert a pass after itself!");

624}

625

626

627

628

629

633}

634

637 report_fatal_error("Trying to construct TargetPassConfig without a target "

638 "machine. Scheduling a CodeGen pass without a target "

639 "triple set?");

640}

641

644}

645

649}

650

653 return std::string();

654 std::string Res;

659 bool IsFirst = true;

660 for (int Idx = 0; Idx < 4; ++Idx)

661 if (!PassNames[Idx]->empty()) {

662 if (!IsFirst)

663 Res += " and ";

664 IsFirst = false;

665 Res += OptNames[Idx];

666 }

667 return Res;

668}

669

670

673 Opt = Val;

674}

675

679}

680

685 return ID;

686 return I->second;

687}

688

694}

695

696

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707

709

710 if (StartBefore == PassID && StartBeforeCount++ == StartBeforeInstanceNum)

711 Started = true;

712 if (StopBefore == PassID && StopBeforeCount++ == StopBeforeInstanceNum)

713 Stopped = true;

714 if (Started && !Stopped) {

715 if (AddingMachinePasses) {

716

717 std::string Banner =

718 std::string("After ") + std::string(P->getPassName());

722 } else {

724 }

725

726

728 if (IP.TargetPassID == PassID)

729 addPass(IP.getInsertedPass());

730 } else {

731 delete P;

732 }

733

734 if (StopAfter == PassID && StopAfterCount++ == StopAfterInstanceNum)

735 Stopped = true;

736

737 if (StartAfter == PassID && StartAfterCount++ == StartAfterInstanceNum)

738 Started = true;

739 if (Stopped && !Started)

740 report_fatal_error("Cannot stop compilation after pass that is not run");

741}

742

743

744

745

746

747

752 return nullptr;

753

757 else {

759 if ()

761 }

763 addPass(P);

764

765 return FinalID;

766}

767

771}

772

776}

777

780#ifdef EXPENSIVE_CHECKS

783#endif

786}

787

790}

791

794}

795

798}

799

801 if (AllowDebugify && DebugifyIsSafe &&

805}

806

808 if (DebugifyIsSafe) {

814 }

816}

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841 }

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850 }

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895}

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901 assert(MCAI && "No MCAsmInfo");

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909

911 [[fallthrough]];

917 break;

919

920

921

924 break;

926

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929

932 break;

935

936

938 break;

939 }

940}

941

942

943

947}

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970 dbgs(), "\n\n*** Final LLVM Code input to ISel ***\n"));

971

972

973

976}

977

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981

982

984 SelectorType Selector;

985

987 Selector = SelectorType::FastISel;

991 Selector = SelectorType::GlobalISel;

994 Selector = SelectorType::FastISel;

995 else

996 Selector = SelectorType::SelectionDAG;

997

998

999 if (Selector == SelectorType::FastISel) {

1002 } else if (Selector == SelectorType::GlobalISel) {

1005 }

1006

1007

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1018 DebugifyIsSafe = false;

1019

1020

1021 if (Selector == SelectorType::GlobalISel) {

1022 SaveAndRestore SavedAddingMachinePasses(AddingMachinePasses, true);

1024 return true;

1025

1027

1029 return true;

1030

1031

1032

1034

1036 return true;

1037

1039

1041 return true;

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1043

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1050 return true;

1051

1053 return true;

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1061

1062 return false;

1063}

1064

1068

1077

1079}

1080

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1086 cl::desc("Register allocator to use"));

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1107 AddingMachinePasses = true;

1108

1109

1112 } else {

1113

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1116 }

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1127 DebugifyIsSafe = false;

1128

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1130

1138 nullptr));

1139 }

1140

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1145 else

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1159 }

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1186 else

1188 }

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1222 bool RunOnAllFunctions =

1224 bool AddOutliner =

1226 if (AddOutliner)

1228 }

1229

1232

1236

1237

1238

1239

1240

1241

1245 if (!ProfileFile.empty()) {

1250 } else {

1251

1252

1254 << "Using AutoFDO without FSDiscriminator for MFS may regress "

1255 "performance.\n";

1256 }

1257 }

1261 }

1262

1263

1270 }

1272 }

1273

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1284 AddingMachinePasses = false;

1285}

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1324}

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1336 }

1338}

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1346 "pick register allocator based on -O option",

1348

1352}

1353

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1361

1363 if (Optimized)

1365 else

1367}

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1385 return Ctor();

1386

1387

1389}

1390

1394}

1395

1399 report_fatal_error("Must use fast (default) register allocator for unoptimized regalloc.");

1400

1402

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1404

1406 return true;

1407}

1408

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1420

1422 return true;

1423}

1424

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1426

1428 return RegAlloc.getNumOccurrences() == 0;

1429}

1430

1431

1432

1436

1438}

1439

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1498 }

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1522}

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1527 return true;

1528}

1529

1530

1539 nullptr));

1540 }

1542

1545 }

1546}

1547

1548

1549

1550

1553}

1554

1557}

1558

1560 return true;

1561}

1562

1564 return std::make_unique();

1565}

This is the interface for LLVM's primary stateless and local alias analysis.

#define clEnumValN(ENUMVAL, FLAGNAME, DESC)

Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx

This file defines the DenseMap class.

This file contains an interface for creating legacy passes to print out IR in various granularities.

ppc ctr loops PowerPC CTR Loops Verify

PassInstrumentationCallbacks PIC

This file defines the Pass Instrumentation classes that provide instrumentation points into the pass ...

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file provides utility classes that use RAII to save and restore values.

This is the interface for a metadata-based scoped no-alias analysis.

This file defines the SmallVector class.

static const char StopAfterOptName[]

static cl::opt< bool > DisableExpandReductions("disable-expand-reductions", cl::init(false), cl::Hidden, cl::desc("Disable the expand reduction intrinsics pass from running"))

Disable the expand reductions pass for testing.

static cl::opt< bool > EnableImplicitNullChecks("enable-implicit-null-checks", cl::desc("Fold null checks into faulting memory operations"), cl::init(false), cl::Hidden)

static cl::opt< bool > DisableMachineSink("disable-machine-sink", cl::Hidden, cl::desc("Disable Machine Sinking"))

static cl::opt< cl::boolOrDefault > DebugifyAndStripAll("debugify-and-strip-all-safe", cl::Hidden, cl::desc("Debugify MIR before and Strip debug after " "each pass except those known to be unsafe " "when debug info is present"))

static llvm::once_flag InitializeDefaultRegisterAllocatorFlag

A dummy default pass factory indicates whether the register allocator is overridden on the command li...

static cl::opt< bool > DisableAtExitBasedGlobalDtorLowering("disable-atexit-based-global-dtor-lowering", cl::Hidden, cl::desc("For MachO, disable atexit()-based global destructor lowering"))

static cl::opt< RegisterRegAlloc::FunctionPassCtor, false, RegisterPassParser< RegisterRegAlloc > > RegAlloc("regalloc", cl::Hidden, cl::init(&useDefaultRegisterAllocator), cl::desc("Register allocator to use"))

static cl::opt< bool > PrintISelInput("print-isel-input", cl::Hidden, cl::desc("Print LLVM IR input to isel pass"))

static FunctionPass * useDefaultRegisterAllocator()

-regalloc=... command line option.

static cl::opt< bool > DisablePostRASched("disable-post-ra", cl::Hidden, cl::desc("Disable Post Regalloc Scheduler"))

static cl::opt< bool > EnableBlockPlacementStats("enable-block-placement-stats", cl::Hidden, cl::desc("Collect probability-driven block placement stats"))

static cl::opt< bool > DisableMachineDCE("disable-machine-dce", cl::Hidden, cl::desc("Disable Machine Dead Code Elimination"))

static std::string getFSRemappingFile(const TargetMachine *TM)

static const char StopBeforeOptName[]

static AnalysisID getPassIDFromName(StringRef PassName)

static cl::opt< bool > DisableEarlyIfConversion("disable-early-ifcvt", cl::Hidden, cl::desc("Disable Early If-conversion"))

static cl::opt< bool > DisableReplaceWithVecLib("disable-replace-with-vec-lib", cl::Hidden, cl::desc("Disable replace with vector math call pass"))

static cl::opt< bool > EnableMachineFunctionSplitter("enable-split-machine-functions", cl::Hidden, cl::desc("Split out cold blocks from machine functions based on profile " "information."))

Enable the machine function splitter pass.

static IdentifyingPassPtr overridePass(AnalysisID StandardID, IdentifyingPassPtr TargetID)

Allow standard passes to be disabled by the command line, regardless of who is adding the pass.

static std::pair< StringRef, unsigned > getPassNameAndInstanceNum(StringRef PassName)

static cl::opt< bool > PrintAfterISel("print-after-isel", cl::init(false), cl::Hidden, cl::desc("Print machine instrs after ISel"))

static cl::opt< cl::boolOrDefault > VerifyMachineCode("verify-machineinstrs", cl::Hidden, cl::desc("Verify generated machine code"))

static cl::opt< bool > DisablePartialLibcallInlining("disable-partial-libcall-inlining", cl::Hidden, cl::desc("Disable Partial Libcall Inlining"))

#define SET_BOOLEAN_OPTION(Option)

static cl::opt< std::string > StartAfterOpt(StringRef(StartAfterOptName), cl::desc("Resume compilation after a specific pass"), cl::value_desc("pass-name"), cl::init(""), cl::Hidden)

static cl::opt< bool > DisableBlockPlacement("disable-block-placement", cl::Hidden, cl::desc("Disable probability-driven block placement"))

static cl::opt< bool > DisableRAFSProfileLoader("disable-ra-fsprofile-loader", cl::init(false), cl::Hidden, cl::desc("Disable MIRProfileLoader before RegAlloc"))

static cl::opt< std::string > StopAfterOpt(StringRef(StopAfterOptName), cl::desc("Stop compilation after a specific pass"), cl::value_desc("pass-name"), cl::init(""), cl::Hidden)

static void initializeDefaultRegisterAllocatorOnce()

static cl::opt< bool > DisableSelectOptimize("disable-select-optimize", cl::init(true), cl::Hidden, cl::desc("Disable the select-optimization pass from running"))

Disable the select optimization pass.

static cl::opt< std::string > FSRemappingFile("fs-remapping-file", cl::init(""), cl::value_desc("filename"), cl::desc("Flow Sensitive profile remapping file name."), cl::Hidden)

static cl::opt< bool > DisableCFIFixup("disable-cfi-fixup", cl::Hidden, cl::desc("Disable the CFI fixup pass"))

static cl::opt< bool > SplitStaticData("split-static-data", cl::Hidden, cl::init(false), cl::desc("Split static data sections into hot and cold " "sections using profile information"))

static cl::opt< bool > DisablePostRAMachineLICM("disable-postra-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))

static const char StartBeforeOptName[]

static const PassInfo * getPassInfo(StringRef PassName)

static cl::opt< bool > EarlyLiveIntervals("early-live-intervals", cl::Hidden, cl::desc("Run live interval analysis earlier in the pipeline"))

static cl::opt< bool > DisableMachineLICM("disable-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))

static cl::opt< cl::boolOrDefault > EnableGlobalISelOption("global-isel", cl::Hidden, cl::desc("Enable the \"global\" instruction selector"))

static cl::opt< bool > DisableTailDuplicate("disable-tail-duplicate", cl::Hidden, cl::desc("Disable tail duplication"))

static cl::opt< bool > DisablePostRAMachineSink("disable-postra-machine-sink", cl::Hidden, cl::desc("Disable PostRA Machine Sinking"))

static const char StartAfterOptName[]

Option names for limiting the codegen pipeline.

static cl::opt< bool > EnableIPRA("enable-ipra", cl::init(false), cl::Hidden, cl::desc("Enable interprocedural register allocation " "to reduce load/store at procedure calls."))

static cl::opt< bool > DisableCGP("disable-cgp", cl::Hidden, cl::desc("Disable Codegen Prepare"))

static std::string getFSProfileFile(const TargetMachine *TM)

static cl::opt< std::string > StartBeforeOpt(StringRef(StartBeforeOptName), cl::desc("Resume compilation before a specific pass"), cl::value_desc("pass-name"), cl::init(""), cl::Hidden)

static IdentifyingPassPtr applyDisable(IdentifyingPassPtr PassID, bool Override)

Allow standard passes to be disabled by command line options.

static cl::opt< bool > GCEmptyBlocks("gc-empty-basic-blocks", cl::init(false), cl::Hidden, cl::desc("Enable garbage-collecting empty basic blocks"))

Enable garbage-collecting empty basic blocks.

static cl::opt< GlobalISelAbortMode > EnableGlobalISelAbort("global-isel-abort", cl::Hidden, cl::desc("Enable abort calls when \"global\" instruction selection " "fails to lower/select an instruction"), cl::values(clEnumValN(GlobalISelAbortMode::Disable, "0", "Disable the abort"), clEnumValN(GlobalISelAbortMode::Enable, "1", "Enable the abort"), clEnumValN(GlobalISelAbortMode::DisableWithDiag, "2", "Disable the abort but emit a diagnostic on failure")))

static cl::opt< bool > DisableEarlyTailDup("disable-early-taildup", cl::Hidden, cl::desc("Disable pre-register allocation tail duplication"))

static cl::opt< bool > DisableConstantHoisting("disable-constant-hoisting", cl::Hidden, cl::desc("Disable ConstantHoisting"))

static cl::opt< cl::boolOrDefault > EnableFastISelOption("fast-isel", cl::Hidden, cl::desc("Enable the \"fast\" instruction selector"))

static cl::opt< bool > DisableSSC("disable-ssc", cl::Hidden, cl::desc("Disable Stack Slot Coloring"))

static cl::opt< bool > EnableGlobalMergeFunc("enable-global-merge-func", cl::Hidden, cl::desc("Enable global merge functions that are based on hash function"))

static cl::opt< bool > DisableBranchFold("disable-branch-fold", cl::Hidden, cl::desc("Disable branch folding"))

#define DISABLE_PASS(Option, Name)

static RegisterRegAlloc defaultRegAlloc("default", "pick register allocator based on -O option", useDefaultRegisterAllocator)

static cl::opt< std::string > StopBeforeOpt(StringRef(StopBeforeOptName), cl::desc("Stop compilation before a specific pass"), cl::value_desc("pass-name"), cl::init(""), cl::Hidden)

static cl::opt< bool > DisableMachineCSE("disable-machine-cse", cl::Hidden, cl::desc("Disable Machine Common Subexpression Elimination"))

static cl::opt< bool > DisableLayoutFSProfileLoader("disable-layout-fsprofile-loader", cl::init(false), cl::Hidden, cl::desc("Disable MIRProfileLoader before BlockPlacement"))

static cl::opt< bool > MISchedPostRA("misched-postra", cl::Hidden, cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)"))

static cl::opt< bool > DisableMergeICmps("disable-mergeicmps", cl::desc("Disable MergeICmps Pass"), cl::init(false), cl::Hidden)

static cl::opt< RunOutliner > EnableMachineOutliner("enable-machine-outliner", cl::desc("Enable the machine outliner"), cl::Hidden, cl::ValueOptional, cl::init(RunOutliner::TargetDefault), cl::values(clEnumValN(RunOutliner::AlwaysOutline, "always", "Run on all functions guaranteed to be beneficial"), clEnumValN(RunOutliner::NeverOutline, "never", "Disable all outlining"), clEnumValN(RunOutliner::AlwaysOutline, "", "")))

static cl::opt< bool > DisableCopyProp("disable-copyprop", cl::Hidden, cl::desc("Disable Copy Propagation pass"))

static cl::opt< cl::boolOrDefault > OptimizeRegAlloc("optimize-regalloc", cl::Hidden, cl::desc("Enable optimized register allocation compilation path."))

static cl::opt< bool > DisableLSR("disable-lsr", cl::Hidden, cl::desc("Disable Loop Strength Reduction Pass"))

static cl::opt< std::string > FSProfileFile("fs-profile-file", cl::init(""), cl::value_desc("filename"), cl::desc("Flow Sensitive profile file name."), cl::Hidden)

static cl::opt< cl::boolOrDefault > DebugifyCheckAndStripAll("debugify-check-and-strip-all-safe", cl::Hidden, cl::desc("Debugify MIR before, by checking and stripping the debug info after, " "each pass except those known to be unsafe when debug info is " "present"))

#define SET_OPTION(Option)

Target-Independent Code Generator Pass Configuration Options pass.

This pass exposes codegen information to IR-level passes.

This is the interface for a metadata-based TBAA.

Defines the virtual file system interface vfs::FileSystem.

static const char PassName[]

virtual TargetPassConfig * createPassConfig(PassManagerBase &PM) override

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...

This pass is required by interprocedural register allocation.

Tagged union holding either a T or a Error.

This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...

FunctionPass class - This class is used to implement most global optimizations.

Discriminated union of Pass ID types.

Pass * getInstance() const

ImmutablePass class - This class is used to provide information that does not need to be run.

This class is intended to be used as a base class for asm properties and features specific to the tar...

ExceptionHandling getExceptionHandlingType() const

DenseMap< AnalysisID, IdentifyingPassPtr > TargetPasses

SmallVector< InsertedPass, 4 > InsertedPasses

Store the pairs of <AnalysisID, AnalysisID> of which the second pass is inserted after each instance ...

PassInfo class - An instance of this class exists for every pass known by the system,...

const void * getTypeInfo() const

getTypeInfo - Return the id object for the pass... TODO : Rename

PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...

static PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

const PassInfo * getPassInfo(const void *TI) const

getPassInfo - Look up a pass' corresponding PassInfo, indexed by the pass' type identifier (&MyPass::...

Pass interface - Implemented by all 'passes'.

static Pass * createPass(AnalysisID ID)

AnalysisID getPassID() const

getPassID - Return the PassID number that corresponds to this pass.

RegisterPassParser class - Handle the addition of new machine passes.

static FunctionPassCtor getDefault()

static void setDefault(FunctionPassCtor C)

FunctionPass *(*)() FunctionPassCtor

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

reference emplace_back(ArgTypes &&... Args)

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

bool getAsInteger(unsigned Radix, T &Result) const

Parse the current string as an integer of the specified radix.

constexpr bool empty() const

empty - Check if the string is empty.

Primary interface to the complete machine description for the target machine.

CodeGenOptLevel getOptLevel() const

Returns the optimization level: None, Less, Default, or Aggressive.

const Triple & getTargetTriple() const

void setFastISel(bool Enable)

const MemoryBuffer * getBBSectionsFuncListBuf() const

Get the list of functions and basic block ids that need unique sections.

bool useEmulatedTLS() const

Returns true if this target uses emulated TLS.

virtual bool targetSchedulesPostRAScheduling() const

True if subtarget inserts the final scheduling pass on its own.

bool requiresStructuredCFG() const

virtual bool isMachineVerifierClean() const

Returns true if the target is expected to pass all machine verifier checks.

void setGlobalISel(bool Enable)

TargetIRAnalysis getTargetIRAnalysis() const

Get a TargetIRAnalysis appropriate for the target.

bool getO0WantsFastISel()

void setO0WantsFastISel(bool Enable)

virtual bool useIPRA() const

True if the target wants to use interprocedural register allocation by default.

llvm::BasicBlockSection getBBSectionsType() const

If basic blocks should be emitted into their own section, corresponding to -fbasic-block-sections.

const MCAsmInfo * getMCAsmInfo() const

Return target specific asm information.

unsigned EnableMachineOutliner

Enables the MachineOutliner pass.

GlobalISelAbortMode GlobalISelAbort

EnableGlobalISelAbort - Control abort behaviour when global instruction selection fails to lower/sele...

unsigned EnableCFIFixup

Enable the CFIFixup pass.

unsigned SupportsDefaultOutlining

Set if the target supports default outlining behaviour.

unsigned EnableMachineFunctionSplitter

Enables the MachineFunctionSplitter pass.

unsigned EnableIPRA

This flag enables InterProcedural Register Allocation (IPRA).

unsigned EnableGlobalISel

EnableGlobalISel - This flag enables global instruction selection.

Target-Independent Code Generator Pass Configuration Options.

bool usingDefaultRegAlloc() const

Return true if the default global register allocator is in use and has not be overriden on the comman...

bool requiresCodeGenSCCOrder() const

void addCheckDebugPass()

Add a pass to check synthesized debug info for MIR.

virtual void addPreLegalizeMachineIR()

This method may be implemented by targets that want to run passes immediately before legalization.

void addPrintPass(const std::string &Banner)

Add a pass to print the machine function if printing is enabled.

virtual void addPreEmitPass2()

Targets may add passes immediately before machine code is emitted in this callback.

virtual std::unique_ptr< CSEConfigBase > getCSEConfig() const

Returns the CSEConfig object to use for the current optimization level.

bool EnableLoopTermFold

Enable LoopTermFold immediately after LSR.

void printAndVerify(const std::string &Banner)

printAndVerify - Add a pass to dump then verify the machine function, if those steps are enabled.

static bool hasLimitedCodeGenPipeline()

Returns true if one of the -start-after, -start-before, -stop-after or -stop-before options is set.

static Expected< StartStopInfo > getStartStopInfo(PassInstrumentationCallbacks &PIC)

Returns pass name in -stop-before or -stop-after NOTE: New pass manager migration only.

~TargetPassConfig() override

virtual void addCodeGenPrepare()

Add pass to prepare the LLVM IR for code generation.

void insertPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID)

Insert InsertedPassID pass after TargetPassID pass.

void addMachinePostPasses(const std::string &Banner)

Add standard passes after a pass that has just been added.

virtual void addPreSched2()

This method may be implemented by targets that want to run passes after prolog-epilog insertion and b...

virtual bool isGISelCSEEnabled() const

Check whether continuous CSE should be enabled in GISel passes.

virtual bool addILPOpts()

Add passes that optimize instruction level parallelism for out-of-order targets.

virtual void addPostRegAlloc()

This method may be implemented by targets that want to run passes after register allocation pass pipe...

void addDebugifyPass()

Add a pass to add synthesized debug info to the MIR.

virtual bool addInstSelector()

addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...

CodeGenOptLevel getOptLevel() const

virtual bool addPreISel()

Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...

void setOpt(bool &Opt, bool Val)

virtual void addBlockPlacement()

Add standard basic block placement passes.

virtual FunctionPass * createRegAllocPass(bool Optimized)

addMachinePasses helper to create the target-selected or overriden regalloc pass.

virtual void addPostBBSections()

This pass may be implemented by targets that want to run passes immediately after basic block section...

virtual void addOptimizedRegAlloc()

addOptimizedRegAlloc - Add passes related to register allocation.

virtual bool addRegAssignAndRewriteFast()

Add core register allocator passes which do the actual register assignment and rewriting.

virtual void addPreEmitPass()

This pass may be implemented by targets that want to run passes immediately before machine code is em...

bool isGlobalISelAbortEnabled() const

Check whether or not GlobalISel should abort on error.

bool getOptimizeRegAlloc() const

Return true if the optimized regalloc pipeline is enabled.

bool isCustomizedRegAlloc()

Return true if register allocator is specified by -regalloc=override.

virtual void addPreRegBankSelect()

This method may be implemented by targets that want to run passes immediately before the register ban...

virtual bool reportDiagnosticWhenGlobalISelFallback() const

Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path.

virtual bool addPreRewrite()

addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is...

virtual bool addRegBankSelect()

This method should install a register bank selector pass, which assigns register banks to virtual reg...

void setRequiresCodeGenSCCOrder(bool Enable=true)

virtual void addMachineLateOptimization()

Add passes that optimize machine instructions after register allocation.

virtual void addMachinePasses()

Add the complete, standard set of LLVM CodeGen passes.

virtual void addIRPasses()

Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...

virtual void addPreGlobalInstructionSelect()

This method may be implemented by targets that want to run passes immediately before the (global) ins...

virtual void addFastRegAlloc()

addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast registe...

virtual bool addLegalizeMachineIR()

This method should install a legalize pass, which converts the instruction sequence into one that can...

virtual void addMachineSSAOptimization()

addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.

void substitutePass(AnalysisID StandardID, IdentifyingPassPtr TargetID)

Allow the target to override a specific pass without overriding the pass pipeline.

virtual bool addRegAssignAndRewriteOptimized()

virtual bool addGlobalInstructionSelect()

This method should install a (global) instruction selector pass, which converts possibly generic inst...

virtual void addPreRegAlloc()

This method may be implemented by targets that want to run passes immediately before register allocat...

static std::string getLimitedCodeGenPipelineReason()

If hasLimitedCodeGenPipeline is true, this method returns a string with the name of the options that ...

AnalysisID addPass(AnalysisID PassID)

Utilities for targets to add passes to the pass manager.

void addPassesToHandleExceptions()

Add passes to lower exception handling for the code generator.

void addStripDebugPass()

Add a pass to remove debug info from the MIR.

bool isPassSubstitutedOrOverridden(AnalysisID ID) const

Return true if the pass has been substituted by the target or overridden on the command line.

bool addCoreISelPasses()

Add the actual instruction selection passes.

virtual void addISelPrepare()

Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.

static bool willCompleteCodeGenPipeline()

Returns true if none of the -stop-before and -stop-after options is set.

void addMachinePrePasses(bool AllowDebugify=true)

Add standard passes before a pass that's about to be added.

virtual bool addGCPasses()

addGCPasses - Add late codegen passes that analyze code for garbage collection.

virtual bool addIRTranslator()

This method should install an IR translator pass, which converts from LLVM code to machine instructio...

void addVerifyPass(const std::string &Banner)

Add a pass to perform basic verification of the machine function if verification is enabled.

virtual FunctionPass * createTargetRegisterAllocator(bool Optimized)

createTargetRegisterAllocator - Create the register allocator pass for this target at the current opt...

virtual bool addPostFastRegAllocRewrite()

addPostFastRegAllocRewrite - Add passes to the optimized register allocation pipeline after fast regi...

IdentifyingPassPtr getPassSubstitution(AnalysisID StandardID) const

Return the pass substituted for StandardID by the target.

bool addISelPasses()

High level function that adds all passes necessary to go from llvm IR representation to the MI repres...

virtual void addPostRewrite()

Add passes to be run immediately after virtual registers are rewritten to physical registers.

bool isOSBinFormatMachO() const

Tests whether the environment is MachO.

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

static raw_ostream & warning()

Convenience method for printing "warning: " to stderr.

int getNumOccurrences() const

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

virtual void add(Pass *P)=0

Add a pass to the queue of passes to run.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

ValuesClass values(OptsTy... Options)

Helper to build a ValuesClass by forwarding a variable number of arguments as an initializer list to ...

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

FunctionPass * createFastRegisterAllocator()

FastRegisterAllocation Pass - This pass register allocates as fast as possible.

char & EarlyMachineLICMID

This pass performs loop invariant code motion on machine instructions.

char & GCMachineCodeAnalysisID

GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.

char & FEntryInserterID

This pass inserts FEntry calls.

FunctionPass * createUnreachableBlockEliminationPass()

createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...

FunctionPass * createSjLjEHPreparePass(const TargetMachine *TM)

createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...

char & GCLoweringID

GCLowering Pass - Used by gc.root to perform its default lowering operations.

void registerCodeGenCallback(PassInstrumentationCallbacks &PIC, TargetMachine &)

char & RegisterCoalescerID

RegisterCoalescer - This pass merges live ranges to eliminate copies.

ModulePass * createGlobalMergeFuncPass()

This pass performs merging similar functions globally.

FunctionPass * createGreedyRegisterAllocator()

Greedy register allocation pass - This pass implements a global register allocator for optimized buil...

MachineFunctionPass * createBasicBlockPathCloningPass()

FunctionPass * createConstantHoistingPass()

FunctionPass * createSafeStackPass()

This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...

char & MachineSinkingID

MachineSinking - This pass performs sinking on machine instructions.

@ SjLj

setjmp/longjmp based exceptions

@ ZOS

z/OS MVS Exception Handling.

@ None

No exception support.

@ AIX

AIX Exception Handling.

@ DwarfCFI

DWARF-like instruction based exceptions.

@ WinEH

Windows Exception Handling.

@ Wasm

WebAssembly Exception Handling.

FunctionPass * createSelectOptimizePass()

This pass converts conditional moves to conditional jumps when profitable.

FunctionPass * createWasmEHPass()

createWasmEHPass - This pass adapts exception handling code to use WebAssembly's exception handling s...

char & FixupStatepointCallerSavedID

The pass fixups statepoint machine instruction to replace usage of caller saved registers with stack ...

MachineFunctionPass * createBasicBlockSectionsPass()

createBasicBlockSections Pass - This pass assigns sections to machine basic blocks and is enabled wit...

FunctionPass * createPostInlineEntryExitInstrumenterPass()

MachineFunctionPass * createPrologEpilogInserterPass()

MachineFunctionPass * createGCEmptyBasicBlocksPass()

createGCEmptyBasicblocksPass - Empty basic blocks (basic blocks without real code) appear as the resu...

FunctionPass * createCallBrPass()

ModulePass * createStripDebugMachineModulePass(bool OnlyDebugified)

Creates MIR Strip Debug pass.

char & TailDuplicateLegacyID

TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.

char & ExpandPostRAPseudosID

ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.

char & PatchableFunctionID

This pass implements the "patchable-function" attribute.

FunctionPass * createScalarizeMaskedMemIntrinLegacyPass()

ModulePass * createLowerEmuTLSPass()

LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all TLS variables for the emulated ...

char & PostRASchedulerID

PostRAScheduler - This pass performs post register allocation scheduling.

char & RemoveLoadsIntoFakeUsesID

RemoveLoadsIntoFakeUses pass.

FunctionPass * createStackProtectorPass()

createStackProtectorPass - This pass adds stack protectors to functions.

Pass * createLoopTermFoldPass()

char & MachineSchedulerID

MachineScheduler - This pass schedules machine instructions.

char & PostMachineSchedulerID

PostMachineScheduler - This pass schedules machine instructions postRA.

char & PeepholeOptimizerLegacyID

PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...

char & LiveDebugValuesID

LiveDebugValues pass.

char & PrologEpilogCodeInserterID

PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...

FunctionPass * createExpandLargeFpConvertPass()

char & EarlyIfConverterLegacyID

EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions.

ImmutablePass * createBasicBlockSectionsProfileReaderWrapperPass(const MemoryBuffer *Buf)

char & MachineLoopInfoID

MachineLoopInfo - This pass is a loop analysis pass.

cl::opt< bool > EnableFSDiscriminator

char & ShadowStackGCLoweringID

ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.

MachineFunctionPass * createStackFrameLayoutAnalysisPass()

StackFramePrinter pass - This pass prints out the machine function's stack frame to the given stream ...

FunctionPass * createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P)

Add Flow Sensitive Discriminators.

char & MachineSanitizerBinaryMetadataID

char & ImplicitNullChecksID

ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.

ModulePass * createPreISelIntrinsicLoweringPass()

This pass lowers the @llvm.load.relative and @llvm.objc.

MachineFunctionPass * createStaticDataSplitterPass()

createStaticDataSplitterPass - This pass partitions a static data section into a hot and cold section...

void initializeAAResultsWrapperPassPass(PassRegistry &)

char & ShrinkWrapID

ShrinkWrap pass. Look for the best place to insert save and restore.

char & MachineLateInstrsCleanupID

MachineLateInstrsCleanup - This pass removes redundant identical instructions after register allocati...

ImmutablePass * createScopedNoAliasAAWrapperPass()

FunctionPass * createExpandMemCmpLegacyPass()

ModulePass * createLowerGlobalDtorsLegacyPass()

FunctionPass * createLowerInvokePass()

FunctionPass * createRegUsageInfoCollector()

This pass is executed POST-RA to collect which physical registers are preserved by given machine func...

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

char & XRayInstrumentationID

This pass inserts the XRay instrumentation sleds if they are supported by the target platform.

char & OptimizePHIsLegacyID

OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...

void report_fatal_error(Error Err, bool gen_crash_diag=true)

Report a serious error, calling any installed error handler.

char & StackMapLivenessID

StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...

char & FuncletLayoutID

This pass lays out funclets contiguously.

FunctionPass * createCodeGenPrepareLegacyPass()

createCodeGenPrepareLegacyPass - Transform the code to expose more pattern matching during instructio...

char & RemoveRedundantDebugValuesID

RemoveRedundantDebugValues pass.

FunctionPass * createBasicAAWrapperPass()

char & DetectDeadLanesID

This pass adds dead/undef flags after analyzing subregister lanes.

char & PostRAMachineSinkingID

This pass perform post-ra machine sink for COPY instructions.

FunctionPass * createDwarfEHPass(CodeGenOptLevel OptLevel)

createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation.

FunctionPass * createRegAllocScoringPass()

When learning an eviction policy, extract score(reward) information, otherwise this does nothing.

CodeGenOptLevel

Code generation optimization level.

ModulePass * createMachineOutlinerPass(bool RunOnAllFunctions=true)

This pass performs outlining on machine instructions directly before printing assembly.

char & StackSlotColoringID

StackSlotColoring - This pass performs stack slot coloring.

FunctionPass * createExpandLargeDivRemPass()

Pass * createMergeICmpsLegacyPass()

char & ProcessImplicitDefsID

ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.

ModulePass * createCheckDebugMachineModulePass()

Creates MIR Check Debug pass.

ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)

Create an analysis pass wrapper around a TTI object.

ImmutablePass * createTypeBasedAAWrapperPass()

FunctionPass * createMIRProfileLoaderPass(std::string File, std::string RemappingFile, sampleprof::FSDiscriminatorPass P, IntrusiveRefCntPtr< vfs::FileSystem > FS)

Read Flow Sensitive Profile.

FunctionPass * createCFIFixup()

Creates CFI Fixup pass.

FunctionPass * createVerifierPass(bool FatalErrors=true)

void initializeBasicAAWrapperPassPass(PassRegistry &)

MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")

MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...

char & MachineCSELegacyID

MachineCSE - This pass performs global CSE on machine instructions.

Pass * createLoopStrengthReducePass()

char & LiveVariablesID

LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...

char & EarlyTailDuplicateLegacyID

Duplicate blocks with unconditional branches into tails of their predecessors.

FunctionPass * createExpandReductionsPass()

This pass expands the reduction intrinsics into sequences of shuffles.

MachineFunctionPass * createMachineFunctionSplitterPass()

createMachineFunctionSplitterPass - This pass splits machine functions using profile information.

void call_once(once_flag &flag, Function &&F, Args &&... ArgList)

Execute the function specified as a parameter once.

MachineFunctionPass * createResetMachineFunctionPass(bool EmitFallbackDiag, bool AbortOnFailedISel)

This pass resets a MachineFunction when it has the FailedISel property as if it was just created.

char & StackColoringLegacyID

StackSlotColoring - This pass performs stack coloring and merging.

char & VirtRegRewriterID

VirtRegRewriter pass.

FunctionPass * createReplaceWithVeclibLegacyPass()

char & FinalizeISelID

This pass expands pseudo-instructions, reserves registers and adjusts machine frame information.

FunctionPass * createRegUsageInfoPropPass()

Return a MachineFunction pass that identifies call sites and propagates register usage information of...

FunctionPass * createPartiallyInlineLibCallsPass()

char & UnreachableMachineBlockElimID

UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.

char & MachineBlockPlacementID

MachineBlockPlacement - This pass places basic blocks based on branch probabilities.

char & TwoAddressInstructionPassID

TwoAddressInstruction - This pass reduces two-address instructions to use two operands.

Pass * createCanonicalizeFreezeInLoopsPass()

char & LocalStackSlotAllocationID

LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...

char & BranchFolderPassID

BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...

char & PHIEliminationID

PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions.

Pass * createObjCARCContractPass()

ModulePass * createDebugifyMachineModulePass()

Creates MIR Debugify pass.

FunctionPass * createPrintFunctionPass(raw_ostream &OS, const std::string &Banner="")

Create and return a pass that prints functions to the specified raw_ostream as they are processed.

char & RenameIndependentSubregsID

This pass detects subregister lanes in a virtual register that are used independently of other lanes ...

char & MachineLICMID

This pass performs loop invariant code motion on machine instructions.

char & MachineBlockPlacementStatsID

MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...

char & LiveIntervalsID

LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers.

char & MachineCopyPropagationID

MachineCopyPropagation - This pass performs copy propagation on machine instructions.

char & DeadMachineInstructionElimID

DeadMachineInstructionElim - This pass removes dead machine instructions.

void initializeCodeGen(PassRegistry &)

Initialize all passes linked into the CodeGen library.

FunctionPass * createMachineVerifierPass(const std::string &Banner)

createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness.

FunctionPass * createWinEHPass(bool DemoteCatchSwitchPHIOnly=false)

createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...

CGPassBuilderOption getCGPassBuilderOption()

IdentifyingPassPtr InsertedPassID

Pass * getInsertedPass() const

InsertedPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID)

This class manages callbacks registration, as well as provides a way for PassInstrumentation to pass ...

void registerShouldRunOptionalPassCallback(CallableT C)

A utility class that uses RAII to save and restore the value of a variable.

The llvm::once_flag structure.