TargetPassConfig.cpp Source File (original) (raw)

53#include

54#include

55#include

57using namespace llvm;

61 cl::desc("Enable interprocedural register allocation "

62 "to reduce load/store at procedure calls."));

64 cl::desc("Disable Post Regalloc Scheduler"));

66 cl::desc("Disable branch folding"));

68 cl::desc("Disable tail duplication"));

70 cl::desc("Disable pre-register allocation tail duplication"));

74 cl::Hidden, cl::desc("Collect probability-driven block placement stats"));

76 cl::desc("Disable Stack Slot Coloring"));

78 cl::desc("Disable Machine Dead Code Elimination"));

80 cl::desc("Disable Early If-conversion"));

82 cl::desc("Disable Machine LICM"));

84 cl::desc("Disable Machine Common Subexpression Elimination"));

87 cl::desc("Enable optimized register allocation compilation path."));

90 cl::desc("Disable Machine LICM"));

92 cl::desc("Disable Machine Sinking"));

95 cl::desc("Disable PostRA Machine Sinking"));

97 cl::desc("Disable Loop Strength Reduction Pass"));

101 cl::desc("Disable Codegen Prepare"));

103 cl::desc("Disable Copy Propagation pass"));

107 "disable-atexit-based-global-dtor-lowering", cl::Hidden,

108 cl::desc("For MachO, disable atexit()-based global destructor lowering"));

110 "enable-implicit-null-checks",

111 cl::desc("Fold null checks into faulting memory operations"),

114 cl::desc("Disable MergeICmps Pass"),

118 cl::desc("Print LLVM IR input to isel pass"));

121 cl::desc("Verify generated machine code"));

124 cl::desc("Debugify MIR before and Strip debug after "

125 "each pass except those known to be unsafe "

126 "when debug info is present"));

128 "debugify-check-and-strip-all-safe", cl::Hidden,

130 "Debugify MIR before, by checking and stripping the debug info after, "

131 "each pass except those known to be unsafe when debug info is "

132 "present"));

133

135 "enable-machine-outliner", cl::desc("Enable the machine outliner"),

139 "Run on all functions guaranteed to be beneficial"),

141 "Outline cold code only. If a code block does not have "

142 "profile data, optimistically assume it is cold."),

144 "Outline cold code only. If a code block does not have "

145 "profile, data, conservatively assume it is hot."),

147

150 "enable-global-merge-func", cl::Hidden,

151 cl::desc("Enable global merge functions that are based on hash function"));

152

153

154

156 cl::desc("Disable the CFI fixup pass"));

157

158

159

162 cl::desc("Enable the \"fast\" instruction selector"));

163

166 cl::desc("Enable the \"global\" instruction selector"));

167

168

169

172 cl::desc("Print machine instrs after ISel"));

173

176 cl::desc("Enable abort calls when \"global\" instruction selection "

177 "fails to lower/select an instruction"),

182 "Disable the abort but emit a diagnostic on failure")));

183

184

185

188 cl::desc("Disable MIRProfileLoader before RegAlloc"));

189

190

193 cl::desc("Disable MIRProfileLoader before BlockPlacement"));

194

198

201 cl::desc("Flow Sensitive profile remapping file name."), cl::Hidden);

202

203

204

205

206

207

211 "Run MachineScheduler post regalloc (independent of preRA sched)"));

212

213

215 cl::desc("Run live interval analysis earlier in the pipeline"));

216

218 "disable-replace-with-vec-lib", cl::Hidden,

219 cl::desc("Disable replace with vector math call pass"));

220

221

222

223

228

231 cl::desc("Resume compilation after a specific pass"),

233

236 cl::desc("Resume compilation before a specific pass"),

238

241 cl::desc("Stop compilation after a specific pass"),

243

246 cl::desc("Stop compilation before a specific pass"),

248

249

251 "enable-split-machine-functions", cl::Hidden,

252 cl::desc("Split out cold blocks from machine functions based on profile "

253 "information."));

254

255

258 cl::desc("Disable the expand reduction intrinsics pass from running"));

259

260

263 cl::desc("Disable the select-optimization pass from running"));

264

265

268 cl::desc("Enable garbage-collecting empty basic blocks"));

269

272 cl::desc("Split static data sections into hot and cold "

273 "sections using profile information"));

274

275

277 "basic-block-section-match-infer",

279 "Enable matching and inference when generating basic block sections"),

281

283 "emit-bb-hash",

285 "Emit the hash of basic block in the SHT_LLVM_BB_ADDR_MAP section."),

287

288

289

290

291

293 bool Override) {

294 if (Override)

296 return PassID;

297}

298

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354

355 return TargetID;

356}

357

358

359

363 const std::optional &PGOOpt = TM->getPGOOption();

365 return std::string();

366 return PGOOpt->ProfileFile;

367}

368

369

370

374 const std::optional &PGOOpt = TM->getPGOOption();

376 return std::string();

377 return PGOOpt->ProfileRemappingFile;

378}

379

380

381

382

383

385 "Target Pass Configuration", false, false)

387

388namespace {

389

393

396

402 assert(NP && "Pass ID not registered");

403 return NP;

404 }

405};

406

407}

408

409namespace llvm {

410

412public:

413

414

415

416

417

418

419

421

422

423

425};

426

427}

428

429

433

436 return nullptr;

437

440 if (!PI)

442 Twine("\" pass is not registered."));

443 return PI;

444}

445

450

451static std::pair<StringRef, unsigned>

454 std::tie(Name, InstanceNumStr) = PassName.split(',');

455

456 unsigned InstanceNum = 0;

457 if (!InstanceNumStr.empty() && InstanceNumStr.getAsInteger(10, InstanceNum))

459

460 return std::make_pair(Name, InstanceNum);

461}

462

463void TargetPassConfig::setStartStopPasses() {

464 StringRef StartBeforeName;

465 std::tie(StartBeforeName, StartBeforeInstanceNum) =

467

468 StringRef StartAfterName;

469 std::tie(StartAfterName, StartAfterInstanceNum) =

471

472 StringRef StopBeforeName;

473 std::tie(StopBeforeName, StopBeforeInstanceNum)

475

476 StringRef StopAfterName;

477 std::tie(StopAfterName, StopAfterInstanceNum)

479

484 if (StartBefore && StartAfter)

487 if (StopBefore && StopAfter)

490 Started = (StartAfter == nullptr) && (StartBefore == nullptr);

491}

492

495

496#define SET_OPTION(Option) \

497 if (Option.getNumOccurrences()) \

498 Opt.Option = Option;

499

511

512#define SET_BOOLEAN_OPTION(Option) Opt.Option = Option;

513

532

533 return Opt;

534}

535

538

539

540 PIC.registerShouldRunOptionalPassCallback([](StringRef P, Any) {

541

542#define DISABLE_PASS(Option, Name) \

543 if (Option && P.contains(#Name)) \

544 return false;

559

560 return true;

561 });

562}

563

566 auto [StartBefore, StartBeforeInstanceNum] =

568 auto [StartAfter, StartAfterInstanceNum] =

570 auto [StopBefore, StopBeforeInstanceNum] =

572 auto [StopAfter, StopAfterInstanceNum] =

574

575 if (!StartBefore.empty() && !StartAfter.empty())

578 std::make_error_code(std::errc::invalid_argument));

579 if (!StopBefore.empty() && !StopAfter.empty())

582 std::make_error_code(std::errc::invalid_argument));

583

585 Result.StartPass = StartBefore.empty() ? StartAfter : StartBefore;

586 Result.StopPass = StopBefore.empty() ? StopAfter : StopBefore;

587 Result.StartInstanceNum =

588 StartBefore.empty() ? StartAfterInstanceNum : StartBeforeInstanceNum;

589 Result.StopInstanceNum =

590 StopBefore.empty() ? StopAfterInstanceNum : StopBeforeInstanceNum;

591 Result.StartAfter = !StartAfter.empty();

592 Result.StopAfter = !StopAfter.empty();

593 Result.StartInstanceNum += Result.StartInstanceNum == 0;

594 Result.StopInstanceNum += Result.StopInstanceNum == 0;

595 return Result;

596}

597

598

599

603

605

606

608

609

612

613 if (EnableIPRA.getNumOccurrences()) {

615 } else {

616

617 TM.Options.EnableIPRA |= TM.useIPRA();

618 }

619

620 if (TM.Options.EnableIPRA)

622

625

626 setStartStopPasses();

627}

628

630 return TM->getOptLevel();

631}

632

633

637 TargetPassID != InsertedPassID.getID()) ||

640 "Insert a pass after itself!");

641 Impl->InsertedPasses.emplace_back(TargetPassID, InsertedPassID);

642}

643

644

645

646

647

652

656 "machine. Scheduling a CodeGen pass without a target "

657 "triple set?");

658}

659

663

668

671 return std::string();

672 std::string Res;

677 bool IsFirst = true;

678 for (int Idx = 0; Idx < 4; ++Idx)

679 if (!PassNames[Idx]->empty()) {

680 if (!IsFirst)

681 Res += " and ";

682 IsFirst = false;

683 Res += OptNames[Idx];

684 }

685 return Res;

686}

687

688

693

696 Impl->TargetPasses[StandardID] = TargetID;

697}

698

701 I = Impl->TargetPasses.find(ID);

702 if (I == Impl->TargetPasses.end())

703 return ID;

704 return I->second;

705}

706

713

714

715

716

717

718

721

722

723

724

725

727

728 if (StartBefore == PassID && StartBeforeCount++ == StartBeforeInstanceNum)

729 Started = true;

730 if (StopBefore == PassID && StopBeforeCount++ == StopBeforeInstanceNum)

731 Stopped = true;

732 if (Started && !Stopped) {

733 if (AddingMachinePasses) {

734

735 std::string Banner =

736 std::string("After ") + std::string(P->getPassName());

738 PM->add(P);

740 } else {

741 PM->add(P);

742 }

743

744

745 for (const auto &IP : Impl->InsertedPasses)

746 if (IP.TargetPassID == PassID)

747 addPass(IP.getInsertedPass());

748 } else {

749 delete P;

750 }

751

752 if (StopAfter == PassID && StopAfterCount++ == StopAfterInstanceNum)

753 Stopped = true;

754

755 if (StartAfter == PassID && StartAfterCount++ == StartAfterInstanceNum)

756 Started = true;

757 if (Stopped && !Started)

759}

760

761

762

763

764

765

770 return nullptr;

771

775 else {

777 if ()

779 }

781 addPass(P);

782

783 return FinalID;

784}

785

790

795

798#ifdef EXPENSIVE_CHECKS

800 Verify = TM->isMachineVerifierClean();

801#endif

804}

805

809

813

817

819 if (AllowDebugify && DebugifyIsSafe &&

823}

824

826 if (DebugifyIsSafe) {

832 }

834}

835

836

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847

848

852

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859 }

860

861

862

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864

868 }

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876

877 if (TM->getTargetTriple().isOSBinFormatMachO() &&

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913

914 if (TM->getTargetTriple().isOSWindows())

916}

917

918

919

921 const MCAsmInfo *MCAI = TM->getMCAsmInfo();

922 assert(MCAI && "No MCAsmInfo");

925

926

927

928

929

930

932 [[fallthrough]];

938 break;

940

941

942

945 break;

947

948

949

950

953 break;

956

957

959 break;

960 }

961}

962

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988

991 dbgs(), "\n\n*** Final LLVM Code input to ISel ***\n"));

992

993

994

997}

998

1000

1002

1003

1005 SelectorType Selector;

1006

1008 Selector = SelectorType::FastISel;

1010 (TM->Options.EnableGlobalISel &&

1012 Selector = SelectorType::GlobalISel;

1014 TM->getO0WantsFastISel())

1015 Selector = SelectorType::FastISel;

1016 else

1017 Selector = SelectorType::SelectionDAG;

1018

1019

1020 if (Selector == SelectorType::FastISel) {

1021 TM->setFastISel(true);

1022 TM->setGlobalISel(false);

1023 } else if (Selector == SelectorType::GlobalISel) {

1024 TM->setFastISel(false);

1025 TM->setGlobalISel(true);

1026 }

1027

1028

1029

1030

1031

1032

1033

1034

1035

1036

1039 DebugifyIsSafe = false;

1040

1041

1042 if (Selector == SelectorType::GlobalISel) {

1043 SaveAndRestore SavedAddingMachinePasses(AddingMachinePasses, true);

1045 return true;

1046

1048

1050 return true;

1051

1052

1053

1055

1057 return true;

1058

1060

1062 return true;

1063 }

1064

1065

1066

1067 if (Selector == SelectorType::GlobalISel)

1070

1071

1072

1075 return true;

1076

1077

1078

1080

1081

1083

1084 return false;

1085}

1086

1088 if (TM->useEmulatedTLS())

1090

1099

1101}

1102

1103

1108 cl::desc("Register allocator to use"));

1109

1110

1111

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1129 AddingMachinePasses = true;

1130

1131

1134 } else {

1135

1136

1138 }

1139

1140 if (TM->Options.EnableIPRA)

1142

1143

1145

1146

1147

1148

1149 DebugifyIsSafe = false;

1150

1151

1152

1160 nullptr));

1161 }

1162

1163

1164

1167 else

1169

1170

1172

1174

1176

1177

1181 }

1182

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1201

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1203

1205 ->targetSchedulesPostRAScheduling()) {

1208 else

1210 }

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1224

1226

1227 if (TM->Options.EnableIPRA)

1228

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1232

1233

1235

1240

1241 if (TM->Options.EnableMachineOutliner &&

1245 TM->Options.SupportsDefaultOutlining)

1247 }

1248

1251

1255

1256 if (TM->Options.EnableMachineFunctionSplitter ||

1258 TM->Options.EnableStaticDataPartitioning) {

1260 if (!ProfileFile.empty()) {

1265 } else {

1266

1267

1269 << "Using AutoFDO without FSDiscriminator for MFS may regress "

1270 "performance.\n";

1271 }

1272 }

1273 }

1274

1275

1276

1277

1278

1279

1280 if (TM->Options.EnableMachineFunctionSplitter ||

1283

1284 if (SplitStaticData || TM->Options.EnableStaticDataPartitioning) {

1285

1286

1287

1290 }

1291

1292

1294 TM->Options.BBAddrMap) {

1299 TM->getBBSectionsFuncListBuf()));

1302 else

1304 }

1306 }

1307

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1317

1318 AddingMachinePasses = false;

1319}

1320

1321

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1356

1358}

1359

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1377

1380 "pick register allocator based on -O option",

1382

1387

1388

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1394

1395

1397 if (Optimized)

1399 else

1401}

1402

1403

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1408

1409

1410

1411

1413

1416

1419 return Ctor();

1420

1421

1423}

1424

1429

1434 "Must use fast (default) register allocator for unoptimized regalloc.");

1435

1437

1438

1439

1441 return true;

1442}

1443

1445

1447

1448

1450

1451

1453

1454

1455

1457 return true;

1458}

1459

1460

1461

1463 return RegAlloc.getNumOccurrences() == 0;

1464}

1465

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1533 }

1534}

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1550

1551

1552 if (->requiresStructuredCFG())

1554

1555

1557}

1558

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1565

1574 nullptr));

1575 }

1577

1580 }

1581}

1582

1583

1584

1585

1589

1593

1597

1599 return std::make_unique();

1600}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

cl::opt< bool > EmitBBHash

This is the interface for LLVM's primary stateless and local alias analysis.

#define clEnumValN(ENUMVAL, FLAGNAME, DESC)

This file defines the DenseMap class.

This file contains an interface for creating legacy passes to print out IR in various granularities.

ppc ctr loops PowerPC CTR Loops Verify

PassInstrumentationCallbacks PIC

This file defines the Pass Instrumentation classes that provide instrumentation points into the pass ...

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

This file provides utility classes that use RAII to save and restore values.

This is the interface for a metadata-based scoped no-alias analysis.

This file defines the SmallVector class.

static const char StopAfterOptName[]

Definition TargetPassConfig.cpp:226

static cl::opt< bool > DisableExpandReductions("disable-expand-reductions", cl::init(false), cl::Hidden, cl::desc("Disable the expand reduction intrinsics pass from running"))

Disable the expand reductions pass for testing.

static cl::opt< bool > EnableImplicitNullChecks("enable-implicit-null-checks", cl::desc("Fold null checks into faulting memory operations"), cl::init(false), cl::Hidden)

static cl::opt< bool > DisableMachineSink("disable-machine-sink", cl::Hidden, cl::desc("Disable Machine Sinking"))

static cl::opt< cl::boolOrDefault > DebugifyAndStripAll("debugify-and-strip-all-safe", cl::Hidden, cl::desc("Debugify MIR before and Strip debug after " "each pass except those known to be unsafe " "when debug info is present"))

static llvm::once_flag InitializeDefaultRegisterAllocatorFlag

A dummy default pass factory indicates whether the register allocator is overridden on the command li...

Definition TargetPassConfig.cpp:1376

static cl::opt< bool > DisableAtExitBasedGlobalDtorLowering("disable-atexit-based-global-dtor-lowering", cl::Hidden, cl::desc("For MachO, disable atexit()-based global destructor lowering"))

static cl::opt< RegisterRegAlloc::FunctionPassCtor, false, RegisterPassParser< RegisterRegAlloc > > RegAlloc("regalloc", cl::Hidden, cl::init(&useDefaultRegisterAllocator), cl::desc("Register allocator to use"))

static cl::opt< bool > PrintISelInput("print-isel-input", cl::Hidden, cl::desc("Print LLVM IR input to isel pass"))

static FunctionPass * useDefaultRegisterAllocator()

-regalloc=... command line option.

Definition TargetPassConfig.cpp:1104

static cl::opt< bool > DisablePostRASched("disable-post-ra", cl::Hidden, cl::desc("Disable Post Regalloc Scheduler"))

static cl::opt< bool > EnableBlockPlacementStats("enable-block-placement-stats", cl::Hidden, cl::desc("Collect probability-driven block placement stats"))

static cl::opt< RunOutliner > EnableMachineOutliner("enable-machine-outliner", cl::desc("Enable the machine outliner"), cl::Hidden, cl::ValueOptional, cl::init(RunOutliner::TargetDefault), cl::values(clEnumValN(RunOutliner::AlwaysOutline, "always", "Run on all functions guaranteed to be beneficial"), clEnumValN(RunOutliner::OptimisticPGO, "optimistic-pgo", "Outline cold code only. If a code block does not have " "profile data, optimistically assume it is cold."), clEnumValN(RunOutliner::ConservativePGO, "conservative-pgo", "Outline cold code only. If a code block does not have " "profile, data, conservatively assume it is hot."), clEnumValN(RunOutliner::NeverOutline, "never", "Disable all outlining"), clEnumValN(RunOutliner::AlwaysOutline, "", "")))

static cl::opt< bool > DisableMachineDCE("disable-machine-dce", cl::Hidden, cl::desc("Disable Machine Dead Code Elimination"))

static std::string getFSRemappingFile(const TargetMachine *TM)

Definition TargetPassConfig.cpp:371

static const char StopBeforeOptName[]

Definition TargetPassConfig.cpp:227

static AnalysisID getPassIDFromName(StringRef PassName)

Definition TargetPassConfig.cpp:446

static cl::opt< bool > DisableEarlyIfConversion("disable-early-ifcvt", cl::Hidden, cl::desc("Disable Early If-conversion"))

static cl::opt< bool > DisableReplaceWithVecLib("disable-replace-with-vec-lib", cl::Hidden, cl::desc("Disable replace with vector math call pass"))

static cl::opt< bool > EnableMachineFunctionSplitter("enable-split-machine-functions", cl::Hidden, cl::desc("Split out cold blocks from machine functions based on profile " "information."))

Enable the machine function splitter pass.

static IdentifyingPassPtr overridePass(AnalysisID StandardID, IdentifyingPassPtr TargetID)

Allow standard passes to be disabled by the command line, regardless of who is adding the pass.

Definition TargetPassConfig.cpp:311

cl::opt< bool > EmitBBHash("emit-bb-hash", cl::desc("Emit the hash of basic block in the SHT_LLVM_BB_ADDR_MAP section."), cl::init(false), cl::Optional)

static std::pair< StringRef, unsigned > getPassNameAndInstanceNum(StringRef PassName)

Definition TargetPassConfig.cpp:452

static cl::opt< bool > PrintAfterISel("print-after-isel", cl::init(false), cl::Hidden, cl::desc("Print machine instrs after ISel"))

static cl::opt< cl::boolOrDefault > VerifyMachineCode("verify-machineinstrs", cl::Hidden, cl::desc("Verify generated machine code"))

static cl::opt< bool > DisablePartialLibcallInlining("disable-partial-libcall-inlining", cl::Hidden, cl::desc("Disable Partial Libcall Inlining"))

#define SET_BOOLEAN_OPTION(Option)

static cl::opt< std::string > StartAfterOpt(StringRef(StartAfterOptName), cl::desc("Resume compilation after a specific pass"), cl::value_desc("pass-name"), cl::init(""), cl::Hidden)

static cl::opt< bool > DisableBlockPlacement("disable-block-placement", cl::Hidden, cl::desc("Disable probability-driven block placement"))

static cl::opt< bool > DisableRAFSProfileLoader("disable-ra-fsprofile-loader", cl::init(false), cl::Hidden, cl::desc("Disable MIRProfileLoader before RegAlloc"))

static cl::opt< std::string > StopAfterOpt(StringRef(StopAfterOptName), cl::desc("Stop compilation after a specific pass"), cl::value_desc("pass-name"), cl::init(""), cl::Hidden)

static void initializeDefaultRegisterAllocatorOnce()

Definition TargetPassConfig.cpp:1383

static cl::opt< bool > DisableSelectOptimize("disable-select-optimize", cl::init(true), cl::Hidden, cl::desc("Disable the select-optimization pass from running"))

Disable the select optimization pass.

static cl::opt< std::string > FSRemappingFile("fs-remapping-file", cl::init(""), cl::value_desc("filename"), cl::desc("Flow Sensitive profile remapping file name."), cl::Hidden)

static cl::opt< bool > DisableCFIFixup("disable-cfi-fixup", cl::Hidden, cl::desc("Disable the CFI fixup pass"))

static cl::opt< bool > SplitStaticData("split-static-data", cl::Hidden, cl::init(false), cl::desc("Split static data sections into hot and cold " "sections using profile information"))

static cl::opt< bool > DisablePostRAMachineLICM("disable-postra-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))

static const char StartBeforeOptName[]

Definition TargetPassConfig.cpp:225

static const PassInfo * getPassInfo(StringRef PassName)

Definition TargetPassConfig.cpp:434

static cl::opt< bool > BasicBlockSectionMatchInfer("basic-block-section-match-infer", cl::desc("Enable matching and inference when generating basic block sections"), cl::init(false), cl::Optional)

Enable matching and inference when using propeller.

static cl::opt< bool > EarlyLiveIntervals("early-live-intervals", cl::Hidden, cl::desc("Run live interval analysis earlier in the pipeline"))

static cl::opt< bool > DisableMachineLICM("disable-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))

static cl::opt< cl::boolOrDefault > EnableGlobalISelOption("global-isel", cl::Hidden, cl::desc("Enable the \"global\" instruction selector"))

static cl::opt< bool > DisableTailDuplicate("disable-tail-duplicate", cl::Hidden, cl::desc("Disable tail duplication"))

static cl::opt< bool > DisablePostRAMachineSink("disable-postra-machine-sink", cl::Hidden, cl::desc("Disable PostRA Machine Sinking"))

static const char StartAfterOptName[]

Option names for limiting the codegen pipeline.

Definition TargetPassConfig.cpp:224

static cl::opt< bool > EnableIPRA("enable-ipra", cl::init(false), cl::Hidden, cl::desc("Enable interprocedural register allocation " "to reduce load/store at procedure calls."))

static cl::opt< bool > DisableCGP("disable-cgp", cl::Hidden, cl::desc("Disable Codegen Prepare"))

static std::string getFSProfileFile(const TargetMachine *TM)

Definition TargetPassConfig.cpp:360

static cl::opt< std::string > StartBeforeOpt(StringRef(StartBeforeOptName), cl::desc("Resume compilation before a specific pass"), cl::value_desc("pass-name"), cl::init(""), cl::Hidden)

static IdentifyingPassPtr applyDisable(IdentifyingPassPtr PassID, bool Override)

Allow standard passes to be disabled by command line options.

Definition TargetPassConfig.cpp:292

static cl::opt< bool > GCEmptyBlocks("gc-empty-basic-blocks", cl::init(false), cl::Hidden, cl::desc("Enable garbage-collecting empty basic blocks"))

Enable garbage-collecting empty basic blocks.

static cl::opt< GlobalISelAbortMode > EnableGlobalISelAbort("global-isel-abort", cl::Hidden, cl::desc("Enable abort calls when \"global\" instruction selection " "fails to lower/select an instruction"), cl::values(clEnumValN(GlobalISelAbortMode::Disable, "0", "Disable the abort"), clEnumValN(GlobalISelAbortMode::Enable, "1", "Enable the abort"), clEnumValN(GlobalISelAbortMode::DisableWithDiag, "2", "Disable the abort but emit a diagnostic on failure")))

static cl::opt< bool > DisableEarlyTailDup("disable-early-taildup", cl::Hidden, cl::desc("Disable pre-register allocation tail duplication"))

static cl::opt< bool > DisableConstantHoisting("disable-constant-hoisting", cl::Hidden, cl::desc("Disable ConstantHoisting"))

static cl::opt< cl::boolOrDefault > EnableFastISelOption("fast-isel", cl::Hidden, cl::desc("Enable the \"fast\" instruction selector"))

static cl::opt< bool > DisableSSC("disable-ssc", cl::Hidden, cl::desc("Disable Stack Slot Coloring"))

static cl::opt< bool > EnableGlobalMergeFunc("enable-global-merge-func", cl::Hidden, cl::desc("Enable global merge functions that are based on hash function"))

static cl::opt< bool > DisableBranchFold("disable-branch-fold", cl::Hidden, cl::desc("Disable branch folding"))

#define DISABLE_PASS(Option, Name)

static RegisterRegAlloc defaultRegAlloc("default", "pick register allocator based on -O option", useDefaultRegisterAllocator)

static cl::opt< std::string > StopBeforeOpt(StringRef(StopBeforeOptName), cl::desc("Stop compilation before a specific pass"), cl::value_desc("pass-name"), cl::init(""), cl::Hidden)

static cl::opt< bool > DisableMachineCSE("disable-machine-cse", cl::Hidden, cl::desc("Disable Machine Common Subexpression Elimination"))

static cl::opt< bool > DisableLayoutFSProfileLoader("disable-layout-fsprofile-loader", cl::init(false), cl::Hidden, cl::desc("Disable MIRProfileLoader before BlockPlacement"))

static cl::opt< bool > MISchedPostRA("misched-postra", cl::Hidden, cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)"))

static cl::opt< bool > DisableMergeICmps("disable-mergeicmps", cl::desc("Disable MergeICmps Pass"), cl::init(false), cl::Hidden)

static cl::opt< bool > DisableCopyProp("disable-copyprop", cl::Hidden, cl::desc("Disable Copy Propagation pass"))

static cl::opt< cl::boolOrDefault > OptimizeRegAlloc("optimize-regalloc", cl::Hidden, cl::desc("Enable optimized register allocation compilation path."))

static cl::opt< bool > DisableLSR("disable-lsr", cl::Hidden, cl::desc("Disable Loop Strength Reduction Pass"))

static cl::opt< std::string > FSProfileFile("fs-profile-file", cl::init(""), cl::value_desc("filename"), cl::desc("Flow Sensitive profile file name."), cl::Hidden)

static cl::opt< cl::boolOrDefault > DebugifyCheckAndStripAll("debugify-check-and-strip-all-safe", cl::Hidden, cl::desc("Debugify MIR before, by checking and stripping the debug info after, " "each pass except those known to be unsafe when debug info is " "present"))

#define SET_OPTION(Option)

Target-Independent Code Generator Pass Configuration Options pass.

This pass exposes codegen information to IR-level passes.

This is the interface for a metadata-based TBAA.

Defines the virtual file system interface vfs::FileSystem.

static const char PassName[]

TargetPassConfig * createPassConfig(PassManagerBase &PM) override

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...

Definition TargetPassConfig.cpp:649

DenseMapIterator< KeyT, ValueT, KeyInfoT, BucketT, true > const_iterator

This pass is required by interprocedural register allocation.

Tagged union holding either a T or a Error.

This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...

FunctionPass class - This class is used to implement most global optimizations.

Discriminated union of Pass ID types.

Pass * getInstance() const

This class is intended to be used as a base class for asm properties and features specific to the tar...

ExceptionHandling getExceptionHandlingType() const

DenseMap< AnalysisID, IdentifyingPassPtr > TargetPasses

Definition TargetPassConfig.cpp:420

SmallVector< InsertedPass, 4 > InsertedPasses

Store the pairs of <AnalysisID, AnalysisID> of which the second pass is inserted after each instance ...

Definition TargetPassConfig.cpp:424

PassInfo class - An instance of this class exists for every pass known by the system,...

const void * getTypeInfo() const

getTypeInfo - Return the id object for the pass... TODO : Rename

This class manages callbacks registration, as well as provides a way for PassInstrumentation to pass ...

PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

LLVM_ABI const PassInfo * getPassInfo(const void *TI) const

getPassInfo - Look up a pass' corresponding PassInfo, indexed by the pass' type identifier (&MyPass::...

Pass interface - Implemented by all 'passes'.

static Pass * createPass(AnalysisID ID)

AnalysisID getPassID() const

getPassID - Return the PassID number that corresponds to this pass.

RegisterPassParser class - Handle the addition of new machine passes.

static FunctionPassCtor getDefault()

static void setDefault(FunctionPassCtor C)

FunctionPass *(*)() FunctionPassCtor

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

bool getAsInteger(unsigned Radix, T &Result) const

Parse the current string as an integer of the specified radix.

constexpr bool empty() const

empty - Check if the string is empty.

Primary interface to the complete machine description for the target machine.

const std::optional< PGOOptions > & getPGOOption() const

Target-Independent Code Generator Pass Configuration Options.

bool usingDefaultRegAlloc() const

Return true if the default global register allocator is in use and has not be overriden on the comman...

Definition TargetPassConfig.cpp:1462

bool requiresCodeGenSCCOrder() const

void addCheckDebugPass()

Add a pass to check synthesized debug info for MIR.

Definition TargetPassConfig.cpp:814

virtual void addPreLegalizeMachineIR()

This method may be implemented by targets that want to run passes immediately before legalization.

void addPrintPass(const std::string &Banner)

Add a pass to print the machine function if printing is enabled.

Definition TargetPassConfig.cpp:791

virtual void addPreEmitPass2()

Targets may add passes immediately before machine code is emitted in this callback.

virtual std::unique_ptr< CSEConfigBase > getCSEConfig() const

Returns the CSEConfig object to use for the current optimization level.

Definition TargetPassConfig.cpp:1598

bool EnableLoopTermFold

Enable LoopTermFold immediately after LSR.

void printAndVerify(const std::string &Banner)

printAndVerify - Add a pass to dump then verify the machine function, if those steps are enabled.

Definition TargetPassConfig.cpp:786

static bool hasLimitedCodeGenPipeline()

Returns true if one of the -start-after, -start-before, -stop-after or -stop-before options is set.

Definition TargetPassConfig.cpp:664

static Expected< StartStopInfo > getStartStopInfo(PassInstrumentationCallbacks &PIC)

Returns pass name in -stop-before or -stop-after NOTE: New pass manager migration only.

Definition TargetPassConfig.cpp:565

~TargetPassConfig() override

Definition TargetPassConfig.cpp:430

virtual void addCodeGenPrepare()

Add pass to prepare the LLVM IR for code generation.

Definition TargetPassConfig.cpp:965

void insertPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID)

Insert InsertedPassID pass after TargetPassID pass.

Definition TargetPassConfig.cpp:634

void addMachinePostPasses(const std::string &Banner)

Add standard passes after a pass that has just been added.

Definition TargetPassConfig.cpp:825

virtual void addPreSched2()

This method may be implemented by targets that want to run passes after prolog-epilog insertion and b...

virtual bool isGISelCSEEnabled() const

Check whether continuous CSE should be enabled in GISel passes.

Definition TargetPassConfig.cpp:1594

virtual bool addILPOpts()

Add passes that optimize instruction level parallelism for out-of-order targets.

virtual void addPostRegAlloc()

This method may be implemented by targets that want to run passes after register allocation pass pipe...

void addDebugifyPass()

Add a pass to add synthesized debug info to the MIR.

Definition TargetPassConfig.cpp:806

virtual bool addInstSelector()

addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...

CodeGenOptLevel getOptLevel() const

Definition TargetPassConfig.cpp:629

virtual bool addPreISel()

Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...

void setOpt(bool &Opt, bool Val)

Definition TargetPassConfig.cpp:689

virtual void addBlockPlacement()

Add standard basic block placement passes.

Definition TargetPassConfig.cpp:1566

virtual FunctionPass * createRegAllocPass(bool Optimized)

addMachinePasses helper to create the target-selected or overriden regalloc pass.

Definition TargetPassConfig.cpp:1412

virtual void addPostBBSections()

This pass may be implemented by targets that want to run passes immediately after basic block section...

TargetPassConfig()

Definition TargetPassConfig.cpp:653

virtual void addOptimizedRegAlloc()

addOptimizedRegAlloc - Add passes related to register allocation.

Definition TargetPassConfig.cpp:1478

virtual bool addRegAssignAndRewriteFast()

Add core register allocator passes which do the actual register assignment and rewriting.

Definition TargetPassConfig.cpp:1430

virtual void addPreEmitPass()

This pass may be implemented by targets that want to run passes immediately before machine code is em...

bool isGlobalISelAbortEnabled() const

Check whether or not GlobalISel should abort on error.

Definition TargetPassConfig.cpp:1586

bool getOptimizeRegAlloc() const

Return true if the optimized regalloc pipeline is enabled.

Definition TargetPassConfig.cpp:1364

bool isCustomizedRegAlloc()

Return true if register allocator is specified by -regalloc=override.

Definition TargetPassConfig.cpp:1425

virtual void addPreRegBankSelect()

This method may be implemented by targets that want to run passes immediately before the register ban...

virtual bool reportDiagnosticWhenGlobalISelFallback() const

Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path.

Definition TargetPassConfig.cpp:1590

virtual bool addPreRewrite()

addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is...

virtual bool addRegBankSelect()

This method should install a register bank selector pass, which assigns register banks to virtual reg...

void setRequiresCodeGenSCCOrder(bool Enable=true)

virtual void addMachineLateOptimization()

Add passes that optimize machine instructions after register allocation.

Definition TargetPassConfig.cpp:1541

virtual void addMachinePasses()

Add the complete, standard set of LLVM CodeGen passes.

Definition TargetPassConfig.cpp:1128

virtual void addIRPasses()

Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...

Definition TargetPassConfig.cpp:838

virtual void addPreGlobalInstructionSelect()

This method may be implemented by targets that want to run passes immediately before the (global) ins...

virtual void addFastRegAlloc()

addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast registe...

Definition TargetPassConfig.cpp:1468

virtual bool addLegalizeMachineIR()

This method should install a legalize pass, which converts the instruction sequence into one that can...

virtual void addMachineSSAOptimization()

addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.

Definition TargetPassConfig.cpp:1322

void substitutePass(AnalysisID StandardID, IdentifyingPassPtr TargetID)

Allow the target to override a specific pass without overriding the pass pipeline.

Definition TargetPassConfig.cpp:694

virtual bool addRegAssignAndRewriteOptimized()

Definition TargetPassConfig.cpp:1444

virtual bool addGlobalInstructionSelect()

This method should install a (global) instruction selector pass, which converts possibly generic inst...

virtual void addPreRegAlloc()

This method may be implemented by targets that want to run passes immediately before register allocat...

static std::string getLimitedCodeGenPipelineReason()

If hasLimitedCodeGenPipeline is true, this method returns a string with the name of the options that ...

Definition TargetPassConfig.cpp:669

AnalysisID addPass(AnalysisID PassID)

Utilities for targets to add passes to the pass manager.

Definition TargetPassConfig.cpp:766

void addPassesToHandleExceptions()

Add passes to lower exception handling for the code generator.

Definition TargetPassConfig.cpp:920

void addStripDebugPass()

Add a pass to remove debug info from the MIR.

Definition TargetPassConfig.cpp:810

bool isPassSubstitutedOrOverridden(AnalysisID ID) const

Return true if the pass has been substituted by the target or overridden on the command line.

Definition TargetPassConfig.cpp:707

bool addCoreISelPasses()

Add the actual instruction selection passes.

Definition TargetPassConfig.cpp:999

virtual void addISelPrepare()

Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.

Definition TargetPassConfig.cpp:972

static bool willCompleteCodeGenPipeline()

Returns true if none of the -stop-before and -stop-after options is set.

Definition TargetPassConfig.cpp:660

void addMachinePrePasses(bool AllowDebugify=true)

Add standard passes before a pass that's about to be added.

Definition TargetPassConfig.cpp:818

virtual bool addGCPasses()

addGCPasses - Add late codegen passes that analyze code for garbage collection.

Definition TargetPassConfig.cpp:1560

virtual bool addIRTranslator()

This method should install an IR translator pass, which converts from LLVM code to machine instructio...

void addVerifyPass(const std::string &Banner)

Add a pass to perform basic verification of the machine function if verification is enabled.

Definition TargetPassConfig.cpp:796

virtual FunctionPass * createTargetRegisterAllocator(bool Optimized)

createTargetRegisterAllocator - Create the register allocator pass for this target at the current opt...

Definition TargetPassConfig.cpp:1396

virtual bool addPostFastRegAllocRewrite()

addPostFastRegAllocRewrite - Add passes to the optimized register allocation pipeline after fast regi...

IdentifyingPassPtr getPassSubstitution(AnalysisID StandardID) const

Return the pass substituted for StandardID by the target.

Definition TargetPassConfig.cpp:699

bool addISelPasses()

High level function that adds all passes necessary to go from llvm IR representation to the MI repres...

Definition TargetPassConfig.cpp:1087

virtual void addPostRewrite()

Add passes to be run immediately after virtual registers are rewritten to physical registers.

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

static LLVM_ABI raw_ostream & warning()

Convenience method for printing "warning: " to stderr.

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

ValuesClass values(OptsTy... Options)

Helper to build a ValuesClass by forwarding a variable number of arguments as an initializer list to ...

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI ModulePass * createLowerGlobalDtorsLegacyPass()

LLVM_ABI FunctionPass * createCFIFixup()

Creates CFI Fixup pass.

LLVM_ABI FunctionPass * createFastRegisterAllocator()

FastRegisterAllocation Pass - This pass register allocates as fast as possible.

LLVM_ABI char & EarlyMachineLICMID

This pass performs loop invariant code motion on machine instructions.

LLVM_ABI char & GCMachineCodeAnalysisID

GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.

LLVM_ABI char & FEntryInserterID

This pass inserts FEntry calls.

LLVM_ABI char & GCLoweringID

GCLowering Pass - Used by gc.root to perform its default lowering operations.

LLVM_ABI void initializeBasicAAWrapperPassPass(PassRegistry &)

LLVM_ABI void registerCodeGenCallback(PassInstrumentationCallbacks &PIC, TargetMachine &)

Definition TargetPassConfig.cpp:536

LLVM_ABI char & InitUndefID

LLVM_ABI char & RegisterCoalescerID

RegisterCoalescer - This pass merges live ranges to eliminate copies.

LLVM_ABI FunctionPass * createGreedyRegisterAllocator()

Greedy register allocation pass - This pass implements a global register allocator for optimized buil...

LLVM_ABI FunctionPass * createConstantHoistingPass()

LLVM_ABI FunctionPass * createSafeStackPass()

This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...

LLVM_ABI cl::opt< bool > EnableFSDiscriminator

@ SjLj

setjmp/longjmp based exceptions

@ ZOS

z/OS MVS Exception Handling.

@ None

No exception support.

@ AIX

AIX Exception Handling.

@ DwarfCFI

DWARF-like instruction based exceptions.

@ WinEH

Windows Exception Handling.

@ Wasm

WebAssembly Exception Handling.

LLVM_ABI FunctionPass * createSelectOptimizePass()

This pass converts conditional moves to conditional jumps when profitable.

LLVM_ABI FunctionPass * createWasmEHPass()

createWasmEHPass - This pass adapts exception handling code to use WebAssembly's exception handling s...

LLVM_ABI char & FixupStatepointCallerSavedID

The pass fixups statepoint machine instruction to replace usage of caller saved registers with stack ...

LLVM_ABI MachineFunctionPass * createBasicBlockSectionsPass()

createBasicBlockSections Pass - This pass assigns sections to machine basic blocks and is enabled wit...

LLVM_ABI FunctionPass * createPostInlineEntryExitInstrumenterPass()

LLVM_ABI MachineFunctionPass * createPrologEpilogInserterPass()

LLVM_ABI FunctionPass * createCallBrPass()

LLVM_ABI ModulePass * createStripDebugMachineModulePass(bool OnlyDebugified)

Creates MIR Strip Debug pass.

LLVM_ABI char & TailDuplicateLegacyID

TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.

LLVM_ABI char & ExpandPostRAPseudosID

ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.

LLVM_ABI char & PatchableFunctionID

This pass implements the "patchable-function" attribute.

LLVM_ABI FunctionPass * createScalarizeMaskedMemIntrinLegacyPass()

LLVM_ABI char & PostRASchedulerID

PostRAScheduler - This pass performs post register allocation scheduling.

LLVM_ABI char & RemoveLoadsIntoFakeUsesID

RemoveLoadsIntoFakeUses pass.

LLVM_ABI MachineFunctionPass * createStackFrameLayoutAnalysisPass()

StackFramePrinter pass - This pass prints out the machine function's stack frame to the given stream ...

LLVM_ABI ModulePass * createGlobalMergeFuncPass()

This pass performs merging similar functions globally.

LLVM_ABI char & MachineSanitizerBinaryMetadataID

LLVM_ABI FunctionPass * createStackProtectorPass()

createStackProtectorPass - This pass adds stack protectors to functions.

LLVM_ABI Pass * createLoopTermFoldPass()

LLVM_ABI MachineFunctionPass * createGCEmptyBasicBlocksPass()

createGCEmptyBasicblocksPass - Empty basic blocks (basic blocks without real code) appear as the resu...

LLVM_ABI char & MachineSchedulerID

MachineScheduler - This pass schedules machine instructions.

LLVM_ABI char & PostMachineSchedulerID

PostMachineScheduler - This pass schedules machine instructions postRA.

LLVM_ABI char & PeepholeOptimizerLegacyID

PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...

LLVM_ABI char & LiveDebugValuesID

LiveDebugValues pass.

LLVM_ABI char & PrologEpilogCodeInserterID

PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...

LLVM_ABI char & EarlyIfConverterLegacyID

EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions.

LLVM_ABI MachineFunctionPass * createMachineFunctionSplitterPass()

createMachineFunctionSplitterPass - This pass splits machine functions using profile information.

LLVM_ABI FunctionPass * createMachineVerifierPass(const std::string &Banner)

createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness.

ImmutablePass * createBasicBlockSectionsProfileReaderWrapperPass(const MemoryBuffer *Buf)

LLVM_ABI char & MachineLoopInfoID

MachineLoopInfo - This pass is a loop analysis pass.

LLVM_ABI char & ShadowStackGCLoweringID

ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.

LLVM_ABI char & ImplicitNullChecksID

ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.

LLVM_ABI FunctionPass * createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P)

Add Flow Sensitive Discriminators.

LLVM_ABI ModulePass * createPreISelIntrinsicLoweringPass()

This pass lowers the @llvm.load.relative and @llvm.objc.

LLVM_ABI MachineFunctionPass * createStaticDataSplitterPass()

createStaticDataSplitterPass - This is a machine-function pass that categorizes static data hotness u...

LLVM_ABI char & ShrinkWrapID

ShrinkWrap pass. Look for the best place to insert save and restore.

LLVM_ABI char & MachineLateInstrsCleanupID

MachineLateInstrsCleanup - This pass removes redundant identical instructions after register allocati...

LLVM_ABI char & UnreachableMachineBlockElimID

UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.

LLVM_ABI FunctionPass * createExpandMemCmpLegacyPass()

LLVM_ABI FunctionPass * createLowerInvokePass()

LLVM_ABI FunctionPass * createRegUsageInfoCollector()

This pass is executed POST-RA to collect which physical registers are preserved by given machine func...

LLVM_ABI MachineFunctionPass * createResetMachineFunctionPass(bool EmitFallbackDiag, bool AbortOnFailedISel)

This pass resets a MachineFunction when it has the FailedISel property as if it was just created.

LLVM_ABI ImmutablePass * createScopedNoAliasAAWrapperPass()

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

LLVM_ABI char & XRayInstrumentationID

This pass inserts the XRay instrumentation sleds if they are supported by the target platform.

LLVM_ABI char & OptimizePHIsLegacyID

OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...

LLVM_ABI char & StackMapLivenessID

StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...

LLVM_ABI ModulePass * createStaticDataAnnotatorPass()

createStaticDataAnnotatorPASS - This is a module pass that reads from StaticDataProfileInfoWrapperPas...

LLVM_ABI char & FuncletLayoutID

This pass lays out funclets contiguously.

LLVM_ABI FunctionPass * createCodeGenPrepareLegacyPass()

createCodeGenPrepareLegacyPass - Transform the code to expose more pattern matching during instructio...

LLVM_ABI MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")

MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...

LLVM_ABI char & RemoveRedundantDebugValuesID

RemoveRedundantDebugValues pass.

LLVM_ABI FunctionPass * createBasicAAWrapperPass()

LLVM_ABI char & DetectDeadLanesID

This pass adds dead/undef flags after analyzing subregister lanes.

LLVM_ABI char & PostRAMachineSinkingID

This pass perform post-ra machine sink for COPY instructions.

LLVM_ABI FunctionPass * createDwarfEHPass(CodeGenOptLevel OptLevel)

createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation.

LLVM_ABI FunctionPass * createRegAllocScoringPass()

When learning an eviction policy, extract score(reward) information, otherwise this does nothing.

CodeGenOptLevel

Code generation optimization level.

LLVM_ABI char & StackSlotColoringID

StackSlotColoring - This pass performs stack slot coloring.

LLVM_ABI ModulePass * createMachineOutlinerPass(RunOutliner RunOutlinerMode)

This pass performs outlining on machine instructions directly before printing assembly.

Error make_error(ArgTs &&... Args)

Make a Error instance representing failure using the given error info type.

LLVM_ABI FunctionPass * createExpandLargeDivRemPass()

LLVM_ABI ModulePass * createLowerEmuTLSPass()

LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all TLS variables for the emulated ...

LLVM_ABI Pass * createMergeICmpsLegacyPass()

LLVM_ABI char & ProcessImplicitDefsID

ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.

LLVM_ABI ModulePass * createCheckDebugMachineModulePass()

Creates MIR Check Debug pass.

LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)

Create an analysis pass wrapper around a TTI object.

LLVM_ABI FunctionPass * createMIRProfileLoaderPass(std::string File, std::string RemappingFile, sampleprof::FSDiscriminatorPass P, IntrusiveRefCntPtr< vfs::FileSystem > FS)

Read Flow Sensitive Profile.

LLVM_ABI FunctionPass * createVerifierPass(bool FatalErrors=true)

LLVM_ABI char & MachineCSELegacyID

MachineCSE - This pass performs global CSE on machine instructions.

LLVM_ABI ImmutablePass * createTypeBasedAAWrapperPass()

LLVM_ABI FunctionPass * createWinEHPass(bool DemoteCatchSwitchPHIOnly=false)

createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...

LLVM_ABI Pass * createLoopStrengthReducePass()

LLVM_ABI MachineFunctionPass * createMachineBlockHashInfoPass()

createMachineBlockHashInfoPass - This pass computes basic block hashes.

LLVM_ABI char & LiveVariablesID

LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...

LLVM_ABI char & EarlyTailDuplicateLegacyID

Duplicate blocks with unconditional branches into tails of their predecessors.

LLVM_ABI void initializeAAResultsWrapperPassPass(PassRegistry &)

LLVM_ABI FunctionPass * createExpandReductionsPass()

This pass expands the reduction intrinsics into sequences of shuffles.

void call_once(once_flag &flag, Function &&F, Args &&... ArgList)

Execute the function specified as a parameter once.

LLVM_ABI FunctionPass * createSjLjEHPreparePass(const TargetMachine *TM)

createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...

LLVM_ABI MachineFunctionPass * createBasicBlockPathCloningPass()

LLVM_ABI char & StackColoringLegacyID

StackSlotColoring - This pass performs stack coloring and merging.

LLVM_ABI char & VirtRegRewriterID

VirtRegRewriter pass.

LLVM_ABI FunctionPass * createReplaceWithVeclibLegacyPass()

LLVM_ABI char & FinalizeISelID

This pass expands pseudo-instructions, reserves registers and adjusts machine frame information.

LLVM_ABI char & MachineSinkingLegacyID

MachineSinking - This pass performs sinking on machine instructions.

LLVM_ABI FunctionPass * createRegUsageInfoPropPass()

Return a MachineFunction pass that identifies call sites and propagates register usage information of...

LLVM_ABI FunctionPass * createPartiallyInlineLibCallsPass()

LLVM_ABI FunctionPass * createExpandFpPass()

LLVM_ABI char & MachineBlockPlacementID

MachineBlockPlacement - This pass places basic blocks based on branch probabilities.

LLVM_ABI char & TwoAddressInstructionPassID

TwoAddressInstruction - This pass reduces two-address instructions to use two operands.

LLVM_ABI MachineFunctionPass * createBasicBlockMatchingAndInferencePass()

createBasicBlockMatchingAndInferencePass - This pass enables matching and inference when using propel...

LLVM_ABI Pass * createCanonicalizeFreezeInLoopsPass()

LLVM_ABI char & LocalStackSlotAllocationID

LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...

LLVM_ABI char & BranchFolderPassID

BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...

LLVM_ABI char & PHIEliminationID

PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions.

LLVM_ABI Pass * createObjCARCContractPass()

LLVM_ABI ModulePass * createDebugifyMachineModulePass()

Creates MIR Debugify pass.

LLVM_ABI FunctionPass * createPrintFunctionPass(raw_ostream &OS, const std::string &Banner="")

Create and return a pass that prints functions to the specified raw_ostream as they are processed.

LLVM_ABI ModulePass * createWindowsSecureHotPatchingPass()

Creates Windows Secure Hot Patch pass.

LLVM_ABI char & RenameIndependentSubregsID

This pass detects subregister lanes in a virtual register that are used independently of other lanes ...

LLVM_ABI char & MachineLICMID

This pass performs loop invariant code motion on machine instructions.

LLVM_ABI char & MachineBlockPlacementStatsID

MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...

LLVM_ABI char & LiveIntervalsID

LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers.

LLVM_ABI char & MachineCopyPropagationID

MachineCopyPropagation - This pass performs copy propagation on machine instructions.

LLVM_ABI char & DeadMachineInstructionElimID

DeadMachineInstructionElim - This pass removes dead machine instructions.

LLVM_ABI void initializeCodeGen(PassRegistry &)

Initialize all passes linked into the CodeGen library.

LLVM_ABI FunctionPass * createUnreachableBlockEliminationPass()

createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...

LLVM_ABI CGPassBuilderOption getCGPassBuilderOption()

Definition TargetPassConfig.cpp:493

LLVM_ABI void reportFatalUsageError(Error Err)

Report a fatal error that does not indicate a bug in LLVM.

AnalysisID TargetPassID

Definition TargetPassConfig.cpp:391

IdentifyingPassPtr InsertedPassID

Definition TargetPassConfig.cpp:392

Pass * getInsertedPass() const

Definition TargetPassConfig.cpp:397

InsertedPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID)

Definition TargetPassConfig.cpp:394

A utility class that uses RAII to save and restore the value of a variable.

The llvm::once_flag structure.