LLVM: include/llvm/CodeGen/TargetPassConfig.h Source File (original) (raw)

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13#ifndef LLVM_CODEGEN_TARGETPASSCONFIG_H

14#define LLVM_CODEGEN_TARGETPASSCONFIG_H

15

20#include

21#include

22

23namespace llvm {

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54 union {

57 };

58 bool IsInstance = false;

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60public:

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66 bool isInstance() const { return IsInstance; }

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69 assert(!IsInstance && "Not a Pass ID");

70 return ID;

71 }

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74 assert(IsInstance && "Not a Pass Instance");

75 return P;

76 }

77};

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85private:

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92 unsigned StartBeforeInstanceNum = 0;

93 unsigned StartBeforeCount = 0;

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95 unsigned StartAfterInstanceNum = 0;

96 unsigned StartAfterCount = 0;

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98 unsigned StopBeforeInstanceNum = 0;

99 unsigned StopBeforeCount = 0;

100

101 unsigned StopAfterInstanceNum = 0;

102 unsigned StopAfterCount = 0;

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104 bool Started = true;

105 bool Stopped = false;

106 bool AddingMachinePasses = false;

107 bool DebugifyIsSafe = true;

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119 void setStartStopPasses();

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121protected:

124 bool Initialized = false;

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149public:

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159 template TMC &getTM() const {

160 return *static_cast<TMC*>(TM);

161 }

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170 static bool hasLimitedCodeGenPipeline();

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174 static bool willCompleteCodeGenPipeline();

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179 static std::string getLimitedCodeGenPipelineReason();

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230 bool isPassSubstitutedOrOverridden(AnalysisID ID) const;

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233 bool getOptimizeRegAlloc() const;

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237 bool usingDefaultRegAlloc() const;

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244 bool addISelPasses();

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248 virtual void addIRPasses();

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251 void addPassesToHandleExceptions();

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255 virtual void addCodeGenPrepare();

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259 virtual void addISelPrepare();

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300 virtual void addMachinePasses();

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304 void printAndVerify(const std::string &Banner);

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307 void addPrintPass(const std::string &Banner);

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311 void addVerifyPass(const std::string &Banner);

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314 void addDebugifyPass();

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317 void addStripDebugPass();

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320 void addCheckDebugPass();

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324 void addMachinePrePasses(bool AllowDebugify = true);

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328 void addMachinePostPasses(const std::string &Banner);

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333 bool isGlobalISelAbortEnabled() const;

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338 virtual bool reportDiagnosticWhenGlobalISelFallback() const;

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342 virtual bool isGISelCSEEnabled() const;

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345 virtual std::unique_ptr getCSEConfig() const;

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347protected:

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349 void setOpt(bool &Opt, bool Val);

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352 bool isCustomizedRegAlloc();

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369 virtual void addMachineSSAOptimization();

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387 virtual FunctionPass *createTargetRegisterAllocator(bool Optimized);

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391 virtual void addFastRegAlloc();

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396 virtual void addOptimizedRegAlloc();

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427 virtual void addMachineLateOptimization();

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436 virtual bool addGCPasses();

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439 virtual void addBlockPlacement();

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466 void addPass(Pass *P);

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470 virtual FunctionPass *createRegAllocPass(bool Optimized);

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474 virtual bool addRegAssignAndRewriteFast();

475 virtual bool addRegAssignAndRewriteOptimized();

476};

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479 TargetMachine &);

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481}

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483#endif

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

PassInstrumentationCallbacks PIC

Tagged union holding either a T or a Error.

FunctionPass class - This class is used to implement most global optimizations.

Discriminated union of Pass ID types.

Definition TargetPassConfig.h:53

bool isInstance() const

Definition TargetPassConfig.h:66

Pass * getInstance() const

Definition TargetPassConfig.h:73

AnalysisID ID

Definition TargetPassConfig.h:55

bool isValid() const

Definition TargetPassConfig.h:65

AnalysisID getID() const

Definition TargetPassConfig.h:68

IdentifyingPassPtr()

Definition TargetPassConfig.h:61

IdentifyingPassPtr(AnalysisID IDPtr)

Definition TargetPassConfig.h:62

Pass * P

Definition TargetPassConfig.h:56

IdentifyingPassPtr(Pass *InstancePtr)

Definition TargetPassConfig.h:63

This class manages callbacks registration, as well as provides a way for PassInstrumentation to pass ...

Pass interface - Implemented by all 'passes'.

StringRef - Represent a constant reference to a string, i.e.

Primary interface to the complete machine description for the target machine.

void enablePass(AnalysisID PassID)

Allow the target to enable a specific standard pass by default.

Definition TargetPassConfig.h:217

bool requiresCodeGenSCCOrder() const

Definition TargetPassConfig.h:203

TargetMachine * TM

Definition TargetPassConfig.h:122

virtual void addPreLegalizeMachineIR()

This method may be implemented by targets that want to run passes immediately before legalization.

Definition TargetPassConfig.h:273

void setInitialized()

Definition TargetPassConfig.h:164

virtual void addPreEmitPass2()

Targets may add passes immediately before machine code is emitted in this callback.

Definition TargetPassConfig.h:454

bool RequireCodeGenSCCOrder

Require processing of functions such that callees are generated before callers.

Definition TargetPassConfig.h:140

bool EnableLoopTermFold

Enable LoopTermFold immediately after LSR.

Definition TargetPassConfig.h:143

bool getEnableTailMerge() const

Definition TargetPassConfig.h:197

static Expected< StartStopInfo > getStartStopInfo(PassInstrumentationCallbacks &PIC)

Returns pass name in -stop-before or -stop-after NOTE: New pass manager migration only.

virtual void addPreSched2()

This method may be implemented by targets that want to run passes after prolog-epilog insertion and b...

Definition TargetPassConfig.h:431

virtual bool addILPOpts()

Add passes that optimize instruction level parallelism for out-of-order targets.

Definition TargetPassConfig.h:377

virtual void addPostRegAlloc()

This method may be implemented by targets that want to run passes after register allocation pass pipe...

Definition TargetPassConfig.h:424

virtual bool addInstSelector()

addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...

Definition TargetPassConfig.h:263

bool getEnableSinkAndFold() const

Definition TargetPassConfig.h:200

virtual bool addPreISel()

Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...

Definition TargetPassConfig.h:363

void setOpt(bool &Opt, bool Val)

bool Initialized

Definition TargetPassConfig.h:124

virtual void addPostBBSections()

This pass may be implemented by targets that want to run passes immediately after basic block section...

Definition TargetPassConfig.h:447

virtual void addPreEmitPass()

This pass may be implemented by targets that want to run passes immediately before machine code is em...

Definition TargetPassConfig.h:443

virtual void addPreRegBankSelect()

This method may be implemented by targets that want to run passes immediately before the register ban...

Definition TargetPassConfig.h:281

bool DisableVerify

Definition TargetPassConfig.h:128

virtual bool addPreRewrite()

addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is...

Definition TargetPassConfig.h:410

virtual bool addRegBankSelect()

This method should install a register bank selector pass, which assigns register banks to virtual reg...

Definition TargetPassConfig.h:286

void setEnableSinkAndFold(bool Enable)

Definition TargetPassConfig.h:201

void setRequiresCodeGenSCCOrder(bool Enable=true)

Definition TargetPassConfig.h:204

virtual void addPreGlobalInstructionSelect()

This method may be implemented by targets that want to run passes immediately before the (global) ins...

Definition TargetPassConfig.h:290

virtual bool addLegalizeMachineIR()

This method should install a legalize pass, which converts the instruction sequence into one that can...

Definition TargetPassConfig.h:277

void substitutePass(AnalysisID StandardID, IdentifyingPassPtr TargetID)

Allow the target to override a specific pass without overriding the pass pipeline.

void disablePass(AnalysisID PassID)

Allow the target to disable a specific standard pass by default.

Definition TargetPassConfig.h:220

virtual bool addGlobalInstructionSelect()

This method should install a (global) instruction selector pass, which converts possibly generic inst...

Definition TargetPassConfig.h:296

virtual void addPreRegAlloc()

This method may be implemented by targets that want to run passes immediately before register allocat...

Definition TargetPassConfig.h:383

bool EnableSinkAndFold

Enable sinking of instructions in MachineSink where a computation can be folded into the addressing m...

Definition TargetPassConfig.h:136

static char ID

Definition TargetPassConfig.h:156

bool EnableTailMerge

Default setting for -enable-tail-merge on this target.

Definition TargetPassConfig.h:131

PassConfigImpl * Impl

Definition TargetPassConfig.h:123

bool addCoreISelPasses()

Add the actual instruction selection passes.

void setEnableTailMerge(bool Enable)

Definition TargetPassConfig.h:198

TargetPassConfig(TargetMachine &TM, PassManagerBase &PM)

void setDisableVerify(bool Disable)

Definition TargetPassConfig.h:195

TMC & getTM() const

Get the right type of TargetMachine for this target.

Definition TargetPassConfig.h:159

virtual bool addIRTranslator()

This method should install an IR translator pass, which converts from LLVM code to machine instructio...

Definition TargetPassConfig.h:269

virtual bool addPostFastRegAllocRewrite()

addPostFastRegAllocRewrite - Add passes to the optimized register allocation pipeline after fast regi...

Definition TargetPassConfig.h:416

virtual void addPostRewrite()

Add passes to be run immediately after virtual registers are rewritten to physical registers.

Definition TargetPassConfig.h:420

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI void registerCodeGenCallback(PassInstrumentationCallbacks &PIC, TargetMachine &)

CodeGenOptLevel

Code generation optimization level.

Definition TargetPassConfig.h:181

bool StartAfter

Definition TargetPassConfig.h:182

unsigned StopInstanceNum

Definition TargetPassConfig.h:185

bool StopAfter

Definition TargetPassConfig.h:183

StringRef StartPass

Definition TargetPassConfig.h:186

StringRef StopPass

Definition TargetPassConfig.h:187

unsigned StartInstanceNum

Definition TargetPassConfig.h:184