X86Operand.h Source File (original) (raw)

9#ifndef LLVM_LIB_TARGET_X86_ASMPARSER_X86OPERAND_H

10#define LLVM_LIB_TARGET_X86_ASMPARSER_X86OPERAND_H

24#include

25#include

27namespace llvm {

80 };

82 union {

88 };

100

102

103

104

106

107

109

111 auto PrintImmValue = [&](const MCExpr *Val, const char *VName) {

114 OS << VName << Imm;

117 const MCSymbol &Sym = SRE->getSymbol();

118 if (const char *SymNameStr = Sym.getName().data())

119 OS << VName << SymNameStr;

120 }

121 }

122 };

123

124 switch (Kind) {

126 OS << Tok.Data;

127 break;

130 break;

132 OS << "DXReg";

133 break;

135 PrintImmValue(Imm.Val, "Imm:");

136 break;

138 OS << "Prefix:" << Pref.Prefixes;

139 break;

141 OS << "Memory: ModeSize=" << Mem.ModeSize;

142 if (Mem.Size)

143 OS << ",Size=" << Mem.Size;

144 if (Mem.BaseReg)

146 if (Mem.IndexReg)

147 OS << ",IndexReg="

149 if (Mem.Scale)

150 OS << ",Scale=" << Mem.Scale;

151 if (Mem.Disp)

152 PrintImmValue(Mem.Disp, ",Disp=");

153 if (Mem.SegReg)

155 break;

156 }

157 }

158

168

171 return Reg.RegNo;

172 }

173

176 return Pref.Prefixes;

177 }

178

181 return Imm.Val;

182 }

183

186 return Mem.Disp;

187 }

190 return Mem.SegReg;

191 }

194 return Mem.BaseReg;

195 }

198 return Mem.DefaultBaseReg;

199 }

202 return Mem.IndexReg;

203 }

206 return Mem.Scale;

207 }

210 return Mem.ModeSize;

211 }

214 return Mem.FrontendSize;

215 }

218 return Mem.MaybeDirectBranchDest;

219 }

220

222

224

227 return false;

228

229

230

232 if (!CE)

233 return true;

234

235

236

238 }

241 return false;

242

243

244

246 if (!CE)

247 return true;

248

249

250

252 }

255 return false;

256

257

258

260 if (!CE)

261 return true;

262

263

264

266 }

269 return false;

270

271

272

274 if (!CE)

275 return true;

276

277

278

280 }

281

283 if ( isImm ()) return false;

284

285

287 if (!CE) return false;

289 }

290

292 if ( isImm ()) return false;

293

294

296 if (!CE) return true;

298 }

299

301

303

332

334 return isMem() && Mem.BaseReg != X86::RIP && Mem.BaseReg != X86::EIP;

335 }

336

339 return Mem.IndexReg >= LowR && Mem.IndexReg <= HighR;

340 }

341

354

373

376 return false;

379 return false;

380 return true;

381 }

384 return false;

388 return false;

392 return false;

393 return true;

394 }

397 return false;

401 return false;

405 return false;

406 return true;

407 }

408

413

417

419

425

427

429

448

469

474

508

512

515 (X86MCRegisterClasses[X86::GR32RegClassID].contains(getReg()) ||

516 X86MCRegisterClasses[X86::GR64RegClassID].contains(getReg()));

517 }

518

521 (X86MCRegisterClasses[X86::GR16RegClassID].contains(getReg()) ||

522 X86MCRegisterClasses[X86::GR32RegClassID].contains(getReg()) ||

523 X86MCRegisterClasses[X86::GR64RegClassID].contains(getReg()));

524 }

525

528 (X86MCRegisterClasses[X86::VR64RegClassID].contains(getReg()) ||

529 X86MCRegisterClasses[X86::VR128XRegClassID].contains(getReg()) ||

530 X86MCRegisterClasses[X86::VR256XRegClassID].contains(getReg()) ||

531 X86MCRegisterClasses[X86::VR512RegClassID].contains(getReg()));

532 }

533

536 X86MCRegisterClasses[X86::VK1RegClassID].contains(getReg());

537 }

538

541 X86MCRegisterClasses[X86::VK2RegClassID].contains(getReg());

542 }

543

546 X86MCRegisterClasses[X86::VK4RegClassID].contains(getReg());

547 }

548

551 X86MCRegisterClasses[X86::VK8RegClassID].contains(getReg());

552 }

553

556 X86MCRegisterClasses[X86::VK16RegClassID].contains(getReg());

557 }

558

566

568 assert(N == 1 && "Invalid number of operands!");

570 }

571

573 assert(N == 1 && "Invalid number of operands!");

575 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo))

578 }

579

581 assert(N == 1 && "Invalid number of operands!");

583 if (X86MCRegisterClasses[X86::GR32RegClassID].contains(RegNo) ||

584 X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo))

587 }

588

590 assert(N == 1 && "Invalid number of operands!");

592 }

593

595 assert(N == 1 && "Invalid number of operands!");

597 }

598

600 assert(N == 1 && "Invalid number of operands!");

602 switch (Reg.id()) {

603 case X86::K0:

604 case X86::K1:

605 Reg = X86::K0_K1;

606 break;

607 case X86::K2:

608 case X86::K3:

609 Reg = X86::K2_K3;

610 break;

611 case X86::K4:

612 case X86::K5:

613 Reg = X86::K4_K5;

614 break;

615 case X86::K6:

616 case X86::K7:

617 Reg = X86::K6_K7;

618 break;

619 }

621 }

622

624 assert((N == 5) && "Invalid number of operands!");

627 else

633 }

634

636 assert((N == 1) && "Invalid number of operands!");

637

640 else

642 }

643

645 assert((N == 2) && "Invalid number of operands!");

648 }

649

651 assert((N == 1) && "Invalid number of operands!");

653 }

654

656 assert((N == 2) && "Invalid number of operands!");

657

660 else

663 }

664

667 auto Res = std::make_unique(Token, Loc, EndLoc);

668 Res->Tok.Data = Str.data();

669 Res->Tok.Length = Str.size();

670 return Res;

671 }

672

673 static std::unique_ptr

678 Res->Reg.RegNo = Reg;

682 Res->OpDecl = OpDecl;

683 return Res;

684 }

685

686 static std::unique_ptr

690

691 static std::unique_ptr

694 Res->Pref.Prefixes = Prefixes;

695 return Res;

696 }

697

701 void *OpDecl = nullptr,

702 bool GlobalRef = true) {

704 Res->Imm.Val = Val;

705 Res->Imm.LocalRef = !GlobalRef;

707 Res->OpDecl = OpDecl;

708 Res->AddressOf = true;

709 return Res;

710 }

711

712

713 static std::unique_ptr

716 void *OpDecl = nullptr, unsigned FrontendSize = 0,

717 bool UseUpRegs = false, bool MaybeDirectBranchDest = true) {

720 Res->Mem.Disp = Disp;

722 Res->Mem.DefaultBaseReg = MCRegister();

724 Res->Mem.Scale = 1;

725 Res->Mem.Size = Size;

726 Res->Mem.ModeSize = ModeSize;

727 Res->Mem.FrontendSize = FrontendSize;

728 Res->Mem.MaybeDirectBranchDest = MaybeDirectBranchDest;

731 Res->OpDecl = OpDecl;

732 Res->AddressOf = false;

733 return Res;

734 }

735

736

737 static std::unique_ptr

743 unsigned FrontendSize = 0, bool UseUpRegs = false,

744 bool MaybeDirectBranchDest = true) {

745

746

747 assert((SegReg || BaseReg || IndexReg || DefaultBaseReg) &&

748 "Invalid memory operand!");

749

750

751 assert(((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) &&

752 "Invalid scale!");

754 Res->Mem.SegReg = SegReg;

755 Res->Mem.Disp = Disp;

756 Res->Mem.BaseReg = BaseReg;

757 Res->Mem.DefaultBaseReg = DefaultBaseReg;

758 Res->Mem.IndexReg = IndexReg;

759 Res->Mem.Scale = Scale;

760 Res->Mem.Size = Size;

761 Res->Mem.ModeSize = ModeSize;

762 Res->Mem.FrontendSize = FrontendSize;

763 Res->Mem.MaybeDirectBranchDest = MaybeDirectBranchDest;

766 Res->OpDecl = OpDecl;

767 Res->AddressOf = false;

768 return Res;

769 }

770};

771

772}

773

774#endif

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)

This class is intended to be used as a base class for asm properties and features specific to the tar...

Base class for the full range of assembler expressions which are needed for parsing.

@ Constant

Constant expressions.

@ SymbolRef

References to labels and assigned expressions.

Instances of this class represent a single low-level machine instruction.

void addOperand(const MCOperand Op)

static MCOperand createExpr(const MCExpr *Val)

static MCOperand createReg(MCRegister Reg)

static MCOperand createImm(int64_t Val)

MCParsedAsmOperand()=default

Wrapper class representing physical registers. Should be passed by value.

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

StringRef getName() const

getName - Get the symbol name.

Represents a location in source code.

static SMLoc getFromPointer(const char *Ptr)

Represents a range in source code.

StringRef - Represent a constant reference to a string, i.e.

constexpr const char * data() const

data - Get a pointer to the start of the string (which may not be null terminated).

LLVM Value Representation.

static const char * getRegisterName(MCRegister Reg)

This class implements an extremely fast bulk output stream that can only output to a stream.

bool isZMMReg(MCRegister Reg)

bool isXMMReg(MCRegister Reg)

bool isYMMReg(MCRegister Reg)

This is an optimization pass for GlobalISel generic memory operations.

bool isImmSExti64i32Value(uint64_t Value)

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

MCRegister getX86SubSuperRegister(MCRegister Reg, unsigned Size, bool High=false)

bool isImmUnsignedi4Value(uint64_t Value)

bool isImmSExti64i8Value(uint64_t Value)

bool isa(const From &Val)

isa - Return true if the parameter to the template is an instance of one of the template type argu...

bool isImmUnsignedi8Value(uint64_t Value)

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

bool isImmSExti16i8Value(uint64_t Value)

bool isImmSExti32i8Value(uint64_t Value)

Definition X86Operand.h:57

bool LocalRef

Definition X86Operand.h:59

const MCExpr * Val

Definition X86Operand.h:58

Definition X86Operand.h:62

bool MaybeDirectBranchDest

If false, then this operand must be a memory operand for an indirect branch instruction.

Definition X86Operand.h:79

unsigned FrontendSize

If the memory operand is unsized and there are multiple instruction matches, prefer the one with this...

Definition X86Operand.h:74

unsigned ModeSize

Definition X86Operand.h:70

MCRegister IndexReg

Definition X86Operand.h:67

MCRegister BaseReg

Definition X86Operand.h:65

MCRegister SegReg

Definition X86Operand.h:63

MCRegister DefaultBaseReg

Definition X86Operand.h:66

const MCExpr * Disp

Definition X86Operand.h:64

unsigned Size

Definition X86Operand.h:69

unsigned Scale

Definition X86Operand.h:68

Definition X86Operand.h:53

unsigned Prefixes

Definition X86Operand.h:54

Definition X86Operand.h:49

MCRegister RegNo

Definition X86Operand.h:50

Definition X86Operand.h:44

const char * Data

Definition X86Operand.h:45

unsigned Length

Definition X86Operand.h:46

bool isMemOffs64_64() const

Definition X86Operand.h:505

SMLoc getStartLoc() const override

getStartLoc - Get the location of the first token of this operand.

Definition X86Operand.h:98

bool isVK8Pair() const

Definition X86Operand.h:549

enum llvm::X86Operand::KindTy Kind

bool isMem64_RC256X() const

Definition X86Operand.h:364

bool isPrefix() const

Definition X86Operand.h:509

void addAVX512RCOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:589

bool isImm() const override

isImm - Is this an immediate operand?

Definition X86Operand.h:223

bool isMemUseUpRegs() const override

isMemUseUpRegs - Is memory operand use up regs, for example, intel MS inline asm may use ARR[baseReg ...

Definition X86Operand.h:428

bool isMemOffs64_32() const

Definition X86Operand.h:502

static std::unique_ptr< X86Operand > CreateImm(const MCExpr *Val, SMLoc StartLoc, SMLoc EndLoc, StringRef SymName=StringRef(), void *OpDecl=nullptr, bool GlobalRef=true)

Definition X86Operand.h:698

void addMaskPairOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:599

void addExpr(MCInst &Inst, const MCExpr *Expr) const

Definition X86Operand.h:559

bool isImmSExti64i32() const

Definition X86Operand.h:267

X86Operand(KindTy K, SMLoc Start, SMLoc End)

Definition X86Operand.h:90

MCRegister getMemSegReg() const

Definition X86Operand.h:188

bool isMem64() const

Definition X86Operand.h:317

bool isOffsetOfLocal() const override

isOffsetOfLocal - Do we need to emit code to get the offset of the local variable,...

Definition X86Operand.h:300

bool AddressOf

Definition X86Operand.h:38

void addGR16orGR32orGR64Operands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:580

SMLoc EndLoc

Definition X86Operand.h:34

bool isMem512_GR16() const

Definition X86Operand.h:374

static std::unique_ptr< X86Operand > CreatePrefix(unsigned Prefixes, SMLoc StartLoc, SMLoc EndLoc)

Definition X86Operand.h:692

bool isMemOffs32_32() const

Definition X86Operand.h:490

static std::unique_ptr< X86Operand > CreateDXReg(SMLoc StartLoc, SMLoc EndLoc)

Definition X86Operand.h:687

bool UseUpRegs

This used for inline asm which may specify base reg and index reg for MemOp.

Definition X86Operand.h:42

bool isImmSExti64i8() const

Definition X86Operand.h:253

bool isMaybeDirectBranchDest() const

Definition X86Operand.h:216

void addAbsMemOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:635

bool isGR32orGR64() const

Definition X86Operand.h:513

void addImmOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:594

bool isSrcIdx8() const

Definition X86Operand.h:436

void print(raw_ostream &OS, const MCAsmInfo &) const override

print - Print a debug representation of the operand to the given stream.

Definition X86Operand.h:110

bool isSrcIdx() const

Definition X86Operand.h:430

void setTokenValue(StringRef Value)

Definition X86Operand.h:163

bool isMem512_GR64() const

Definition X86Operand.h:395

SMLoc StartLoc

Definition X86Operand.h:34

void addMemOffsOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:655

bool isImmUnsignedi8() const

Definition X86Operand.h:291

void addSrcIdxOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:644

bool isMem16() const

Definition X86Operand.h:311

bool isMem32_RC256X() const

Definition X86Operand.h:361

KindTy

Definition X86Operand.h:32

@ Register

Definition X86Operand.h:32

@ DXRegister

Definition X86Operand.h:32

@ Memory

Definition X86Operand.h:32

@ Immediate

Definition X86Operand.h:32

@ Token

Definition X86Operand.h:32

@ Prefix

Definition X86Operand.h:32

bool isSrcIdx32() const

Definition X86Operand.h:442

bool isVK1Pair() const

Definition X86Operand.h:534

bool isAbsMemMode16() const

Definition X86Operand.h:418

void * getOpDecl() override

Definition X86Operand.h:95

bool isMem128() const

Definition X86Operand.h:323

bool isMemOffs32_8() const

Definition X86Operand.h:484

bool isSibMem() const

Definition X86Operand.h:333

static std::unique_ptr< X86Operand > CreateReg(MCRegister Reg, SMLoc StartLoc, SMLoc EndLoc, bool AddressOf=false, SMLoc OffsetOfLoc=SMLoc(), StringRef SymName=StringRef(), void *OpDecl=nullptr)

Definition X86Operand.h:674

bool isMemOffs64_8() const

Definition X86Operand.h:496

bool isDstIdx8() const

Definition X86Operand.h:457

bool isImmSExti16i8() const

Definition X86Operand.h:225

SMRange getLocRange() const

getLocRange - Get the range between the first and last token of this operand.

Definition X86Operand.h:105

bool isMem32_RC512() const

Definition X86Operand.h:367

void * OpDecl

Definition X86Operand.h:37

bool isMem512() const

Definition X86Operand.h:329

MCRegister getMemBaseReg() const

Definition X86Operand.h:192

unsigned getMemScale() const

Definition X86Operand.h:204

SMLoc getEndLoc() const override

getEndLoc - Get the location of the last token of this operand.

Definition X86Operand.h:101

bool isReg() const override

isReg - Is this a register operand?

Definition X86Operand.h:510

bool isMem() const override

isMem - Is this a memory operand?

Definition X86Operand.h:304

bool isImmUnsignedi4() const

Definition X86Operand.h:282

bool isAVX512RC() const

Definition X86Operand.h:414

const MCExpr * getMemDisp() const

Definition X86Operand.h:184

bool isMemOffs16_8() const

Definition X86Operand.h:475

unsigned getPrefix() const

Definition X86Operand.h:174

bool isMem512_GR32() const

Definition X86Operand.h:382

bool isVK4Pair() const

Definition X86Operand.h:544

struct ImmOp Imm

Definition X86Operand.h:85

static std::unique_ptr< X86Operand > CreateMem(unsigned ModeSize, const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc, unsigned Size=0, StringRef SymName=StringRef(), void *OpDecl=nullptr, unsigned FrontendSize=0, bool UseUpRegs=false, bool MaybeDirectBranchDest=true)

Create an absolute memory operand.

Definition X86Operand.h:714

struct MemOp Mem

Definition X86Operand.h:86

bool isImmSExti32i8() const

Definition X86Operand.h:239

void addGR32orGR64Operands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:572

bool isDstIdx64() const

Definition X86Operand.h:466

bool isMemOffs() const

Definition X86Operand.h:470

bool isDXReg() const

Definition X86Operand.h:511

bool isMem32_RC128X() const

Definition X86Operand.h:355

bool isMem64_RC512() const

Definition X86Operand.h:370

bool isDispImm8() const

Definition X86Operand.h:420

bool isMem64_RC128() const

Definition X86Operand.h:345

bool isMemIndexReg(unsigned LowR, unsigned HighR) const

Definition X86Operand.h:337

StringRef SymName

Definition X86Operand.h:36

bool isMemOffs32_16() const

Definition X86Operand.h:487

bool isMem256() const

Definition X86Operand.h:326

bool isMem32() const

Definition X86Operand.h:314

bool isVK2Pair() const

Definition X86Operand.h:539

void addMemOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:623

void addRegOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:567

void addDstIdxOperands(MCInst &Inst, unsigned N) const

Definition X86Operand.h:650

struct RegOp Reg

Definition X86Operand.h:84

static std::unique_ptr< X86Operand > CreateMem(unsigned ModeSize, MCRegister SegReg, const MCExpr *Disp, MCRegister BaseReg, MCRegister IndexReg, unsigned Scale, SMLoc StartLoc, SMLoc EndLoc, unsigned Size=0, MCRegister DefaultBaseReg=MCRegister(), StringRef SymName=StringRef(), void *OpDecl=nullptr, unsigned FrontendSize=0, bool UseUpRegs=false, bool MaybeDirectBranchDest=true)

Create a generalized memory operand.

Definition X86Operand.h:738

bool isDstIdx16() const

Definition X86Operand.h:460

unsigned getMemModeSize() const

Definition X86Operand.h:208

bool isVK16Pair() const

Definition X86Operand.h:554

bool isVectorReg() const

Definition X86Operand.h:526

bool isDstIdx32() const

Definition X86Operand.h:463