LLVM: llvm::X86Operand Struct Reference (original) (raw)

X86Operand - Instances of this class represent a parsed X86 machine instruction. More...

#include "[Target/X86/AsmParser/X86Operand.h](X86Operand%5F8h%5Fsource.html)"

Classes
struct ImmOp
struct MemOp
struct PrefOp
struct RegOp
struct TokOp
Public Types
enum KindTy { Token, Register, Immediate, Memory, Prefix, DXRegister }
Public Member Functions
X86Operand (KindTy K, SMLoc Start, SMLoc End)
StringRef getSymName () override
void * getOpDecl () override
SMLoc getStartLoc () const override
getStartLoc - Get the location of the first token of this operand.
SMLoc getEndLoc () const override
getEndLoc - Get the location of the last token of this operand.
SMRange getLocRange () const
getLocRange - Get the range between the first and last token of this operand.
SMLoc getOffsetOfLoc () const override
getOffsetOfLoc - Get the location of the offset operator.
void print (raw_ostream &OS, const MCAsmInfo &) const override
print - Print a debug representation of the operand to the given stream.
StringRef getToken () const
void setTokenValue (StringRef Value)
MCRegister getReg () const override
unsigned getPrefix () const
const MCExpr * getImm () const
const MCExpr * getMemDisp () const
MCRegister getMemSegReg () const
MCRegister getMemBaseReg () const
MCRegister getMemDefaultBaseReg () const
MCRegister getMemIndexReg () const
unsigned getMemScale () const
unsigned getMemModeSize () const
unsigned getMemFrontendSize () const
bool isMaybeDirectBranchDest () const
bool isToken () const override
isToken - Is this a token operand?
bool isImm () const override
isImm - Is this an immediate operand?
bool isImmSExti16i8 () const
bool isImmSExti32i8 () const
bool isImmSExti64i8 () const
bool isImmSExti64i32 () const
bool isImmUnsignedi4 () const
bool isImmUnsignedi8 () const
bool isOffsetOfLocal () const override
isOffsetOfLocal - Do we need to emit code to get the offset of the local variable, rather than its value?
bool needAddressOf () const override
needAddressOf - Do we need to emit code to get the address of the variable/label?
bool isMem () const override
isMem - Is this a memory operand?
bool isMemUnsized () const
bool isMem8 () const
bool isMem16 () const
bool isMem32 () const
bool isMem64 () const
bool isMem80 () const
bool isMem128 () const
bool isMem256 () const
bool isMem512 () const
bool isSibMem () const
bool isMemIndexReg (unsigned LowR, unsigned HighR) const
bool isMem32_RC128 () const
bool isMem64_RC128 () const
bool isMem32_RC256 () const
bool isMem64_RC256 () const
bool isMem32_RC128X () const
bool isMem64_RC128X () const
bool isMem32_RC256X () const
bool isMem64_RC256X () const
bool isMem32_RC512 () const
bool isMem64_RC512 () const
bool isMem512_GR16 () const
bool isMem512_GR32 () const
bool isMem512_GR64 () const
bool isAbsMem () const
bool isAVX512RC () const
bool isAbsMemMode16 () const
bool isDispImm8 () const
bool isAbsMem8 () const
bool isMemUseUpRegs () const override
isMemUseUpRegs - Is memory operand use up regs, for example, intel MS inline asm may use ARR[baseReg + IndexReg + ...] which may use up regs in [...] expr, so ARR[baseReg + IndexReg + ...] can not use extra reg for ARR.
bool isSrcIdx () const
bool isSrcIdx8 () const
bool isSrcIdx16 () const
bool isSrcIdx32 () const
bool isSrcIdx64 () const
bool isDstIdx () const
bool isDstIdx8 () const
bool isDstIdx16 () const
bool isDstIdx32 () const
bool isDstIdx64 () const
bool isMemOffs () const
bool isMemOffs16_8 () const
bool isMemOffs16_16 () const
bool isMemOffs16_32 () const
bool isMemOffs32_8 () const
bool isMemOffs32_16 () const
bool isMemOffs32_32 () const
bool isMemOffs32_64 () const
bool isMemOffs64_8 () const
bool isMemOffs64_16 () const
bool isMemOffs64_32 () const
bool isMemOffs64_64 () const
bool isPrefix () const
bool isReg () const override
isReg - Is this a register operand?
bool isDXReg () const
bool isGR32orGR64 () const
bool isGR16orGR32orGR64 () const
bool isVectorReg () const
bool isVK1Pair () const
bool isVK2Pair () const
bool isVK4Pair () const
bool isVK8Pair () const
bool isVK16Pair () const
void addExpr (MCInst &Inst, const MCExpr *Expr) const
void addRegOperands (MCInst &Inst, unsigned N) const
void addGR32orGR64Operands (MCInst &Inst, unsigned N) const
void addGR16orGR32orGR64Operands (MCInst &Inst, unsigned N) const
void addAVX512RCOperands (MCInst &Inst, unsigned N) const
void addImmOperands (MCInst &Inst, unsigned N) const
void addMaskPairOperands (MCInst &Inst, unsigned N) const
void addMemOperands (MCInst &Inst, unsigned N) const
void addAbsMemOperands (MCInst &Inst, unsigned N) const
void addSrcIdxOperands (MCInst &Inst, unsigned N) const
void addDstIdxOperands (MCInst &Inst, unsigned N) const
void addMemOffsOperands (MCInst &Inst, unsigned N) const
Public Member Functions inherited from llvm::MCParsedAsmOperand
virtual ~MCParsedAsmOperand ()=default
void setConstraint (StringRef C)
StringRef getConstraint ()
void setMCOperandNum (unsigned OpNum)
unsigned getMCOperandNum ()
virtual void dump () const
dump - Print to the debug stream.
Static Public Member Functions
static std::unique_ptr< X86Operand > CreateToken (StringRef Str, SMLoc Loc)
static std::unique_ptr< X86Operand > CreateReg (MCRegister Reg, SMLoc StartLoc, SMLoc EndLoc, bool AddressOf=false, SMLoc OffsetOfLoc=SMLoc(), StringRef SymName=StringRef(), void *OpDecl=nullptr)
static std::unique_ptr< X86Operand > CreateDXReg (SMLoc StartLoc, SMLoc EndLoc)
static std::unique_ptr< X86Operand > CreatePrefix (unsigned Prefixes, SMLoc StartLoc, SMLoc EndLoc)
static std::unique_ptr< X86Operand > CreateImm (const MCExpr *Val, SMLoc StartLoc, SMLoc EndLoc, StringRef SymName=StringRef(), void *OpDecl=nullptr, bool GlobalRef=true)
static std::unique_ptr< X86Operand > CreateMem (unsigned ModeSize, const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc, unsigned Size=0, StringRef SymName=StringRef(), void *OpDecl=nullptr, unsigned FrontendSize=0, bool UseUpRegs=false, bool MaybeDirectBranchDest=true)
Create an absolute memory operand.
static std::unique_ptr< X86Operand > CreateMem (unsigned ModeSize, MCRegister SegReg, const MCExpr *Disp, MCRegister BaseReg, MCRegister IndexReg, unsigned Scale, SMLoc StartLoc, SMLoc EndLoc, unsigned Size=0, MCRegister DefaultBaseReg=MCRegister(), StringRef SymName=StringRef(), void *OpDecl=nullptr, unsigned FrontendSize=0, bool UseUpRegs=false, bool MaybeDirectBranchDest=true)
Create a generalized memory operand.
Public Attributes
enum llvm::X86Operand::KindTy Kind
SMLoc StartLoc
SMLoc EndLoc
SMLoc OffsetOfLoc
StringRef SymName
void * OpDecl
bool AddressOf
bool UseUpRegs = false
This used for inline asm which may specify base reg and index reg for MemOp.
union {
struct TokOp Tok
struct RegOp Reg
struct ImmOp Imm
struct MemOp Mem
struct PrefOp Pref
};

X86Operand - Instances of this class represent a parsed X86 machine instruction.

Definition at line 31 of file X86Operand.h.

KindTy

Enumerator
Token
Register
Immediate
Memory
Prefix
DXRegister

Definition at line 32 of file X86Operand.h.

llvm::X86Operand::X86Operand ( KindTy K, SMLoc Start, SMLoc End ) inline

addAbsMemOperands()

void llvm::X86Operand::addAbsMemOperands ( MCInst & Inst, unsigned N ) const inline

addAVX512RCOperands()

void llvm::X86Operand::addAVX512RCOperands ( MCInst & Inst, unsigned N ) const inline

addDstIdxOperands()

void llvm::X86Operand::addDstIdxOperands ( MCInst & Inst, unsigned N ) const inline

addExpr()

addGR16orGR32orGR64Operands()

void llvm::X86Operand::addGR16orGR32orGR64Operands ( MCInst & Inst, unsigned N ) const inline

addGR32orGR64Operands()

void llvm::X86Operand::addGR32orGR64Operands ( MCInst & Inst, unsigned N ) const inline

addImmOperands()

void llvm::X86Operand::addImmOperands ( MCInst & Inst, unsigned N ) const inline

addMaskPairOperands()

void llvm::X86Operand::addMaskPairOperands ( MCInst & Inst, unsigned N ) const inline

addMemOffsOperands()

void llvm::X86Operand::addMemOffsOperands ( MCInst & Inst, unsigned N ) const inline

addMemOperands()

void llvm::X86Operand::addMemOperands ( MCInst & Inst, unsigned N ) const inline

Definition at line 623 of file X86Operand.h.

References addExpr(), llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getMemBaseReg(), getMemDefaultBaseReg(), getMemDisp(), getMemIndexReg(), getMemScale(), getMemSegReg(), and N.

addRegOperands()

void llvm::X86Operand::addRegOperands ( MCInst & Inst, unsigned N ) const inline

addSrcIdxOperands()

void llvm::X86Operand::addSrcIdxOperands ( MCInst & Inst, unsigned N ) const inline

CreateDXReg()

CreateImm()

CreateMem() [1/2]

CreateMem() [2/2]

std::unique_ptr< X86Operand > llvm::X86Operand::CreateMem ( unsigned ModeSize, MCRegister SegReg, const MCExpr * Disp, MCRegister BaseReg, MCRegister IndexReg, unsigned Scale, SMLoc StartLoc, SMLoc EndLoc, unsigned Size = 0, MCRegister DefaultBaseReg = MCRegister(), StringRef SymName = StringRef(), void * OpDecl = nullptr, unsigned FrontendSize = 0, bool UseUpRegs = false, bool MaybeDirectBranchDest = true ) inlinestatic

CreatePrefix()

CreateReg()

CreateToken()

getEndLoc()

SMLoc llvm::X86Operand::getEndLoc ( ) const inlineoverridevirtual

getImm()

const MCExpr * llvm::X86Operand::getImm ( ) const inline

Definition at line 179 of file X86Operand.h.

References assert(), Imm, Immediate, and Kind.

Referenced by addAVX512RCOperands(), addImmOperands(), isImmSExti16i8(), isImmSExti32i8(), isImmSExti64i32(), isImmSExti64i8(), isImmUnsignedi4(), and isImmUnsignedi8().

getLocRange()

SMRange llvm::X86Operand::getLocRange ( ) const inline

getLocRange - Get the range between the first and last token of this operand.

Definition at line 105 of file X86Operand.h.

References EndLoc, and StartLoc.

getMemBaseReg()

MCRegister llvm::X86Operand::getMemBaseReg ( ) const inline

Definition at line 192 of file X86Operand.h.

References assert(), Kind, Mem, and Memory.

Referenced by addDstIdxOperands(), addMemOperands(), addSrcIdxOperands(), isAbsMem(), isDstIdx(), isMem512_GR16(), isMem512_GR32(), isMem512_GR64(), isMemOffs(), and isSrcIdx().

getMemDefaultBaseReg()

MCRegister llvm::X86Operand::getMemDefaultBaseReg ( ) const inline

getMemDisp()

const MCExpr * llvm::X86Operand::getMemDisp ( ) const inline

getMemFrontendSize()

unsigned llvm::X86Operand::getMemFrontendSize ( ) const inline

getMemIndexReg()

MCRegister llvm::X86Operand::getMemIndexReg ( ) const inline

getMemModeSize()

unsigned llvm::X86Operand::getMemModeSize ( ) const inline

getMemScale()

unsigned llvm::X86Operand::getMemScale ( ) const inline

getMemSegReg()

MCRegister llvm::X86Operand::getMemSegReg ( ) const inline

getOffsetOfLoc()

SMLoc llvm::X86Operand::getOffsetOfLoc ( ) const inlineoverridevirtual

getOpDecl()

void * llvm::X86Operand::getOpDecl ( ) inlineoverridevirtual

getPrefix()

unsigned llvm::X86Operand::getPrefix ( ) const inline

getReg()

MCRegister llvm::X86Operand::getReg ( ) const inlineoverridevirtual

Implements llvm::MCParsedAsmOperand.

Definition at line 169 of file X86Operand.h.

References assert(), Kind, Reg, and Register.

Referenced by addGR16orGR32orGR64Operands(), addGR32orGR64Operands(), addMaskPairOperands(), addRegOperands(), isGR16orGR32orGR64(), isGR32orGR64(), isVectorReg(), isVK16Pair(), isVK1Pair(), isVK2Pair(), isVK4Pair(), and isVK8Pair().

getStartLoc()

SMLoc llvm::X86Operand::getStartLoc ( ) const inlineoverridevirtual

getSymName()

StringRef llvm::X86Operand::getSymName ( ) inlineoverridevirtual

getToken()

StringRef llvm::X86Operand::getToken ( ) const inline

isAbsMem()

bool llvm::X86Operand::isAbsMem ( ) const inline

isAbsMem8()

bool llvm::X86Operand::isAbsMem8 ( ) const inline

isAbsMemMode16()

bool llvm::X86Operand::isAbsMemMode16 ( ) const inline

isAVX512RC()

bool llvm::X86Operand::isAVX512RC ( ) const inline

isDispImm8()

bool llvm::X86Operand::isDispImm8 ( ) const inline

isDstIdx()

bool llvm::X86Operand::isDstIdx ( ) const inline

isDstIdx16()

bool llvm::X86Operand::isDstIdx16 ( ) const inline

isDstIdx32()

bool llvm::X86Operand::isDstIdx32 ( ) const inline

isDstIdx64()

bool llvm::X86Operand::isDstIdx64 ( ) const inline

isDstIdx8()

bool llvm::X86Operand::isDstIdx8 ( ) const inline

isDXReg()

bool llvm::X86Operand::isDXReg ( ) const inline

isGR16orGR32orGR64()

bool llvm::X86Operand::isGR16orGR32orGR64 ( ) const inline

isGR32orGR64()

bool llvm::X86Operand::isGR32orGR64 ( ) const inline

isImm()

bool llvm::X86Operand::isImm ( ) const inlineoverridevirtual

isImmSExti16i8()

bool llvm::X86Operand::isImmSExti16i8 ( ) const inline

isImmSExti32i8()

bool llvm::X86Operand::isImmSExti32i8 ( ) const inline

isImmSExti64i32()

bool llvm::X86Operand::isImmSExti64i32 ( ) const inline

isImmSExti64i8()

bool llvm::X86Operand::isImmSExti64i8 ( ) const inline

isImmUnsignedi4()

bool llvm::X86Operand::isImmUnsignedi4 ( ) const inline

isImmUnsignedi8()

bool llvm::X86Operand::isImmUnsignedi8 ( ) const inline

isMaybeDirectBranchDest()

bool llvm::X86Operand::isMaybeDirectBranchDest ( ) const inline

isMem()

bool llvm::X86Operand::isMem ( ) const inlineoverridevirtual

isMem128()

bool llvm::X86Operand::isMem128 ( ) const inline

isMem16()

bool llvm::X86Operand::isMem16 ( ) const inline

isMem256()

bool llvm::X86Operand::isMem256 ( ) const inline

isMem32()

bool llvm::X86Operand::isMem32 ( ) const inline

isMem32_RC128()

bool llvm::X86Operand::isMem32_RC128 ( ) const inline

isMem32_RC128X()

bool llvm::X86Operand::isMem32_RC128X ( ) const inline

isMem32_RC256()

bool llvm::X86Operand::isMem32_RC256 ( ) const inline

isMem32_RC256X()

bool llvm::X86Operand::isMem32_RC256X ( ) const inline

isMem32_RC512()

bool llvm::X86Operand::isMem32_RC512 ( ) const inline

isMem512()

bool llvm::X86Operand::isMem512 ( ) const inline

isMem512_GR16()

bool llvm::X86Operand::isMem512_GR16 ( ) const inline

isMem512_GR32()

bool llvm::X86Operand::isMem512_GR32 ( ) const inline

isMem512_GR64()

bool llvm::X86Operand::isMem512_GR64 ( ) const inline

isMem64()

bool llvm::X86Operand::isMem64 ( ) const inline

isMem64_RC128()

bool llvm::X86Operand::isMem64_RC128 ( ) const inline

isMem64_RC128X()

bool llvm::X86Operand::isMem64_RC128X ( ) const inline

isMem64_RC256()

bool llvm::X86Operand::isMem64_RC256 ( ) const inline

isMem64_RC256X()

bool llvm::X86Operand::isMem64_RC256X ( ) const inline

isMem64_RC512()

bool llvm::X86Operand::isMem64_RC512 ( ) const inline

isMem8()

bool llvm::X86Operand::isMem8 ( ) const inline

isMem80()

bool llvm::X86Operand::isMem80 ( ) const inline

isMemIndexReg()

isMemOffs()

bool llvm::X86Operand::isMemOffs ( ) const inline

Definition at line 470 of file X86Operand.h.

References getMemBaseReg(), getMemIndexReg(), getMemScale(), Kind, and Memory.

Referenced by isMemOffs16_16(), isMemOffs16_32(), isMemOffs16_8(), isMemOffs32_16(), isMemOffs32_32(), isMemOffs32_64(), isMemOffs32_8(), isMemOffs64_16(), isMemOffs64_32(), isMemOffs64_64(), and isMemOffs64_8().

isMemOffs16_16()

bool llvm::X86Operand::isMemOffs16_16 ( ) const inline

isMemOffs16_32()

bool llvm::X86Operand::isMemOffs16_32 ( ) const inline

isMemOffs16_8()

bool llvm::X86Operand::isMemOffs16_8 ( ) const inline

isMemOffs32_16()

bool llvm::X86Operand::isMemOffs32_16 ( ) const inline

isMemOffs32_32()

bool llvm::X86Operand::isMemOffs32_32 ( ) const inline

isMemOffs32_64()

bool llvm::X86Operand::isMemOffs32_64 ( ) const inline

isMemOffs32_8()

bool llvm::X86Operand::isMemOffs32_8 ( ) const inline

isMemOffs64_16()

bool llvm::X86Operand::isMemOffs64_16 ( ) const inline

isMemOffs64_32()

bool llvm::X86Operand::isMemOffs64_32 ( ) const inline

isMemOffs64_64()

bool llvm::X86Operand::isMemOffs64_64 ( ) const inline

isMemOffs64_8()

bool llvm::X86Operand::isMemOffs64_8 ( ) const inline

isMemUnsized()

bool llvm::X86Operand::isMemUnsized ( ) const inline

isMemUseUpRegs()

bool llvm::X86Operand::isMemUseUpRegs ( ) const inlineoverridevirtual

isMemUseUpRegs - Is memory operand use up regs, for example, intel MS inline asm may use ARR[baseReg + IndexReg + ...] which may use up regs in [...] expr, so ARR[baseReg + IndexReg + ...] can not use extra reg for ARR.

For example, calculating ARR address to a reg or use another base reg in PIC model.

Reimplemented from llvm::MCParsedAsmOperand.

Definition at line 428 of file X86Operand.h.

References UseUpRegs.

isOffsetOfLocal()

bool llvm::X86Operand::isOffsetOfLocal ( ) const inlineoverridevirtual

isOffsetOfLocal - Do we need to emit code to get the offset of the local variable, rather than its value?

Only valid when parsing MS-style inline assembly.

Reimplemented from llvm::MCParsedAsmOperand.

Definition at line 300 of file X86Operand.h.

References Imm, and isImm().

isPrefix()

bool llvm::X86Operand::isPrefix ( ) const inline

isReg()

bool llvm::X86Operand::isReg ( ) const inlineoverridevirtual

isSibMem()

bool llvm::X86Operand::isSibMem ( ) const inline

isSrcIdx()

bool llvm::X86Operand::isSrcIdx ( ) const inline

isSrcIdx16()

bool llvm::X86Operand::isSrcIdx16 ( ) const inline

isSrcIdx32()

bool llvm::X86Operand::isSrcIdx32 ( ) const inline

isSrcIdx64()

bool llvm::X86Operand::isSrcIdx64 ( ) const inline

isSrcIdx8()

bool llvm::X86Operand::isSrcIdx8 ( ) const inline

isToken()

bool llvm::X86Operand::isToken ( ) const inlineoverridevirtual

isVectorReg()

bool llvm::X86Operand::isVectorReg ( ) const inline

isVK16Pair()

bool llvm::X86Operand::isVK16Pair ( ) const inline

isVK1Pair()

bool llvm::X86Operand::isVK1Pair ( ) const inline

isVK2Pair()

bool llvm::X86Operand::isVK2Pair ( ) const inline

isVK4Pair()

bool llvm::X86Operand::isVK4Pair ( ) const inline

isVK8Pair()

bool llvm::X86Operand::isVK8Pair ( ) const inline

needAddressOf()

bool llvm::X86Operand::needAddressOf ( ) const inlineoverridevirtual

needAddressOf - Do we need to emit code to get the address of the variable/label?

Only valid when parsing MS-style inline assembly.

Reimplemented from llvm::MCParsedAsmOperand.

Definition at line 302 of file X86Operand.h.

References AddressOf.

print()

print - Print a debug representation of the operand to the given stream.

Implements llvm::MCParsedAsmOperand.

Definition at line 110 of file X86Operand.h.

References llvm::cast(), llvm::MCExpr::Constant, llvm::StringRef::data(), DXRegister, llvm::dyn_cast(), llvm::MCExpr::getKind(), llvm::MCSymbol::getName(), llvm::X86IntelInstPrinter::getRegisterName(), Imm, Immediate, Kind, Mem, Memory, Pref, Prefix, Reg, Register, llvm::MCExpr::SymbolRef, Tok, and Token.

setTokenValue()

void llvm::X86Operand::setTokenValue ( StringRef Value) inline

[union]

AddressOf

bool llvm::X86Operand::AddressOf

EndLoc

SMLoc llvm::X86Operand::EndLoc

Imm

struct ImmOp llvm::X86Operand::Imm

Kind

enum llvm::X86Operand::KindTy llvm::X86Operand::Kind

Referenced by getImm(), getMemBaseReg(), getMemDefaultBaseReg(), getMemDisp(), getMemFrontendSize(), getMemIndexReg(), getMemModeSize(), getMemScale(), getMemSegReg(), getPrefix(), getReg(), getToken(), isAbsMem(), isDXReg(), isGR16orGR32orGR64(), isGR32orGR64(), isImm(), isMaybeDirectBranchDest(), isMem(), isMem128(), isMem16(), isMem256(), isMem32(), isMem512(), isMem64(), isMem8(), isMem80(), isMemIndexReg(), isMemOffs(), isMemUnsized(), isPrefix(), isReg(), isToken(), isVectorReg(), isVK16Pair(), isVK1Pair(), isVK2Pair(), isVK4Pair(), isVK8Pair(), print(), setTokenValue(), and X86Operand().

Mem

struct MemOp llvm::X86Operand::Mem

Definition at line 86 of file X86Operand.h.

Referenced by getMemBaseReg(), getMemDefaultBaseReg(), getMemDisp(), getMemFrontendSize(), getMemIndexReg(), getMemModeSize(), getMemScale(), getMemSegReg(), isAbsMemMode16(), isMaybeDirectBranchDest(), isMem128(), isMem16(), isMem256(), isMem32(), isMem32_RC128X(), isMem32_RC256X(), isMem32_RC512(), isMem512(), isMem64(), isMem64_RC128X(), isMem64_RC256X(), isMem64_RC512(), isMem8(), isMem80(), isMemIndexReg(), isMemOffs16_16(), isMemOffs16_32(), isMemOffs16_8(), isMemOffs32_16(), isMemOffs32_32(), isMemOffs32_64(), isMemOffs32_8(), isMemOffs64_16(), isMemOffs64_32(), isMemOffs64_64(), isMemOffs64_8(), isMemUnsized(), isSibMem(), and print().

OffsetOfLoc

SMLoc llvm::X86Operand::OffsetOfLoc

OpDecl

void* llvm::X86Operand::OpDecl

Pref

struct PrefOp llvm::X86Operand::Pref

Reg

struct RegOp llvm::X86Operand::Reg

StartLoc

SMLoc llvm::X86Operand::StartLoc

SymName

Tok

struct TokOp llvm::X86Operand::Tok

UseUpRegs

bool llvm::X86Operand::UseUpRegs = false


The documentation for this struct was generated from the following file: