XCoreISelLowering.h Source File (original) (raw)

14#ifndef LLVM_LIB_TARGET_XCORE_XCOREISELLOWERING_H

15#define LLVM_LIB_TARGET_XCORE_XCOREISELLOWERING_H

21namespace llvm {

30 {

31 public:

58 Type *Ty, unsigned AS,

65 return XCore::R0;

66 }

72 return XCore::R1;

73 }

75 private:

81 bool isVarArg,

87 bool isTailCall,

96 SDValue lowerLoadWordFromAlignedBasePlusOffset(const SDLoc &DL,

100

101

121

122

123 std::pair<unsigned, const TargetRegisterClass *>

125 StringRef Constraint, MVT VT) const override;

126

127

130

131 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;

132

133 void computeKnownBitsForTargetNode(const SDValue Op,

135 const APInt &DemandedElts,

137 unsigned Depth = 0) const override;

138

144

148

153

155 bool isVarArg,

158 };

159}

160

161#endif

static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG)

static SDValue LowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget)

static SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget)

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Function Alias Analysis Results

static SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG)

static SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG, const SparcSubtarget *Subtarget)

static SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG)

static SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG, const SparcTargetLowering &TLI, const SparcSubtarget *Subtarget)

This file describes how to lower LLVM code to machine code.

static SDValue LowerADJUST_TRAMPOLINE(SDValue Op, SelectionDAG &DAG)

Class for arbitrary precision integers.

This is an important base class in LLVM.

A parsed version of the target data layout string in and methods for querying it.

This is an important class for using LLVM in a threaded context.

Representation of each machine instruction.

Wrapper class representing virtual and physical registers.

Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...

Represents one node in the SelectionDAG.

Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

StringRef - Represent a constant reference to a string, i.e.

virtual bool isZExtFree(Type *FromTy, Type *ToTy) const

Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...

TargetLowering(const TargetLowering &)=delete

Primary interface to the complete machine description for the target machine.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

The instances of the Type class are immutable: once they are created, they are never changed.

MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override

Return the type to use for a scalar shift opcode, given the shifted amount type.

Definition XCoreISelLowering.h:40

bool isZExtFree(SDValue Val, EVT VT2) const override

Return true if zero-extending the specific node Val to type VT2 is free (either because it's implicit...

MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr &MI, MachineBasicBlock *MBB) const override

This method should be implemented by targets that mark instructions with the 'usesCustomInserter' fla...

If a physical register, this returns the register that receives the exception typeid on entry to a la...

Definition XCoreISelLowering.h:71

If a physical register, this returns the register that receives the exception address on entry to an ...

Definition XCoreISelLowering.h:64

bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I=nullptr) const override

isLegalAddressingMode - Return true if the addressing mode represented by AM is legal for this target...

SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override

LowerOperation - Provide custom lowering hooks for some operations.

void ReplaceNodeResults(SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG) const override

ReplaceNodeResults - Replace the results of node with an illegal result type with new values built ou...

unsigned getJumpTableEncoding() const override

Return the entry encoding for a jump table in the current function.

XCoreTargetLowering(const TargetMachine &TM, const XCoreSubtarget &Subtarget)

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

DWARFExpression::Operation Op

This structure contains all information that is necessary for lowering calls.