LLVM: llvm::PhiLoweringHelper Class Reference (original) (raw)

#include "[Target/AMDGPU/SILowerI1Copies.h](SILowerI1Copies%5F8h%5Fsource.html)"

Public Member Functions
PhiLoweringHelper (MachineFunction *MF, MachineDominatorTree *DT, MachinePostDominatorTree *PDT)
virtual ~PhiLoweringHelper ()=default
bool lowerPhis ()
bool isConstantLaneMask (Register Reg, bool &Val) const
MachineBasicBlock::iterator getSaluInsertionAtEnd (MachineBasicBlock &MBB) const
Return a point at the end of the given MBB to insert SALU instructions for lane mask calculation.
void initializeLaneMaskRegisterAttributes (Register LaneMask)
void initializeLaneMaskRegisterAttributes (MachineRegisterInfo::VRegAttrs Attrs)
bool isLaneMaskReg (Register Reg) const
virtual void markAsLaneMask (Register DstReg) const =0
virtual void getCandidatesForLowering (SmallVectorImpl< MachineInstr * > &Vreg1Phis) const =0
virtual void collectIncomingValuesFromPhi (const MachineInstr *MI, SmallVectorImpl< Incoming > &Incomings) const =0
virtual void replaceDstReg (Register NewReg, Register OldReg, MachineBasicBlock *MBB)=0
virtual void buildMergeLaneMasks (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DstReg, Register PrevReg, Register CurReg)=0
virtual void constrainAsLaneMask (Incoming &In)=0
Protected Attributes
bool IsWave32 = false
MachineFunction * MF = nullptr
MachineDominatorTree * DT = nullptr
MachinePostDominatorTree * PDT = nullptr
MachineRegisterInfo * MRI = nullptr
const GCNSubtarget * ST = nullptr
const SIInstrInfo * TII = nullptr
MachineRegisterInfo::VRegAttrs LaneMaskRegAttrs
DenseSet< Register > PhiRegisters
Register ExecReg
unsigned MovOp
unsigned AndOp
unsigned OrOp
unsigned XorOp
unsigned AndN2Op
unsigned OrN2Op

Definition at line 38 of file SILowerI1Copies.h.

Definition at line 442 of file SILowerI1Copies.cpp.

References AndN2Op, AndOp, DT, ExecReg, IsWave32, MF, MovOp, MRI, OrN2Op, OrOp, PDT, ST, TII, and XorOp.

◆ ~PhiLoweringHelper()

virtual llvm::PhiLoweringHelper::~PhiLoweringHelper ( ) virtualdefault

◆ buildMergeLaneMasks()

◆ collectIncomingValuesFromPhi()

◆ constrainAsLaneMask()

virtual void llvm::PhiLoweringHelper::constrainAsLaneMask ( Incoming & In) pure virtual

◆ getCandidatesForLowering()

◆ getSaluInsertionAtEnd()

◆ initializeLaneMaskRegisterAttributes() [1/2]

◆ initializeLaneMaskRegisterAttributes() [2/2]

void llvm::PhiLoweringHelper::initializeLaneMaskRegisterAttributes ( Register LaneMask) inline

◆ isConstantLaneMask()

◆ isLaneMaskReg()

bool llvm::PhiLoweringHelper::isLaneMaskReg ( Register Reg) const inline

◆ lowerPhis()

bool PhiLoweringHelper::lowerPhis ( )

Definition at line 471 of file SILowerI1Copies.cpp.

References llvm::SSAUpdater::AddAvailableValue(), llvm::Incoming::Block, buildMergeLaneMasks(), llvm::SmallVectorImpl< T >::clear(), collectIncomingValuesFromPhi(), constrainAsLaneMask(), llvm::createLaneMaskReg(), llvm::dbgs(), DT, llvm::SmallVectorTemplateCommon< T, typename >::empty(), getCandidatesForLowering(), getSaluInsertionAtEnd(), llvm::SSAUpdater::GetValueInMiddleOfBlock(), llvm::SSAUpdater::Initialize(), initializeLaneMaskRegisterAttributes(), insertUndefLaneMask(), llvm::Register::isValid(), LaneMaskRegAttrs, LLVM_DEBUG, markAsLaneMask(), MBB, MF, MI, MRI, PDT, PhiRegisters, llvm::Incoming::Reg, replaceDstReg(), llvm::sort(), TII, and llvm::Incoming::UpdatedReg.

◆ markAsLaneMask()

virtual void llvm::PhiLoweringHelper::markAsLaneMask ( Register DstReg) const pure virtual

◆ replaceDstReg()

◆ AndN2Op

unsigned llvm::PhiLoweringHelper::AndN2Op protected

◆ AndOp

◆ DT

◆ ExecReg

Register llvm::PhiLoweringHelper::ExecReg protected

◆ IsWave32

bool llvm::PhiLoweringHelper::IsWave32 = false protected

◆ LaneMaskRegAttrs

◆ MF

◆ MovOp

◆ MRI

◆ OrN2Op

unsigned llvm::PhiLoweringHelper::OrN2Op protected

◆ OrOp

◆ PDT

◆ PhiRegisters

◆ ST

◆ TII

◆ XorOp

The documentation for this class was generated from the following files: