LLVM: llvm::MachineRegisterInfo Class Reference (original) (raw)

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...

#include "[llvm/CodeGen/MachineRegisterInfo.h](MachineRegisterInfo%5F8h%5Fsource.html)"

Classes
class defusechain_instr_iterator
defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More...
class defusechain_iterator
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More...
class Delegate
struct VRegAttrs
All attributes(register class or bank and low-level type) a virtual register can have. More...
Public Types
using reg_iterator = defusechain_iterator<true, true, false, true, false>
reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.
using reg_instr_iterator
reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.
using reg_bundle_iterator
reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.
using reg_nodbg_iterator
reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.
using reg_instr_nodbg_iterator
reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
using reg_bundle_nodbg_iterator
reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.
using def_iterator = defusechain_iterator<false, true, false, true, false>
def_iterator/def_begin/def_end - Walk all defs of the specified register.
using def_instr_iterator
def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.
using def_bundle_iterator
def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.
using use_iterator = defusechain_iterator<true, false, false, true, false>
use_iterator/use_begin/use_end - Walk all uses of the specified register.
using use_instr_iterator
use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.
using use_bundle_iterator
use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.
using use_nodbg_iterator
use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.
using use_instr_nodbg_iterator
use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
using use_bundle_nodbg_iterator
use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.
using livein_iterator
Public Member Functions
LLVM_ABI MachineRegisterInfo (MachineFunction *MF)
MachineRegisterInfo (const MachineRegisterInfo &)=delete
MachineRegisterInfo & operator= (const MachineRegisterInfo &)=delete
const TargetRegisterInfo * getTargetRegisterInfo () const
void resetDelegate (Delegate *delegate)
void addDelegate (Delegate *delegate)
void noteNewVirtualRegister (Register Reg)
void noteCloneVirtualRegister (Register NewReg, Register SrcReg)
const MachineFunction & getMF () const
bool isSSA () const
void leaveSSA ()
bool tracksLiveness () const
tracksLiveness - Returns true when tracking register liveness accurately.
void invalidateLiveness ()
invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
bool shouldTrackSubRegLiveness (const TargetRegisterClass &RC) const
Returns true if liveness for register class RC should be tracked at the subregister level.
bool shouldTrackSubRegLiveness (Register VReg) const
bool subRegLivenessEnabled () const
bool isUpdatedCSRsInitialized () const
Returns true if the updated CSR list was initialized and false otherwise.
LLVM_ABI void disableCalleeSavedRegister (MCRegister Reg)
Disables the register from the list of CSRs.
LLVM_ABI const MCPhysReg * getCalleeSavedRegs () const
Returns list of callee saved registers.
LLVM_ABI void setCalleeSavedRegs (ArrayRef< MCPhysReg > CSRs)
Sets the updated Callee Saved Registers list.
LLVM_ABI void addRegOperandToUseList (MachineOperand *MO)
Add MO to the linked list of operands for its register.
LLVM_ABI void removeRegOperandFromUseList (MachineOperand *MO)
Remove MO from its use-def list.
LLVM_ABI void moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps)
Move NumOps operands from Src to Dst, updating use-def lists as needed.
LLVM_ABI void verifyUseList (Register Reg) const
Verify the sanity of the use list for Reg.
LLVM_ABI void verifyUseLists () const
Verify the use list of all registers.
reg_iterator reg_begin (Register RegNo) const
iterator_range< reg_iterator > reg_operands (Register Reg) const
reg_instr_iterator reg_instr_begin (Register RegNo) const
iterator_range< reg_instr_iterator > reg_instructions (Register Reg) const
reg_bundle_iterator reg_bundle_begin (Register RegNo) const
iterator_range< reg_bundle_iterator > reg_bundles (Register Reg) const
bool reg_empty (Register RegNo) const
reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).
reg_nodbg_iterator reg_nodbg_begin (Register RegNo) const
iterator_range< reg_nodbg_iterator > reg_nodbg_operands (Register Reg) const
reg_instr_nodbg_iterator reg_instr_nodbg_begin (Register RegNo) const
iterator_range< reg_instr_nodbg_iterator > reg_nodbg_instructions (Register Reg) const
reg_bundle_nodbg_iterator reg_bundle_nodbg_begin (Register RegNo) const
iterator_range< reg_bundle_nodbg_iterator > reg_nodbg_bundles (Register Reg) const
bool reg_nodbg_empty (Register RegNo) const
reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.
def_iterator def_begin (Register RegNo) const
iterator_range< def_iterator > def_operands (Register Reg) const
def_instr_iterator def_instr_begin (Register RegNo) const
iterator_range< def_instr_iterator > def_instructions (Register Reg) const
def_bundle_iterator def_bundle_begin (Register RegNo) const
iterator_range< def_bundle_iterator > def_bundles (Register Reg) const
bool def_empty (Register RegNo) const
def_empty - Return true if there are no instructions defining the specified register (it may be live-in).
StringRef getVRegName (Register Reg) const
void insertVRegByName (StringRef Name, Register Reg)
bool hasOneDef (Register RegNo) const
Return true if there is exactly one operand defining the specified register.
MachineOperand * getOneDef (Register Reg) const
Returns the defining operand if there is exactly one operand defining the specified register, otherwise nullptr.
use_iterator use_begin (Register RegNo) const
iterator_range< use_iterator > use_operands (Register Reg) const
use_instr_iterator use_instr_begin (Register RegNo) const
iterator_range< use_instr_iterator > use_instructions (Register Reg) const
use_bundle_iterator use_bundle_begin (Register RegNo) const
iterator_range< use_bundle_iterator > use_bundles (Register Reg) const
bool use_empty (Register RegNo) const
use_empty - Return true if there are no instructions using the specified register.
bool hasOneUse (Register RegNo) const
hasOneUse - Return true if there is exactly one instruction using the specified register.
use_nodbg_iterator use_nodbg_begin (Register RegNo) const
iterator_range< use_nodbg_iterator > use_nodbg_operands (Register Reg) const
use_instr_nodbg_iterator use_instr_nodbg_begin (Register RegNo) const
iterator_range< use_instr_nodbg_iterator > use_nodbg_instructions (Register Reg) const
use_bundle_nodbg_iterator use_bundle_nodbg_begin (Register RegNo) const
iterator_range< use_bundle_nodbg_iterator > use_nodbg_bundles (Register Reg) const
bool use_nodbg_empty (Register RegNo) const
use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.
LLVM_ABI bool hasOneNonDBGUse (Register RegNo) const
hasOneNonDBGUse - Return true if there is exactly one non-Debug use of the specified register.
LLVM_ABI bool hasOneNonDBGUser (Register RegNo) const
hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.
LLVM_ABI MachineOperand * getOneNonDBGUse (Register RegNo) const
If the register has a single non-Debug use, returns it; otherwise returns nullptr.
LLVM_ABI MachineInstr * getOneNonDBGUser (Register RegNo) const
If the register has a single non-Debug instruction using the specified register, returns it; otherwise returns nullptr.
LLVM_ABI bool hasAtMostUserInstrs (Register Reg, unsigned MaxUsers) const
hasAtMostUses - Return true if the given register has at most MaxUsers non-debug user instructions.
LLVM_ABI void replaceRegWith (Register FromReg, Register ToReg)
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
LLVM_ABI MachineInstr * getVRegDef (Register Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found.
LLVM_ABI MachineInstr * getUniqueVRegDef (Register Reg) const
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found.
LLVM_ABI void clearKillFlags (Register Reg) const
clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.
LLVM_ABI void dumpUses (Register RegNo) const
LLVM_ABI bool isConstantPhysReg (MCRegister PhysReg) const
Returns true if PhysReg is unallocatable and constant throughout the function.
PSetIterator getPressureSets (VirtRegOrUnit VRegOrUnit) const
Get an iterator over the pressure sets affected by the virtual register or register unit.
const TargetRegisterClass * getRegClass (Register Reg) const
Return the register class of the specified virtual register.
const TargetRegisterClass * getRegClassOrNull (Register Reg) const
Return the register class of Reg, or null if Reg has not been assigned a register class yet.
const RegisterBank * getRegBank (Register Reg) const
Return the register bank of Reg.
const RegisterBank * getRegBankOrNull (Register Reg) const
Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class.
const RegClassOrRegBank & getRegClassOrRegBank (Register Reg) const
Return the register bank or register class of Reg.
LLVM_ABI void setRegClass (Register Reg, const TargetRegisterClass *RC)
setRegClass - Set the register class of the specified virtual register.
LLVM_ABI void setRegBank (Register Reg, const RegisterBank &RegBank)
Set the register bank to RegBank for Reg.
void setRegClassOrRegBank (Register Reg, const RegClassOrRegBank &RCOrRB)
LLVM_ABI const TargetRegisterClass * constrainRegClass (Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.
LLVM_ABI bool constrainRegAttrs (Register Reg, Register ConstrainingReg, unsigned MinNumRegs=0)
Constrain the register class or the register bank of the virtual register Reg (and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type).
LLVM_ABI bool recomputeRegClass (Register Reg)
recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.
LLVM_ABI Register createVirtualRegister (const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified register class.
VRegAttrs getVRegAttrs (Register Reg) const
Returns register class or bank and low level type of Reg.
LLVM_ABI Register createVirtualRegister (VRegAttrs RegAttr, StringRef Name="")
Create and return a new virtual register in the function with the specified register attributes(register class or bank and low level type).
LLVM_ABI Register cloneVirtualRegister (Register VReg, StringRef Name="")
Create and return a new virtual register in the function with the same attributes as the given register.
LLT getType (Register Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.
LLVM_ABI void setType (Register VReg, LLT Ty)
Set the low-level type of VReg to Ty.
LLVM_ABI Register createGenericVirtualRegister (LLT Ty, StringRef Name="")
Create and return a new generic virtual register with low-level type Ty.
LLVM_ABI void clearVirtRegTypes ()
Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).
LLVM_ABI Register createIncompleteVirtualRegister (StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet.
unsigned getNumVirtRegs () const
getNumVirtRegs - Return the number of virtual registers created.
LLVM_ABI void clearVirtRegs ()
clearVirtRegs - Remove all virtual registers (after physreg assignment).
void setRegAllocationHint (Register VReg, unsigned Type, Register PrefReg)
setRegAllocationHint - Specify a register allocation hint for the specified virtual register.
void addRegAllocationHint (Register VReg, Register PrefReg)
addRegAllocationHint - Add a register allocation hint to the hints vector for VReg.
void setSimpleHint (Register VReg, Register PrefReg)
Specify the preferred (target independent) register allocation hint for the specified virtual register.
void clearSimpleHint (Register VReg)
std::pair< unsigned, Register > getRegAllocationHint (Register VReg) const
getRegAllocationHint - Return the register allocation hint for the specified virtual register.
Register getSimpleHint (Register VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.
const std::pair< unsigned, SmallVector< Register, 4 > > * getRegAllocationHints (Register VReg) const
getRegAllocationHints - Return a reference to the vector of all register allocation hints for VReg.
LLVM_ABI void markUsesInDebugValueAsUndef (Register Reg) const
markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.
void updateDbgUsersToReg (MCRegister OldReg, MCRegister NewReg, ArrayRef< MachineInstr * > Users) const
updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register.
LLVM_ABI bool isPhysRegModified (MCRegister PhysReg, bool SkipNoReturnDef=false) const
Return true if the specified register is modified in this function.
LLVM_ABI bool isPhysRegUsed (MCRegister PhysReg, bool SkipRegMaskTest=false) const
Return true if the specified register is modified or read in this function.
void addPhysRegsUsedFromRegMask (const uint32_t *RegMask)
addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
const BitVector & getUsedPhysRegsMask () const
LLVM_ABI void freezeReservedRegs ()
freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.
void reserveReg (MCRegister PhysReg, const TargetRegisterInfo *TRI)
reserveReg – Mark a register as reserved so checks like isAllocatable will not suggest using it.
bool reservedRegsFrozen () const
reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.
bool canReserveReg (MCRegister PhysReg) const
canReserveReg - Returns true if PhysReg can be used as a reserved register.
const BitVector & getReservedRegs () const
getReservedRegs - Returns a reference to the frozen set of reserved registers.
bool isReserved (MCRegister PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
LLVM_ABI bool isReservedRegUnit (MCRegUnit Unit) const
Returns true when the given register unit is considered reserved.
bool isAllocatable (MCRegister PhysReg) const
isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.
void addLiveIn (MCRegister Reg, Register vreg=Register())
addLiveIn - Add the specified register as a live-in.
livein_iterator livein_begin () const
livein_iterator livein_end () const
bool livein_empty () const
ArrayRef< std::pair< MCRegister, Register > > liveins () const
LLVM_ABI bool isLiveIn (Register Reg) const
LLVM_ABI MCRegister getLiveInPhysReg (Register VReg) const
getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.
LLVM_ABI Register getLiveInVirtReg (MCRegister PReg) const
getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in virtual register.
LLVM_ABI void EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)
EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.
LLVM_ABI LaneBitmask getMaxLaneMaskForVReg (Register Reg) const
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg.
Static Public Member Functions
static reg_iterator reg_end ()
static reg_instr_iterator reg_instr_end ()
static reg_bundle_iterator reg_bundle_end ()
static reg_nodbg_iterator reg_nodbg_end ()
static reg_instr_nodbg_iterator reg_instr_nodbg_end ()
static reg_bundle_nodbg_iterator reg_bundle_nodbg_end ()
static def_iterator def_end ()
static def_instr_iterator def_instr_end ()
static def_bundle_iterator def_bundle_end ()
static use_iterator use_end ()
static use_instr_iterator use_instr_end ()
static use_bundle_iterator use_bundle_end ()
static use_nodbg_iterator use_nodbg_end ()
static use_instr_nodbg_iterator use_instr_nodbg_end ()
static use_bundle_nodbg_iterator use_bundle_nodbg_end ()

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.

Definition at line 53 of file MachineRegisterInfo.h.

def_bundle_iterator

Initial value:

defusechain_iterator - This class provides iterator support for machine operands in the function that...

def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.

Definition at line 415 of file MachineRegisterInfo.h.

def_instr_iterator

Initial value:

def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.

Definition at line 399 of file MachineRegisterInfo.h.

def_iterator

def_iterator/def_begin/def_end - Walk all defs of the specified register.

Definition at line 387 of file MachineRegisterInfo.h.

livein_iterator

reg_bundle_iterator

Initial value:

reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.

Definition at line 313 of file MachineRegisterInfo.h.

reg_bundle_nodbg_iterator

Initial value:

reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 366 of file MachineRegisterInfo.h.

reg_instr_iterator

Initial value:

reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.

Definition at line 297 of file MachineRegisterInfo.h.

reg_instr_nodbg_iterator

Initial value:

reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 349 of file MachineRegisterInfo.h.

reg_iterator

reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.

Definition at line 285 of file MachineRegisterInfo.h.

reg_nodbg_iterator

Initial value:

reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...

reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.

Definition at line 332 of file MachineRegisterInfo.h.

use_bundle_iterator

Initial value:

use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.

Definition at line 494 of file MachineRegisterInfo.h.

use_bundle_nodbg_iterator

Initial value:

use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 553 of file MachineRegisterInfo.h.

use_instr_iterator

Initial value:

use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.

Definition at line 478 of file MachineRegisterInfo.h.

use_instr_nodbg_iterator

Initial value:

use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 536 of file MachineRegisterInfo.h.

use_iterator

use_iterator/use_begin/use_end - Walk all uses of the specified register.

Definition at line 466 of file MachineRegisterInfo.h.

use_nodbg_iterator

Initial value:

use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.

Definition at line 519 of file MachineRegisterInfo.h.

MachineRegisterInfo() [2/2]

addDelegate()

void llvm::MachineRegisterInfo::addDelegate ( Delegate * delegate) inline

addLiveIn()

addPhysRegsUsedFromRegMask()

void llvm::MachineRegisterInfo::addPhysRegsUsedFromRegMask ( const uint32_t * RegMask) inline

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.

This corresponds to the bit mask attached to register mask operands.

Definition at line 913 of file MachineRegisterInfo.h.

addRegAllocationHint()

void llvm::MachineRegisterInfo::addRegAllocationHint ( Register VReg, Register PrefReg ) inline

addRegOperandToUseList()

void MachineRegisterInfo::addRegOperandToUseList ( MachineOperand * MO )

canReserveReg()

bool llvm::MachineRegisterInfo::canReserveReg ( MCRegister PhysReg) const inline

clearKillFlags()

void MachineRegisterInfo::clearKillFlags ( Register Reg ) const

clearSimpleHint()

void llvm::MachineRegisterInfo::clearSimpleHint ( Register VReg) inline

clearVirtRegs()

void MachineRegisterInfo::clearVirtRegs ( )

clearVirtRegTypes()

void MachineRegisterInfo::clearVirtRegTypes ( )

Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).

Definition at line 201 of file MachineRegisterInfo.cpp.

cloneVirtualRegister()

constrainRegAttrs()

Constrain the register class or the register bank of the virtual register Reg (and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type).

Do nothing if any of the attributes (classes, banks, or low-level types) of the registers are deemed incompatible, or if the resulting register will have a class smaller than before and of size less than MinNumRegs. Return true if such register attributes exist, false otherwise.

Note

Use this method instead of constrainRegClass and RegisterBankInfo::constrainGenericRegister everywhere but SelectionDAG ISel / FastISel and GlobalISel's InstructionSelect pass respectively.

Definition at line 90 of file MachineRegisterInfo.cpp.

References llvm::cast(), constrainRegClass(), getRegClassOrRegBank(), getType(), llvm::isa(), llvm::LLT::isValid(), setRegClassOrRegBank(), and setType().

constrainRegClass()

constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.

Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.

Note

Assumes that the register has a register class assigned. Use RegisterBankInfo::constrainGenericRegister in GlobalISel's InstructionSelect pass and constrainRegAttrs in every other pass, including non-select passes of GlobalISel, instead.

Definition at line 84 of file MachineRegisterInfo.cpp.

References getRegClass().

Referenced by llvm::X86InstrInfo::classifyLEAReg(), constrainRegAttrs(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), and llvm::AArch64InstrInfo::storeRegToStackSlot().

createGenericVirtualRegister()

createIncompleteVirtualRegister()

createVirtualRegister() [1/2]

createVirtualRegister - Create and return a new virtual register in the function with the specified register class.

Definition at line 154 of file MachineRegisterInfo.cpp.

References assert(), createIncompleteVirtualRegister(), llvm::TargetRegisterClass::isAllocatable(), and noteNewVirtualRegister().

Referenced by addLiveIn(), llvm::SPIRVGlobalRegistry::buildConstantSampler(), llvm::X86InstrInfo::classifyLEAReg(), llvm::AArch64FrameLowering::eliminateCallFramePseudoInstr(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::RISCVTargetLowering::emitDynamicProbedAlloc(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::CSKYFrameLowering::emitPrologue(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::RISCVFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::SPIRVGlobalRegistry::getOrCreateGlobalVariableWithBinding(), llvm::SPIRVCallLowering::lowerCall(), LowerCallResults(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDMRRestore(), llvm::PPCRegisterInfo::lowerDMRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::PPCRegisterInfo::lowerWACCRestore(), llvm::PPCRegisterInfo::lowerWACCSpilling(), llvm::RISCVRegisterInfo::materializeFrameBaseRegister(), llvm::PPCRegisterInfo::prepareDynamicAlloca(), and llvm::ThumbRegisterInfo::rewriteFrameIndex().

createVirtualRegister() [2/2]

def_begin()

def_iterator llvm::MachineRegisterInfo::def_begin ( Register RegNo) const inline

def_bundle_begin()

def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_begin ( Register RegNo) const inline

def_bundle_end()

def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_end ( ) inlinestatic

def_bundles()

def_empty()

bool llvm::MachineRegisterInfo::def_empty ( Register RegNo) const inline

def_end()

def_iterator llvm::MachineRegisterInfo::def_end ( ) inlinestatic

def_instr_begin()

def_instr_iterator llvm::MachineRegisterInfo::def_instr_begin ( Register RegNo) const inline

def_instr_end()

def_instr_iterator llvm::MachineRegisterInfo::def_instr_end ( ) inlinestatic

def_instructions()

def_operands()

disableCalleeSavedRegister()

void MachineRegisterInfo::disableCalleeSavedRegister ( MCRegister Reg )

dumpUses()

EmitLiveInCopies()

freezeReservedRegs()

void MachineRegisterInfo::freezeReservedRegs ( )

getCalleeSavedRegs()

Returns list of callee saved registers.

The function returns the updated CSR list (after taking into account registers that are disabled from the CSR list).

Definition at line 643 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getCalleeSavedRegs(), getTargetRegisterInfo(), and I.

Referenced by llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::CSKYFrameLowering::determineCalleeSaves(), llvm::TargetFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::VETargetLowering::emitSjLjDispatchBlock(), getLiveRegsForEntryMBB(), isACalleeSavedRegister(), llvm::X86MachineFunctionInfo::setRestoreBasePointer(), and llvm::SIMachineFunctionInfo::splitWWMSpillRegisters().

getLiveInPhysReg()

getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.

Definition at line 467 of file MachineRegisterInfo.cpp.

References liveins().

getLiveInVirtReg()

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in virtual register.

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.

Definition at line 476 of file MachineRegisterInfo.cpp.

References liveins(), and Register.

getMaxLaneMaskForVReg()

getMF()

getNumVirtRegs()

unsigned llvm::MachineRegisterInfo::getNumVirtRegs ( ) const inline

getOneDef()

getOneNonDBGUse()

getOneNonDBGUser()

getPressureSets()

Get an iterator over the pressure sets affected by the virtual register or register unit.

Definition at line 1281 of file MachineRegisterInfo.h.

getRegAllocationHint()

getRegAllocationHints()

getRegBank()

getRegBankOrNull()

getRegClass()

Return the register class of the specified virtual register.

This shouldn't be used directly unless Reg has a register class.

See also

getRegClassOrNull when this might happen.

Definition at line 648 of file MachineRegisterInfo.h.

References assert(), llvm::cast(), llvm::isa(), and Reg.

Referenced by constrainRegClass(), llvm::AllocationOrder::create(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), GetCostForDef(), getMaxLaneMaskForVReg(), getRegTy(), isNonFoldablePartialRegisterLoad(), and recomputeRegClass().

getRegClassOrNull()

Return the register class of Reg, or null if Reg has not been assigned a register class yet.

Note

A null register class can only happen when these two conditions are met:

  1. Generic virtual registers are created.
  2. The machine function has not completely been through the instruction selection process. None of this condition is possible without GlobalISel for now. In other words, if GlobalISel is not used or if the query happens after the select pass, using getRegClass is safe.

Definition at line 665 of file MachineRegisterInfo.h.

References llvm::dyn_cast_if_present(), and Reg.

Referenced by getRegClass(), and shouldTrackSubRegLiveness().

getRegClassOrRegBank()

getReservedRegs()

const BitVector & llvm::MachineRegisterInfo::getReservedRegs ( ) const inline

getSimpleHint()

getTargetRegisterInfo()

Definition at line 159 of file MachineRegisterInfo.h.

Referenced by clearVirtRegs(), disableCalleeSavedRegister(), freezeReservedRegs(), getCalleeSavedRegs(), isAllocatable(), isConstantPhysReg(), isPhysRegModified(), isPhysRegUsed(), isReservedRegUnit(), MachineRegisterInfo(), recomputeRegClass(), replaceRegWith(), llvm::tryFoldSPUpdateIntoPushPop(), updateDbgUsersToReg(), verifyUseList(), and verifyUseLists().

getType()

LLT llvm::MachineRegisterInfo::getType ( Register Reg) const inline

getUniqueVRegDef()

getUsedPhysRegsMask()

const BitVector & llvm::MachineRegisterInfo::getUsedPhysRegsMask ( ) const inline

getVRegAttrs()

getVRegDef()

getVRegName()

hasAtMostUserInstrs()

hasOneDef()

bool llvm::MachineRegisterInfo::hasOneDef ( Register RegNo) const inline

hasOneNonDBGUse()

bool MachineRegisterInfo::hasOneNonDBGUse ( Register RegNo ) const

hasOneNonDBGUser()

bool MachineRegisterInfo::hasOneNonDBGUser ( Register RegNo ) const

hasOneUse()

bool llvm::MachineRegisterInfo::hasOneUse ( Register RegNo) const inline

insertVRegByName()

invalidateLiveness()

void llvm::MachineRegisterInfo::invalidateLiveness ( ) inline

invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.

This should be called by late passes that invalidate the liveness information.

Definition at line 218 of file MachineRegisterInfo.h.

isAllocatable()

bool llvm::MachineRegisterInfo::isAllocatable ( MCRegister PhysReg) const inline

isConstantPhysReg()

bool MachineRegisterInfo::isConstantPhysReg ( MCRegister PhysReg ) const

isLiveIn()

isPhysRegModified()

bool MachineRegisterInfo::isPhysRegModified ( MCRegister PhysReg,
bool SkipNoReturnDef = false ) const

isPhysRegUsed()

bool MachineRegisterInfo::isPhysRegUsed ( MCRegister PhysReg,
bool SkipRegMaskTest = false ) const

isReserved()

bool llvm::MachineRegisterInfo::isReserved ( MCRegister PhysReg) const inline

isReservedRegUnit()

bool MachineRegisterInfo::isReservedRegUnit ( MCRegUnit Unit ) const

isSSA()

bool llvm::MachineRegisterInfo::isSSA ( ) const inline

isUpdatedCSRsInitialized()

bool llvm::MachineRegisterInfo::isUpdatedCSRsInitialized ( ) const inline

Returns true if the updated CSR list was initialized and false otherwise.

Definition at line 239 of file MachineRegisterInfo.h.

leaveSSA()

void llvm::MachineRegisterInfo::leaveSSA ( ) inline

livein_begin()

livein_iterator llvm::MachineRegisterInfo::livein_begin ( ) const inline

livein_empty()

bool llvm::MachineRegisterInfo::livein_empty ( ) const inline

livein_end()

livein_iterator llvm::MachineRegisterInfo::livein_end ( ) const inline

liveins()

markUsesInDebugValueAsUndef()

void MachineRegisterInfo::markUsesInDebugValueAsUndef ( Register Reg ) const

moveOperands()

noteCloneVirtualRegister()

void llvm::MachineRegisterInfo::noteCloneVirtualRegister ( Register NewReg, Register SrcReg ) inline

noteNewVirtualRegister()

void llvm::MachineRegisterInfo::noteNewVirtualRegister ( Register Reg) inline

operator=()

recomputeRegClass()

reg_begin()

reg_iterator llvm::MachineRegisterInfo::reg_begin ( Register RegNo) const inline

reg_bundle_begin()

reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_begin ( Register RegNo) const inline

reg_bundle_end()

reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_end ( ) inlinestatic

reg_bundle_nodbg_begin()

reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_begin ( Register RegNo) const inline

reg_bundle_nodbg_end()

reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_end ( ) inlinestatic

reg_bundles()

reg_empty()

bool llvm::MachineRegisterInfo::reg_empty ( Register RegNo) const inline

reg_end()

reg_iterator llvm::MachineRegisterInfo::reg_end ( ) inlinestatic

reg_instr_begin()

reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_begin ( Register RegNo) const inline

reg_instr_end()

reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_end ( ) inlinestatic

reg_instr_nodbg_begin()

reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_begin ( Register RegNo) const inline

reg_instr_nodbg_end()

reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_end ( ) inlinestatic

reg_instructions()

reg_nodbg_begin()

reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_begin ( Register RegNo) const inline

reg_nodbg_bundles()

reg_nodbg_empty()

bool llvm::MachineRegisterInfo::reg_nodbg_empty ( Register RegNo) const inline

reg_nodbg_end()

reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_end ( ) inlinestatic

reg_nodbg_instructions()

reg_nodbg_operands()

reg_operands()

removeRegOperandFromUseList()

void MachineRegisterInfo::removeRegOperandFromUseList ( MachineOperand * MO )

replaceRegWith()

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Note that it is usually necessary to first constrain ToReg's register class and register bank to match the FromReg constraints using one of the methods:

constrainRegClass(ToReg, getRegClass(FromReg)) constrainRegAttrs(ToReg, FromReg) RegisterBankInfo::constrainGenericRegister(ToReg, *MRI.getRegClass(FromReg), MRI)

These functions will return a falsy result if the virtual registers have incompatible constraints.

Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. If ToReg is a physical register we apply the sub register to obtain the final/proper physical register.

Definition at line 386 of file MachineRegisterInfo.cpp.

References assert(), getTargetRegisterInfo(), llvm::Register::isPhysical(), llvm::make_early_inc_range(), reg_operands(), and TRI.

reservedRegsFrozen()

bool llvm::MachineRegisterInfo::reservedRegsFrozen ( ) const inline

reserveReg()

reserveReg – Mark a register as reserved so checks like isAllocatable will not suggest using it.

This should not be used during the middle of a function walk, or when liveness info is available.

Definition at line 938 of file MachineRegisterInfo.h.

References assert(), reservedRegsFrozen(), and TRI.

resetDelegate()

void llvm::MachineRegisterInfo::resetDelegate ( Delegate * delegate) inline

setCalleeSavedRegs()

setRegAllocationHint()

setRegBank()

setRegClass()

setRegClassOrRegBank()

setSimpleHint()

void llvm::MachineRegisterInfo::setSimpleHint ( Register VReg, Register PrefReg ) inline

setType()

void MachineRegisterInfo::setType ( Register VReg,
LLT Ty )

shouldTrackSubRegLiveness() [1/2]

shouldTrackSubRegLiveness() [2/2]

bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( Register VReg) const inline

subRegLivenessEnabled()

bool llvm::MachineRegisterInfo::subRegLivenessEnabled ( ) const inline

tracksLiveness()

bool llvm::MachineRegisterInfo::tracksLiveness ( ) const inline

updateDbgUsersToReg()

use_begin()

use_iterator llvm::MachineRegisterInfo::use_begin ( Register RegNo) const inline

use_bundle_begin()

use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_begin ( Register RegNo) const inline

use_bundle_end()

use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_end ( ) inlinestatic

use_bundle_nodbg_begin()

use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_begin ( Register RegNo) const inline

use_bundle_nodbg_end()

use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_end ( ) inlinestatic

use_bundles()

use_empty()

bool llvm::MachineRegisterInfo::use_empty ( Register RegNo) const inline

use_end()

use_iterator llvm::MachineRegisterInfo::use_end ( ) inlinestatic

use_instr_begin()

use_instr_iterator llvm::MachineRegisterInfo::use_instr_begin ( Register RegNo) const inline

use_instr_end()

use_instr_iterator llvm::MachineRegisterInfo::use_instr_end ( ) inlinestatic

use_instr_nodbg_begin()

use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_begin ( Register RegNo) const inline

use_instr_nodbg_end()

use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_end ( ) inlinestatic

use_instructions()

use_nodbg_begin()

use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_begin ( Register RegNo) const inline

use_nodbg_bundles()

use_nodbg_empty()

bool llvm::MachineRegisterInfo::use_nodbg_empty ( Register RegNo) const inline

use_nodbg_end()

use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_end ( ) inlinestatic

use_nodbg_instructions()

use_nodbg_operands()

use_operands()

verifyUseList()

void MachineRegisterInfo::verifyUseList ( Register Reg ) const

Verify the sanity of the use list for Reg.

Definition at line 223 of file MachineRegisterInfo.cpp.

References AbstractManglingParser< Derived, Alloc >::NumOps, assert(), llvm::errs(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), getTargetRegisterInfo(), llvm::MachineOperand::isReg(), MI, llvm::printReg(), and reg_operands().

Referenced by clearVirtRegs(), and verifyUseLists().

verifyUseLists()

void MachineRegisterInfo::verifyUseLists ( ) const

defusechain_instr_iterator

friend class defusechain_instr_iterator friend

defusechain_iterator

friend class defusechain_iterator friend

The documentation for this class was generated from the following files: