LLVM: llvm::jitlink::aarch32 Namespace Reference (original) (raw)

Classes
struct ArmConfig
JITLink sub-arch configuration for Arm CPU models. More...
struct FixupInfo
Collection of named constants per fixup kind. More...
struct FixupInfo< Arm_Call >
struct FixupInfo< Arm_Jump24 >
struct FixupInfo< Arm_MovtAbs >
struct FixupInfo< Arm_MovwAbsNC >
struct FixupInfo< Thumb_Call >
struct FixupInfo< Thumb_Jump24 >
struct FixupInfo< Thumb_MovtAbs >
struct FixupInfo< Thumb_MovtPrel >
struct FixupInfo< Thumb_MovwAbsNC >
struct FixupInfo< Thumb_MovwPrelNC >
struct FixupInfoArm
FixupInfo checks for Arm edge kinds work on 32-bit words. More...
struct FixupInfoArmBranch
struct FixupInfoArmMov
struct FixupInfoBase
FixupInfo base class is required for dynamic lookups. More...
struct FixupInfoThumb
FixupInfo check for Thumb32 edge kinds work on a pair of 16-bit halfwords. More...
struct FixupInfoThumbMov
class GOTBuilder
Populate a Global Offset Table from edges that request it. More...
struct HalfWords
Immutable pair of halfwords, Hi and Lo, with overflow check. More...
class StubsManager_prev7
Stubs builder emits non-position-independent Arm stubs for pre-v7 CPUs. More...
class StubsManager_v7
Stubs builder for v7 emits non-position-independent Arm and Thumb stubs. More...
Enumerations
enum EdgeKind_aarch32 : Edge::Kind { FirstDataRelocation = Edge::FirstRelocation , Data_Delta32 = FirstDataRelocation , Data_Pointer32, Data_PRel31, Data_RequestGOTAndTransformToDelta32, LastDataRelocation = Data_RequestGOTAndTransformToDelta32 , FirstArmRelocation, Arm_Call = FirstArmRelocation , Arm_Jump24, Arm_MovwAbsNC, Arm_MovtAbs, LastArmRelocation = Arm_MovtAbs , FirstThumbRelocation, Thumb_Call = FirstThumbRelocation , Thumb_Jump24, Thumb_MovwAbsNC, Thumb_MovtAbs, Thumb_MovwPrelNC, Thumb_MovtPrel, LastThumbRelocation = Thumb_MovtPrel , None, LastRelocation = None }
JITLink-internal AArch32 fixup kinds. More...
enum TargetFlags_aarch32 : TargetFlagsType { ThumbSymbol = 1 << 0 }
Flags enum for AArch32-specific symbol properties. More...
enum class StubsFlavor { Undefined = 0 , pre_v7, v7 }
AArch32 uses stubs for a number of purposes, like branch range extension or interworking between Arm and Thumb instruction subsets. More...
Functions
LLVM_ABI bool hasTargetFlags (Symbol &Sym, TargetFlagsType Flags)
Check whether the given target flags are set for this Symbol.
LLVM_ABI const char * getCPUArchName (ARMBuildAttrs::CPUArch K)
Human-readable name for a given CPU architecture kind.
LLVM_ABI const char * getEdgeKindName (Edge::Kind K)
Get a human-readable name for the given AArch32 edge kind.
ArmConfig getArmConfigForCPUArch (ARMBuildAttrs::CPUArch CPUArch)
Obtain the sub-arch configuration for a given Arm CPU model.
LLVM_ABI Expected< int64_t > readAddendData (LinkGraph &G, Block &B, Edge::OffsetT Offset, Edge::Kind Kind)
Helper function to read the initial addend for Data-class relocations.
LLVM_ABI Expected< int64_t > readAddendArm (LinkGraph &G, Block &B, Edge::OffsetT Offset, Edge::Kind Kind)
Helper function to read the initial addend for Arm-class relocations.
LLVM_ABI Expected< int64_t > readAddendThumb (LinkGraph &G, Block &B, Edge::OffsetT Offset, Edge::Kind Kind, const ArmConfig &ArmCfg)
Helper function to read the initial addend for Thumb-class relocations.
Expected< int64_t > readAddend (LinkGraph &G, Block &B, Edge::OffsetT Offset, Edge::Kind Kind, const ArmConfig &ArmCfg)
Read the initial addend for a REL-type relocation.
LLVM_ABI Error applyFixupData (LinkGraph &G, Block &B, const Edge &E)
Helper function to apply the fixup for Data-class relocations.
LLVM_ABI Error applyFixupArm (LinkGraph &G, Block &B, const Edge &E)
Helper function to apply the fixup for Arm-class relocations.
LLVM_ABI Error applyFixupThumb (LinkGraph &G, Block &B, const Edge &E, const ArmConfig &ArmCfg)
Helper function to apply the fixup for Thumb-class relocations.
Error applyFixup (LinkGraph &G, Block &B, const Edge &E, const ArmConfig &ArmCfg)
Apply fixup expression for edge to block content.
HalfWords encodeImmBT4BlT1BlxT2 (int64_t Value)
Encode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2).
int64_t decodeImmBT4BlT1BlxT2 (uint32_t Hi, uint32_t Lo)
Decode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2).
LLVM_ABI HalfWords encodeImmBT4BlT1BlxT2_J1J2 (int64_t Value)
Encode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2).
LLVM_ABI int64_t decodeImmBT4BlT1BlxT2_J1J2 (uint32_t Hi, uint32_t Lo)
Decode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2).
LLVM_ABI uint32_t encodeImmBA1BlA1BlxA2 (int64_t Value)
Encode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2).
LLVM_ABI int64_t decodeImmBA1BlA1BlxA2 (int64_t Value)
Decode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2).
LLVM_ABI HalfWords encodeImmMovtT1MovwT3 (uint16_t Value)
Encode 16-bit immediate value for move instruction formats MOVT T1 and MOVW T3.
LLVM_ABI uint16_t decodeImmMovtT1MovwT3 (uint32_t Hi, uint32_t Lo)
Decode 16-bit immediate value from move instruction formats MOVT T1 and MOVW T3.
LLVM_ABI HalfWords encodeRegMovtT1MovwT3 (int64_t Value)
Encode register ID for instruction formats MOVT T1 and MOVW T3.
LLVM_ABI int64_t decodeRegMovtT1MovwT3 (uint32_t Hi, uint32_t Lo)
Decode register ID from instruction formats MOVT T1 and MOVW T3.
LLVM_ABI uint32_t encodeImmMovtA1MovwA2 (uint16_t Value)
Encode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2.
LLVM_ABI uint16_t decodeImmMovtA1MovwA2 (uint64_t Value)
Decode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2.
LLVM_ABI uint32_t encodeRegMovtA1MovwA2 (int64_t Value)
Encode register ID for instruction formats MOVT A1 and MOVW A2.
LLVM_ABI int64_t decodeRegMovtA1MovwA2 (uint64_t Value)
Decode register ID for instruction formats MOVT A1 and MOVW A2.
static Error checkOpcode (LinkGraph &G, const ArmRelocation &R, Edge::Kind Kind)
static Error checkOpcode (LinkGraph &G, const ThumbRelocation &R, Edge::Kind Kind)
template<EdgeKind_aarch32 Kind>
bool checkRegister (const ThumbRelocation &R, HalfWords Reg)
template<EdgeKind_aarch32 Kind>
bool checkRegister (const ArmRelocation &R, uint32_t Reg)
template<EdgeKind_aarch32 Kind>
void writeRegister (WritableThumbRelocation &R, HalfWords Reg)
template<EdgeKind_aarch32 Kind>
void writeRegister (WritableArmRelocation &R, uint32_t Reg)
template<EdgeKind_aarch32 Kind>
void writeImmediate (WritableThumbRelocation &R, HalfWords Imm)
template<EdgeKind_aarch32 Kind>
void writeImmediate (WritableArmRelocation &R, uint32_t Imm)
template<size_t Size>
static Block & allocPointer (LinkGraph &G, Section &S, const uint8_t(&Content)[Size])
Create a new node in the link-graph for the given pointer value.
template<size_t Size>
static Block & allocStub (LinkGraph &G, Section &S, const uint8_t(&Code)[Size])
Create a new node in the link-graph for the given stub template.
static Block & createStubPrev7 (LinkGraph &G, Section &S, Symbol &Target)
static Block & createStubThumbv7 (LinkGraph &G, Section &S, Symbol &Target)
static Block & createStubArmv7 (LinkGraph &G, Section &S, Symbol &Target)
static bool needsStub (const Edge &E)

◆ EdgeKind_aarch32

JITLink-internal AArch32 fixup kinds.

Enumerator
FirstDataRelocation Relocations of class Data respect target endianness (unless otherwise specified)
Data_Delta32 Relative 32-bit value relocation.
Data_Pointer32 Absolute 32-bit value relocation.
Data_PRel31 Relative 31-bit value relocation that preserves the most-significant bit.
Data_RequestGOTAndTransformToDelta32 Create GOT entry and store offset.
LastDataRelocation
FirstArmRelocation Relocations of class Arm (covers fixed-width 4-byte instruction subset)
Arm_Call Write immediate value for unconditional PC-relative branch with link. We patch the instruction opcode to account for an instruction-set state switch: we use the bl instruction to stay in ARM and the blx instruction to switch to Thumb.
Arm_Jump24 Write immediate value for conditional PC-relative branch without link. If the branch target is not ARM, we are forced to generate an explicit interworking stub.
Arm_MovwAbsNC Write immediate value to the lower halfword of the destination register.
Arm_MovtAbs Write immediate value to the top halfword of the destination register.
LastArmRelocation
FirstThumbRelocation Relocations of class Thumb16 and Thumb32 (covers Thumb instruction subset)
Thumb_Call Write immediate value for unconditional PC-relative branch with link. We patch the instruction opcode to account for an instruction-set state switch: we use the bl instruction to stay in Thumb and the blx instruction to switch to ARM.
Thumb_Jump24 Write immediate value for PC-relative branch without link. The instruction can be made conditional by an IT block. If the branch target is not ARM, we are forced to generate an explicit interworking stub.
Thumb_MovwAbsNC Write immediate value to the lower halfword of the destination register.
Thumb_MovtAbs Write immediate value to the top halfword of the destination register.
Thumb_MovwPrelNC Write PC-relative immediate value to the lower halfword of the destination register.
Thumb_MovtPrel Write PC-relative immediate value to the top halfword of the destination register.
LastThumbRelocation
None No-op relocation.
LastRelocation

Definition at line 31 of file aarch32.h.

◆ StubsFlavor

AArch32 uses stubs for a number of purposes, like branch range extension or interworking between Arm and Thumb instruction subsets.

Stub implementations vary depending on CPU architecture (v4, v6, v7), instruction subset and branch type (absolute/PC-relative).

For each kind of stub, the StubsFlavor defines one concrete form that is used throughout the LinkGraph.

Stubs are often called "veneers" in the official docs and online.

Enumerator
Undefined
pre_v7
v7

Definition at line 137 of file aarch32.h.

◆ TargetFlags_aarch32

Flags enum for AArch32-specific symbol properties.

Enumerator
ThumbSymbol

Definition at line 116 of file aarch32.h.

◆ allocPointer()

◆ allocStub()

◆ applyFixup()

Apply fixup expression for edge to block content.

Definition at line 316 of file aarch32.h.

References applyFixupArm(), applyFixupData(), applyFixupThumb(), assert(), B(), E(), G, LastArmRelocation, LastDataRelocation, LastThumbRelocation, None, and llvm::Error::success().

◆ applyFixupArm()

Helper function to apply the fixup for Arm-class relocations.

Definition at line 521 of file aarch32.cpp.

References Arm_Call, Arm_Jump24, Arm_MovtAbs, Arm_MovwAbsNC, B(), checkOpcode(), E(), encodeImmBA1BlA1BlxA2(), encodeImmMovtA1MovwA2(), G, llvm::jitlink::Symbol::getAddress(), llvm::orc::ExecutorAddr::getValue(), hasTargetFlags(), llvm::isInt(), LLVM_LIKELY, llvm::make_error(), llvm::jitlink::makeTargetOutOfRangeError(), llvm::Error::success(), ThumbSymbol, and writeImmediate().

Referenced by applyFixup().

◆ applyFixupData()

Helper function to apply the fixup for Data-class relocations.

Definition at line 463 of file aarch32.cpp.

References B(), Data_Delta32, Data_Pointer32, Data_PRel31, Data_RequestGOTAndTransformToDelta32, E(), G, llvm::jitlink::Symbol::getAddress(), llvm::orc::ExecutorAddr::getValue(), llvm::isInt(), llvm::isUInt(), llvm::little, LLVM_LIKELY, llvm_unreachable, llvm::make_error(), llvm::jitlink::makeTargetOutOfRangeError(), llvm::support::endian::read32be(), llvm::support::endian::read32le(), llvm::Error::success(), llvm::support::endian::write32be(), and llvm::support::endian::write32le().

Referenced by applyFixup().

◆ applyFixupThumb()

Helper function to apply the fixup for Thumb-class relocations.

Definition at line 595 of file aarch32.cpp.

References llvm::alignTo(), assert(), B(), checkOpcode(), E(), encodeImmBT4BlT1BlxT2(), encodeImmBT4BlT1BlxT2_J1J2(), encodeImmMovtT1MovwT3(), G, llvm::jitlink::Symbol::getAddress(), llvm::orc::ExecutorAddr::getValue(), hasTargetFlags(), llvm::isInt(), llvm::jitlink::aarch32::ArmConfig::J1J2BranchEncoding, LLVM_LIKELY, llvm::make_error(), llvm::jitlink::makeTargetOutOfRangeError(), llvm::Error::success(), Thumb_Call, Thumb_Jump24, Thumb_MovtAbs, Thumb_MovtPrel, Thumb_MovwAbsNC, Thumb_MovwPrelNC, ThumbSymbol, and writeImmediate().

Referenced by applyFixup().

◆ checkOpcode() [1/2]

Error llvm::jitlink::aarch32::checkOpcode ( LinkGraph & G, const ArmRelocation & R, Edge::Kind Kind ) static

◆ checkOpcode() [2/2]

Error llvm::jitlink::aarch32::checkOpcode ( LinkGraph & G, const ThumbRelocation & R, Edge::Kind Kind ) static

◆ checkRegister() [1/2]

template<EdgeKind_aarch32 Kind>

◆ checkRegister() [2/2]

template<EdgeKind_aarch32 Kind>

◆ createStubArmv7()

◆ createStubPrev7()

◆ createStubThumbv7()

◆ decodeImmBA1BlA1BlxA2()

LLVM_ABI int64_t llvm::jitlink::aarch32::decodeImmBA1BlA1BlxA2 ( int64_t Value )

◆ decodeImmBT4BlT1BlxT2()

int64_t llvm::jitlink::aarch32::decodeImmBT4BlT1BlxT2 ( uint32_t Hi,
uint32_t Lo )

Decode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2).

[ 00000:Imm11H, 00000:Imm11L ] -> 00000:Imm11H:Imm11L:0 J1^ ^J2 will always be 1

Definition at line 53 of file aarch32.cpp.

References llvm::Hi, llvm::Lo, and llvm::SignExtend64().

Referenced by readAddendThumb().

◆ decodeImmBT4BlT1BlxT2_J1J2()

◆ decodeImmMovtA1MovwA2()

Decode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2.

000000000000:Imm4:0000:Imm12 -> Imm4:Imm12

Definition at line 167 of file aarch32.cpp.

References LLVM_ABI.

Referenced by readAddendArm().

◆ decodeImmMovtT1MovwT3()

◆ decodeRegMovtA1MovwA2()

LLVM_ABI int64_t llvm::jitlink::aarch32::decodeRegMovtA1MovwA2 ( uint64_t Value )

Decode register ID for instruction formats MOVT A1 and MOVW A2.

0000000000000000:Rd4:000000000000 -> Rd4

Definition at line 188 of file aarch32.cpp.

References LLVM_ABI.

◆ decodeRegMovtT1MovwT3()

◆ encodeImmBA1BlA1BlxA2()

LLVM_ABI uint32_t llvm::jitlink::aarch32::encodeImmBA1BlA1BlxA2 ( int64_t Value )

Encode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2).

Imm24:00 -> 00000000:Imm24

Definition at line 92 of file aarch32.cpp.

References LLVM_ABI.

Referenced by applyFixupArm().

◆ encodeImmBT4BlT1BlxT2()

HalfWords llvm::jitlink::aarch32::encodeImmBT4BlT1BlxT2 ( int64_t Value )

Encode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2).

00000:Imm11H:Imm11L:0 -> [ 00000:Imm11H, 00000:Imm11L ] J1^ ^J2 will always be 1

Definition at line 40 of file aarch32.cpp.

Referenced by applyFixupThumb().

◆ encodeImmBT4BlT1BlxT2_J1J2()

LLVM_ABI HalfWords llvm::jitlink::aarch32::encodeImmBT4BlT1BlxT2_J1J2 ( int64_t Value )

Encode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2).

S:I1:I2:Imm10:Imm11:0 -> [ 00000:S:Imm10, 00:J1:0:J2:Imm11 ]

Definition at line 64 of file aarch32.cpp.

References LLVM_ABI.

Referenced by applyFixupThumb().

◆ encodeImmMovtA1MovwA2()

Encode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2.

Imm4:Imm12 -> 000000000000:Imm4:0000:Imm12

Definition at line 156 of file aarch32.cpp.

References LLVM_ABI.

Referenced by applyFixupArm().

◆ encodeImmMovtT1MovwT3()

Encode 16-bit immediate value for move instruction formats MOVT T1 and MOVW T3.

Imm4:Imm1:Imm3:Imm8 -> [ 00000:i:000000:Imm4, 0:Imm3:0000:Imm8 ]

Definition at line 110 of file aarch32.cpp.

References LLVM_ABI.

Referenced by applyFixupThumb().

◆ encodeRegMovtA1MovwA2()

LLVM_ABI uint32_t llvm::jitlink::aarch32::encodeRegMovtA1MovwA2 ( int64_t Value )

◆ encodeRegMovtT1MovwT3()

◆ getArmConfigForCPUArch()

◆ getCPUArchName()

◆ getEdgeKindName()

const char * llvm::jitlink::aarch32::getEdgeKindName ( Edge::Kind K )

Get a human-readable name for the given AArch32 edge kind.

Definition at line 930 of file aarch32.cpp.

References Arm_Call, Arm_Jump24, Arm_MovtAbs, Arm_MovwAbsNC, Data_Delta32, Data_Pointer32, Data_PRel31, Data_RequestGOTAndTransformToDelta32, llvm::jitlink::getGenericEdgeKindName(), KIND_NAME_CASE, None, Thumb_Call, Thumb_Jump24, Thumb_MovtAbs, Thumb_MovtPrel, Thumb_MovwAbsNC, and Thumb_MovwPrelNC.

Referenced by llvm::jitlink::getELFAArch32EdgeKindName().

◆ hasTargetFlags()

◆ needsStub()

◆ readAddend()

Read the initial addend for a REL-type relocation.

It's the value encoded in the immediate field of the fixup location by the compiler.

Definition at line 289 of file aarch32.h.

References assert(), B(), G, LastArmRelocation, LastDataRelocation, LastThumbRelocation, None, llvm::Offset, readAddendArm(), readAddendData(), and readAddendThumb().

◆ readAddendArm()

Expected< int64_t > llvm::jitlink::aarch32::readAddendArm ( LinkGraph & G,
Block & B,
Edge::OffsetT Offset,
Edge::Kind Kind )

Helper function to read the initial addend for Arm-class relocations.

Definition at line 409 of file aarch32.cpp.

References Arm_Call, Arm_Jump24, Arm_MovtAbs, Arm_MovwAbsNC, B(), checkOpcode(), decodeImmBA1BlA1BlxA2(), decodeImmMovtA1MovwA2(), G, llvm::make_error(), and llvm::Offset.

Referenced by readAddend().

◆ readAddendData()

Expected< int64_t > llvm::jitlink::aarch32::readAddendData ( LinkGraph & G,
Block & B,
Edge::OffsetT Offset,
Edge::Kind Kind )

◆ readAddendThumb()

Helper function to read the initial addend for Thumb-class relocations.

Definition at line 432 of file aarch32.cpp.

References B(), checkOpcode(), decodeImmBT4BlT1BlxT2(), decodeImmBT4BlT1BlxT2_J1J2(), decodeImmMovtT1MovwT3(), G, llvm::jitlink::aarch32::ArmConfig::J1J2BranchEncoding, LLVM_LIKELY, llvm::make_error(), llvm::Offset, llvm::SignExtend64(), Thumb_Call, Thumb_Jump24, Thumb_MovtAbs, Thumb_MovtPrel, Thumb_MovwAbsNC, and Thumb_MovwPrelNC.

Referenced by readAddend().

◆ writeImmediate() [1/2]

template<EdgeKind_aarch32 Kind>

void llvm::jitlink::aarch32::writeImmediate ( WritableArmRelocation & R,
uint32_t Imm )

◆ writeImmediate() [2/2]

template<EdgeKind_aarch32 Kind>

void llvm::jitlink::aarch32::writeImmediate ( WritableThumbRelocation & R,
HalfWords Imm )

◆ writeRegister() [1/2]

template<EdgeKind_aarch32 Kind>

void llvm::jitlink::aarch32::writeRegister ( WritableArmRelocation & R,
uint32_t Reg )

◆ writeRegister() [2/2]

template<EdgeKind_aarch32 Kind>

void llvm::jitlink::aarch32::writeRegister ( WritableThumbRelocation & R,
HalfWords Reg )

◆ ArmThumbv5LdrPc

Initial value:

= {

0x78, 0x47,

0xfd, 0xe7,

0x04, 0xf0, 0x1f, 0xe5,

0x00, 0x00, 0x00, 0x00,

}

Definition at line 740 of file aarch32.cpp.

Referenced by createStubPrev7().

◆ Armv7ABS

Initial value:

= {

0x00, 0xc0, 0x00, 0xe3,

0x00, 0xc0, 0x40, 0xe3,

0x1c, 0xff, 0x2f, 0xe1

}

Definition at line 747 of file aarch32.cpp.

Referenced by createStubArmv7().

◆ GOTEntryInit

◆ Thumbv7ABS