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Papers by Francesco Conzatti

Research paper thumbnail of Semi-classical transport modelling of CMOS transistors with arbitrary crystal orientations and strain engineering

Journal of Computational Electronics, 2009

This paper reviews the basic methodologies and models used in the semi-classical modelling of CMO... more This paper reviews the basic methodologies and models used in the semi-classical modelling of CMOS transistors in the framework of the nowadays generalized scaling scenario. The capabilities to describe devices with arbitrary crystal orientations and strain configurations are discussed. Several simulation results are illustrated and compared to the experiments to assess the understanding of the underlying physics and the predictive

Research paper thumbnail of Simulation study of the on-current improvements in Ge and sGe versus Si and sSi nano-MOSFETs

2010 International Electron Devices Meeting, 2010

... Conclusions Monte Carlo simulations extensively verified with experiments show that Ge MOSFET... more ... Conclusions Monte Carlo simulations extensively verified with experiments show that Ge MOSFETs are competitive with but do not out-perform sSi devices in terms of on-current. ... References [1] T. Low et al. in IEDM Tech. Dig., p. 691, 2003 [2] A. Rahman et al. in IEDM Tech. ...

Research paper thumbnail of Investigation of localized versus uniform strain as a performance booster in InAs Tunnel-FETs

Solid-State Electronics, 2013

ABSTRACT This paper investigates the effect of spatially localized versus uniform strain on the p... more ABSTRACT This paper investigates the effect of spatially localized versus uniform strain on the performance of n-type InAs nanowire Tunnel FETs. To this purpose we make use of a simulator based on the NEGF formalism and employing an eight-band k·p Hamiltonian, describing the strain implicitly as a modification of the band-structure. Our results indicate that, when the uniform strain degrades the subthreshold slope because of an increased band-to-band-tunneling at the drain, a localized strain at the source side can achieve a better tradeoff between on-current and subthreshold slope than a uniform strain configuration.

Research paper thumbnail of A simulation study of strain induced performance enhancements in InAs nanowire Tunnel-FETs

2011 International Electron Devices Meeting, 2011

This work investigates the strain engineering in InAs nanowire Tunnel-FETs. To this purpose we de... more This work investigates the strain engineering in InAs nanowire Tunnel-FETs. To this purpose we developed a simulator based on the NEGF formalism and employing an 8×8 k·p Hamiltonian. The model accounts for arbitrary crystal orientations and describes the strain implicitly by a modification of the bandstructure. Elastic and inelastic phonon scattering is also accounted for in the self-consistent Born approximation.

Research paper thumbnail of On the Surface-Roughness Scattering in Biaxially Strained n- and p-MOS Transistors

IEEE Transactions on Electron Devices, 2000

Electron- and hole-mobility enhancements in biax- ially strained metal-oxide-semiconductor transi... more Electron- and hole-mobility enhancements in biax- ially strained metal-oxide-semiconductor transistors are still a matter for active investigation, and this brief presents a critical examination of a recently proposed interpretation of the experi- mental data, according to which the strain significantly modifies not only the root-mean-square value but also the correlation length of the surface-roughness spectrum. We present a systematic comparison

Research paper thumbnail of Investigation of Strain Engineering in FinFETs Comprising Experimental Analysis and Numerical Simulations

IEEE Transactions on Electron Devices, 2000

... CONZATTI et al.: FinFETs COMPRISING ANALYSIS AND SIMULATIONS ... Then, for electrons, we calc... more ... CONZATTI et al.: FinFETs COMPRISING ANALYSIS AND SIMULATIONS ... Then, for electrons, we calculated for each strain configuration εc the Δ4 and the Δ2 valley splitting and the modifications of the effective masses by using the ana-lytical expressions reported in [40], which ...

Research paper thumbnail of Surface-Roughness-Induced Variability in Nanowire InAs Tunnel FETs

IEEE Electron Device Letters, 2000

We present a comparative study of the surface-roughness (SR)-induced variability at low supply vo... more We present a comparative study of the surface-roughness (SR)-induced variability at low supply voltage VDD=hbox0.3hboxVV_{DD} = \hbox{0.3}\ \hbox{V}VDD=hbox0.3hboxV in nanowire InAs tunnel FETs and strained-silicon (sSi) MOSFETs. By exploiting a 3-D full-quantum approach based on the Non-Equilibrium Green's Function formalism, we show that the IrmonI_{\rm on}Irmon variability in InAs tunnel FETs is much smaller than the IrmoffI_{\rm off}Irmoff variability, whereas

Research paper thumbnail of Semi-classical transport modelling of CMOS transistors with arbitrary crystal orientations and strain engineering

Journal of Computational Electronics, 2009

This paper reviews the basic methodologies and models used in the semi-classical modelling of CMO... more This paper reviews the basic methodologies and models used in the semi-classical modelling of CMOS transistors in the framework of the nowadays generalized scaling scenario. The capabilities to describe devices with arbitrary crystal orientations and strain configurations are discussed. Several simulation results are illustrated and compared to the experiments to assess the understanding of the underlying physics and the predictive

Research paper thumbnail of Simulation study of the on-current improvements in Ge and sGe versus Si and sSi nano-MOSFETs

2010 International Electron Devices Meeting, 2010

... Conclusions Monte Carlo simulations extensively verified with experiments show that Ge MOSFET... more ... Conclusions Monte Carlo simulations extensively verified with experiments show that Ge MOSFETs are competitive with but do not out-perform sSi devices in terms of on-current. ... References [1] T. Low et al. in IEDM Tech. Dig., p. 691, 2003 [2] A. Rahman et al. in IEDM Tech. ...

Research paper thumbnail of Investigation of localized versus uniform strain as a performance booster in InAs Tunnel-FETs

Solid-State Electronics, 2013

ABSTRACT This paper investigates the effect of spatially localized versus uniform strain on the p... more ABSTRACT This paper investigates the effect of spatially localized versus uniform strain on the performance of n-type InAs nanowire Tunnel FETs. To this purpose we make use of a simulator based on the NEGF formalism and employing an eight-band k·p Hamiltonian, describing the strain implicitly as a modification of the band-structure. Our results indicate that, when the uniform strain degrades the subthreshold slope because of an increased band-to-band-tunneling at the drain, a localized strain at the source side can achieve a better tradeoff between on-current and subthreshold slope than a uniform strain configuration.

Research paper thumbnail of A simulation study of strain induced performance enhancements in InAs nanowire Tunnel-FETs

2011 International Electron Devices Meeting, 2011

This work investigates the strain engineering in InAs nanowire Tunnel-FETs. To this purpose we de... more This work investigates the strain engineering in InAs nanowire Tunnel-FETs. To this purpose we developed a simulator based on the NEGF formalism and employing an 8×8 k·p Hamiltonian. The model accounts for arbitrary crystal orientations and describes the strain implicitly by a modification of the bandstructure. Elastic and inelastic phonon scattering is also accounted for in the self-consistent Born approximation.

Research paper thumbnail of On the Surface-Roughness Scattering in Biaxially Strained n- and p-MOS Transistors

IEEE Transactions on Electron Devices, 2000

Electron- and hole-mobility enhancements in biax- ially strained metal-oxide-semiconductor transi... more Electron- and hole-mobility enhancements in biax- ially strained metal-oxide-semiconductor transistors are still a matter for active investigation, and this brief presents a critical examination of a recently proposed interpretation of the experi- mental data, according to which the strain significantly modifies not only the root-mean-square value but also the correlation length of the surface-roughness spectrum. We present a systematic comparison

Research paper thumbnail of Investigation of Strain Engineering in FinFETs Comprising Experimental Analysis and Numerical Simulations

IEEE Transactions on Electron Devices, 2000

... CONZATTI et al.: FinFETs COMPRISING ANALYSIS AND SIMULATIONS ... Then, for electrons, we calc... more ... CONZATTI et al.: FinFETs COMPRISING ANALYSIS AND SIMULATIONS ... Then, for electrons, we calculated for each strain configuration εc the Δ4 and the Δ2 valley splitting and the modifications of the effective masses by using the ana-lytical expressions reported in [40], which ...

Research paper thumbnail of Surface-Roughness-Induced Variability in Nanowire InAs Tunnel FETs

IEEE Electron Device Letters, 2000

We present a comparative study of the surface-roughness (SR)-induced variability at low supply vo... more We present a comparative study of the surface-roughness (SR)-induced variability at low supply voltage VDD=hbox0.3hboxVV_{DD} = \hbox{0.3}\ \hbox{V}VDD=hbox0.3hboxV in nanowire InAs tunnel FETs and strained-silicon (sSi) MOSFETs. By exploiting a 3-D full-quantum approach based on the Non-Equilibrium Green's Function formalism, we show that the IrmonI_{\rm on}Irmon variability in InAs tunnel FETs is much smaller than the IrmoffI_{\rm off}Irmoff variability, whereas