Harri Lensen - Academia.edu (original) (raw)

Papers by Harri Lensen

Research paper thumbnail of Digital Design at Microarchtectural Level Based on Quality Relationship Measures

Мотивацией данной работы является разработка методов и средств автоматизации синтеза, основанных ... more Мотивацией данной работы является разработка методов и средств автоматизации синтеза, основанных на иерархическом представлении проектируеммых цифровых устройств, а также развитие теории декомпозиции в соответствии с качественными критериями вносимыми современными требованиями к реализации. При этом на первый план выдвигается решение проблемы оптимизации (ограничения) потребляемой мощности на различных уровнях и этапах проектирования. Предлагается новый декомпозиционный метод синтеза цифровых устройств учитывающий статистические характеристики проектируемой системы на уровне регистровых передач с целью выделения вычислительного ядра. При этом решение сводится к декомпозиции контроллера дискретного преобразователя как исходной модели проектируемого цифрового устройства. ITRODUCTION The complexity and quality of the digital systems tend to be more limited by the design methods and tools than by the microelectronic technology. Substantial improvement of today's design can be achie...

Research paper thumbnail of Synthesis of Sequential Circuits with Dynamic Power Management

With increasing sizes of designs and the need for low power applications, power is another optimi... more With increasing sizes of designs and the need for low power applications, power is another optimization constraint that has become critical in addition to timing and area for electronic circuits. The work presented in this paper exploits a fundamental and important source of power reduction – shutting down useless parts of a sequential circuit. This idea is known as power management. In our approach, the problem of low power synthesis corresponds to an optimal decomposition of a finite state machine that is a mathematical model of a sequential circuit. The proposed techniques leads to a general low power synthesis methodology based on functional partitioning of digital systems.

Research paper thumbnail of Diagnostic Modelling of Digital Systems with Multilevel Decision Diagrams

To cope with the complexity of today's digital systems in diagnostic modelling, hierarchical ... more To cope with the complexity of today's digital systems in diagnostic modelling, hierarchical approaches should be used. In this paper, the possibilities of using Decision Diagrams (DD) for diagnostic modelling of digital systems are discussed. DDs can be used for modelling systems at different levels of representation like logic level, register transfer level, instruction set level. The nodes in DDs

Research paper thumbnail of Microprogram Automation: Design for Testability

In this work we present a Checking Sequence design method for Finite State Machines (FSM). Microp... more In this work we present a Checking Sequence design method for Finite State Machines (FSM). Microprogram Automation (MPA) model is used to describe source FSM. Testability of MPA is improved by introducing additional binary inputs or outputs. This modification enhances indirect observability of MPA States and allows to compose universal Checking Sequences for such redundant Automations using an algorithm described in this paper. Generated checking sequence is independent of MPA hardware implementation. The introduced method is applied on several MCNC Benchmark Automation examples and a short overview of experimental results is listed.

Research paper thumbnail of FSM Decomposition Using Shift Registers

In this work we present a method of Finite State Machine (FSM) decomposition where shift register... more In this work we present a method of Finite State Machine (FSM) decomposition where shift registers are used as memory of FSM network components. Every component of the network is realized on a separate shift register. This approach improves the testability of the FSM network. State splitting method is described for the minimization of the number of used shift registers. Described algorithms are illustrated by examples. As conclusion, the overview of the experimental results is presented.

Research paper thumbnail of Checking Sequence Design for FSM

In this paper we present a new checking sequence design method for finite state machines (FSMs). ... more In this paper we present a new checking sequence design method for finite state machines (FSMs). Microprogram automaton model is used to describe source FSM. The proposed method enables to compose a universal checking sequence which will be independent of FSM implementation. The fault classification for microprogram automaton (MPA) model is introduced. It is shown that composed sequence checks all the observed faults. A design for testability method is proposed to guarantee the existence of a short distinguishing sequence for MPA and reduce the length of checking sequence. The introduced methods are illustrated by examples. Experimental results on MCNC FSM benchmark examples show that the most of real complexity digital control units have a short distinguishing sequence and checking sequences composed by our method are considerably shorter than the upper bound shows.

Research paper thumbnail of Digital Design at Microarchtectural Level Based on Quality Relationship Measures

Research paper thumbnail of Web-Based Tools for Decomposition-Oriented Digital Design

Research paper thumbnail of Synthesis of Sequential Circuits with Dynamic Power management

Research paper thumbnail of Fault Diagnosis in Integrated Circuits with BIST

10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007), 2007

Research paper thumbnail of Diagnostic Modelling of Digital Systems with Binary and High-Level Decision Diagrams

Mathematics in Industry, 2008

ABSTRACT A novel hierarchical approach based on decision diagrams (DD) to modelling digital syste... more ABSTRACT A novel hierarchical approach based on decision diagrams (DD) to modelling digital systems is introduced. Two new contributions are proposed: a new classof structurally synthesized binary DDs for modelling structural aspects of digital circuits, and DDs for high-level modelling of systems. Combination of both types of graphs allows to implement uniform formal approach to low- and high-level diagnostic modelling with increased efficiency of fault simulation and test generation for digital systems.

Research paper thumbnail of Diagnostic modelling of digital systems with multi-level decision diagrams

Research paper thumbnail of Fault Diagnosis in Integrated Circuits with BIST

10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007), 2007

Research paper thumbnail of Digital Design at Microarchtectural Level Based on Quality Relationship Measures

Мотивацией данной работы является разработка методов и средств автоматизации синтеза, основанных ... more Мотивацией данной работы является разработка методов и средств автоматизации синтеза, основанных на иерархическом представлении проектируеммых цифровых устройств, а также развитие теории декомпозиции в соответствии с качественными критериями вносимыми современными требованиями к реализации. При этом на первый план выдвигается решение проблемы оптимизации (ограничения) потребляемой мощности на различных уровнях и этапах проектирования. Предлагается новый декомпозиционный метод синтеза цифровых устройств учитывающий статистические характеристики проектируемой системы на уровне регистровых передач с целью выделения вычислительного ядра. При этом решение сводится к декомпозиции контроллера дискретного преобразователя как исходной модели проектируемого цифрового устройства. ITRODUCTION The complexity and quality of the digital systems tend to be more limited by the design methods and tools than by the microelectronic technology. Substantial improvement of today's design can be achie...

Research paper thumbnail of Synthesis of Sequential Circuits with Dynamic Power Management

With increasing sizes of designs and the need for low power applications, power is another optimi... more With increasing sizes of designs and the need for low power applications, power is another optimization constraint that has become critical in addition to timing and area for electronic circuits. The work presented in this paper exploits a fundamental and important source of power reduction – shutting down useless parts of a sequential circuit. This idea is known as power management. In our approach, the problem of low power synthesis corresponds to an optimal decomposition of a finite state machine that is a mathematical model of a sequential circuit. The proposed techniques leads to a general low power synthesis methodology based on functional partitioning of digital systems.

Research paper thumbnail of Diagnostic Modelling of Digital Systems with Multilevel Decision Diagrams

To cope with the complexity of today's digital systems in diagnostic modelling, hierarchical ... more To cope with the complexity of today's digital systems in diagnostic modelling, hierarchical approaches should be used. In this paper, the possibilities of using Decision Diagrams (DD) for diagnostic modelling of digital systems are discussed. DDs can be used for modelling systems at different levels of representation like logic level, register transfer level, instruction set level. The nodes in DDs

Research paper thumbnail of Microprogram Automation: Design for Testability

In this work we present a Checking Sequence design method for Finite State Machines (FSM). Microp... more In this work we present a Checking Sequence design method for Finite State Machines (FSM). Microprogram Automation (MPA) model is used to describe source FSM. Testability of MPA is improved by introducing additional binary inputs or outputs. This modification enhances indirect observability of MPA States and allows to compose universal Checking Sequences for such redundant Automations using an algorithm described in this paper. Generated checking sequence is independent of MPA hardware implementation. The introduced method is applied on several MCNC Benchmark Automation examples and a short overview of experimental results is listed.

Research paper thumbnail of FSM Decomposition Using Shift Registers

In this work we present a method of Finite State Machine (FSM) decomposition where shift register... more In this work we present a method of Finite State Machine (FSM) decomposition where shift registers are used as memory of FSM network components. Every component of the network is realized on a separate shift register. This approach improves the testability of the FSM network. State splitting method is described for the minimization of the number of used shift registers. Described algorithms are illustrated by examples. As conclusion, the overview of the experimental results is presented.

Research paper thumbnail of Checking Sequence Design for FSM

In this paper we present a new checking sequence design method for finite state machines (FSMs). ... more In this paper we present a new checking sequence design method for finite state machines (FSMs). Microprogram automaton model is used to describe source FSM. The proposed method enables to compose a universal checking sequence which will be independent of FSM implementation. The fault classification for microprogram automaton (MPA) model is introduced. It is shown that composed sequence checks all the observed faults. A design for testability method is proposed to guarantee the existence of a short distinguishing sequence for MPA and reduce the length of checking sequence. The introduced methods are illustrated by examples. Experimental results on MCNC FSM benchmark examples show that the most of real complexity digital control units have a short distinguishing sequence and checking sequences composed by our method are considerably shorter than the upper bound shows.

Research paper thumbnail of Digital Design at Microarchtectural Level Based on Quality Relationship Measures

Research paper thumbnail of Web-Based Tools for Decomposition-Oriented Digital Design

Research paper thumbnail of Synthesis of Sequential Circuits with Dynamic Power management

Research paper thumbnail of Fault Diagnosis in Integrated Circuits with BIST

10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007), 2007

Research paper thumbnail of Diagnostic Modelling of Digital Systems with Binary and High-Level Decision Diagrams

Mathematics in Industry, 2008

ABSTRACT A novel hierarchical approach based on decision diagrams (DD) to modelling digital syste... more ABSTRACT A novel hierarchical approach based on decision diagrams (DD) to modelling digital systems is introduced. Two new contributions are proposed: a new classof structurally synthesized binary DDs for modelling structural aspects of digital circuits, and DDs for high-level modelling of systems. Combination of both types of graphs allows to implement uniform formal approach to low- and high-level diagnostic modelling with increased efficiency of fault simulation and test generation for digital systems.

Research paper thumbnail of Diagnostic modelling of digital systems with multi-level decision diagrams

Research paper thumbnail of Fault Diagnosis in Integrated Circuits with BIST

10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007), 2007