V. Terzieva - Academia.edu (original) (raw)
Papers by V. Terzieva
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures
The inverse relationship between film thickness and electrical resistivity of metallic films is u... more The inverse relationship between film thickness and electrical resistivity of metallic films is usually studied by depositing a series of films with different thickness and measuring their sheet resistance with a four-point probe. However, the structure and uniformity of polycrystalline thin films ...
This paper discusses chemical and galvanic corrosion of tungsten nitride carbide (WNC) barrier me... more This paper discusses chemical and galvanic corrosion of tungsten nitride carbide (WNC) barrier metal. Chemical corrosion occurs due to the oxidation of W in the WNC film by H 2 O 2 , which is used as oxidizer in CMP slurries, followed by the dissolution of the oxide complex. Galvanic corrosion takes place due to the high potential difference between Cu and WNC established in the presence of H 2 O 2 based slurries during the CMP process. Use of HNO 3 as the oxidizing agent instead of H 2 O 2 reduces chemical and galvanic corrosion of WNC. In order to protect Cu against corrosion in such model slurries organic acids are used as additives. Malic acid containing HNO 3 based corrosion inhibiting model slurry is further tested on an experimental CMP tool for wafer level tests that showed promising Cu and WNC compatibility.
A key challenge in the engineering of Ge MOSFETs is to develop a proper Ge surface passivation te... more A key challenge in the engineering of Ge MOSFETs is to develop a proper Ge surface passivation technique prior to high-k dielectric deposition to obtain low interface state density and high carrier mobility. A review on some possible treatments to passivate the Ge surface is discussed. Another important aspect is the activation of p-and n-type dopants to form the active areas in devices. Finally, Ge deep submicron n-and p-FET devices fabricated with this technique on germanium-on-insulator substrates, yield promising device characteristics, showing the feasibility of these substrates.
Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729), 2004
Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729), 2004
Electromigration in copper damascene interconnects is usually associated with interfacial diffusi... more Electromigration in copper damascene interconnects is usually associated with interfacial diffusion at the copper/ dielectric barrier interface. In this study, we demonstrate how impurity and microstructural properties of the bulk copper can influence failures at the copper/dielectric barrier interface. Impurity concentrations in the bulk copper were modulated by varying electroplating conditions and the resulting effects on the copper microstructure and
ECS Transactions, 2007
Germanium possesses higher bulk mobilities than silicon and was used for the first transistors. H... more Germanium possesses higher bulk mobilities than silicon and was used for the first transistors. However, by the 1960s its use was largely supplanted with Si due largely to Si's high quality thermal oxide. Today, with the 45 nm technology node in production, high k dielectrics are beginning to replace SiO2 in the gate, and as such, one of the key reasons for using Si is no longer as relevant. This, combined with performance concerns for Si based devices for and beyond the 22 nm node has made Ge a worthy area for research for high performance devices. In this paper, we give an overview of some of the major issues for Ge MOSFETs, illustrating recent progress using data from IMEC. Key results include a factor of 10 reduction in threading dislocations for epi Ge on Si by the use of an ~850{degree sign}C anneal, the first successful use of As halo implants, progress on optimization of activation anneals, the use of a thin epitaxial Si passivation and its impact on threshold voltage, a...
MRS Proceedings, 2004
We present the influence of the electrochemical plating recipe and the bath chemistry on Cu grain... more We present the influence of the electrochemical plating recipe and the bath chemistry on Cu grain size evolution and its link to corrosion of Cu interconnects. Our results demonstrate the fact that Cu corrosion depends on the combination of (i) solution type and (ii) Cu quality. The latter is influenced by geometrical factors such as line width and pattern density as well as the electroplating parameters such as plating recipe and bath chemistry. Organic and inorganic acid based model-CMP solutions are used to make a comparison in terms of the interactions with the Cu surface. It is shown that an organic acid based solution etches Cu independent of the Cu quality. However, etching by an inorganic acid based solution reveals line width (0.2 μm <w<1.0 μm) and pattern density dependence…
Fresenius' Journal of Analytical Chemistry, 1998
ABSTRACT A fast, sensitive and reliable method for the indirect atomic absorption determination o... more ABSTRACT A fast, sensitive and reliable method for the indirect atomic absorption determination of SiO2 in copper composite coatings after extraction of silicomolybdic acid in a mixture of isobutyl methyl ketone and butanol (volume ratio 5 : 1) and measurement of the molybdenum absorbance in an air/acetylene flame is described. The experimental conditions are optimized for (i) prevention of the silicon polymerization during sample preparation and storage; (ii) for overcoming of the Cu(SiF6) – complex formation and (iii) for quantitative extraction of the yellow complex into the organic phase for a wide silicon concentration range. The method permits the determination of 0.5–10 mg/g Si in copper. The analytical performance of the proposed method is compared with direct Si determination using ICP-AES.
ECS Transactions, 2006
Ultra-thin SiGe films on insulator with high Ge fraction were fabricated through Ge condensation.... more Ultra-thin SiGe films on insulator with high Ge fraction were fabricated through Ge condensation. To achieve that strained SiGe layers were grown epitaxiallyon SOI wafers and oxidized in O at 1150ºC for various times. Raman measurements and X-TEM ...
ECS Transactions, 2008
Thin SGOI substrates with Ge content from 42 to 93% have been produced by the Ge condensation tec... more Thin SGOI substrates with Ge content from 42 to 93% have been produced by the Ge condensation technique and full structural characterization has been carried out. In a second step, the electrical properties of these substrates have been analyzed by the pseudo-MOSFETs technique which allowed the determination of the carrier low field mobilities as well as the density of fixed charges in the buried oxide (BOX) and the density of interface traps at the BOX-SiGe film interface. Optimization of intermediate anneals in argon during the condensation process has made the production of high crystalline quality and high mobility substrates possible (up to 400 cm2/Vs for a 93% SGOI). Opposite trends were observed for holes and electrons: while the hole mobility is increasing with increasing Ge content, the electron mobility decreases. Moreover, the density of interface traps and the density of oxide charges were found to increase with increasing Ge content.
Solid State Phenomena, 2008
A defect selective wet chemical etching technique that allows accurate determination of etch pit ... more A defect selective wet chemical etching technique that allows accurate determination of etch pit density (EPD) in thin Germanium (Ge) layers is described. The effect is achieved by using chromium (Cr VI ) based solution. Such a solution, in combination with other chemicals, exhibits mild oxidation power which provides low etch rates (ER) and excellent selectivity towards threading dislocations. The etching technique is able to delineate threading dislocations in layers with thickness in the range of 80 – 1500 nm within the resolution of scanning electron microscopy (SEM). Different types of Ge layers were analyzed (doping levels, defect density, degree of relaxation). The ER is shown to depend on several characteristics of the layer and is in the range of 7 to 100 nm/min.
Thin Solid Films, 2008
In the first part of this work we studied the effect of annealing time and temperature on the deg... more In the first part of this work we studied the effect of annealing time and temperature on the degree of threading dislocations density (TDD) reduction in epitaxial Ge films grown by CVD on Si. We show, that onestep controlled nitrogen annealing at temperatures above 800°C can decrease TDD of thick (1.6 µm) Ge layers with 1 order of magnitude from 1E+ 08/cm 2 down to 1E+ 07/cm 2. Our results indicate that when temperature is high enough (N 800°C) time does not play a role anymore. Thus for a temperature of 850°C the same degree of TDD reduction can be achieved for 3 as well for 30 min. In the second part of the work we demonstrate that the combination of cycled epi growth and high temperature annealing although beneficial for TDD reduction deteriorates the crystalline quality of the layers due to significant Si out-diffusion and SiGe formation. Ge on Si substrates with lower defect densities have been further characterized by leakage current measurements on diode structures. Our results indicate that the reduction of drain to bulk leakage is insignificant and does not correspond to 1 order of magnitude reduction in TDD. We therefore conclude that threading dislocations are not the dominant factor for reduced device performance.
Thin Solid Films, 2008
In the first part of this work, the fabrication of silicon germanium-on-insulator substrates (SGO... more In the first part of this work, the fabrication of silicon germanium-on-insulator substrates (SGOI) by the Ge condensation technique was studied. Ge atomic fractions as high as 93% have been obtained while maintaining nice structural properties of the films. We show that these layers exhibit a large compressive strain and that the strain can be lowered by introducing some annealing steps in argon ambient during the condensation. SGOI substrates with a Ge atomic fraction of 75% were subsequently used as template for the growth of strained epitaxial Ge layers. Because of the important strain in the SGOI, the temperature for the in-situ bake prior to the growth has to be carefully selected in order to avoid relaxation. Ge layers with compressive strain up to −1% and thicknesses up to 40 nm have been obtained. The crystal quality, roughness and thermal stability of the strained Ge layers were finally evaluated.
Microelectronic Engineering, 2003
Some of the spin-on interlayer dielectrics (ILD) with dielectric constant k below 2.3, targeted f... more Some of the spin-on interlayer dielectrics (ILD) with dielectric constant k below 2.3, targeted for the 65 nm node and below, are available with their spin-on hard masks (SoHM) to reduce the total effective capacitance and to provide high selectivity to their respective ILDs during integration. In this work, FF-02, JSR's SoHM is characterised. Its thermal stability, chemical compatibility to stripping solutions and resistance to moisture are investigated. Methods to seal the surface of FF-02 to chemicals are explored. Electrical properties including the dielectric constant, leakage current and breakdown fields are evaluated in planar capacitors and in single damascene structures.
Journal of The Electrochemical Society, 2000
ABSTRACT The influence of the hydrophobicity of silica particles on the electrodeposition of comp... more ABSTRACT The influence of the hydrophobicity of silica particles on the electrodeposition of composite coatings from acid copper sulfate solutions on rotating disk electrodes was studied. Spherical, nearly monodisperse hydrophilic and hydrophobic silica particles were used. The hydrophilic silica particles were prepared by the Stöber process. These particles were made hydrophobic by a treatment with oligodimethyl siloxane‐α,ω‐diol. The effect of cetyl trimethyl ammonium hydrogen sulfate (CTAHS) and sodium 1-dodecane sulfonate on the codeposition behavior was investigated. Hydrophilic silica did not codeposit from surfactant‐free nor from surfactant‐containing acid copper sulfate solutions, but up to 4 wt % (≅ 14 vol %) of hydrophobic silica codeposited from solutions containing 15 g/L of silica particles and . The codeposition rate of hydrophobic silica slowly decreased with time. The amount of codeposited particles was highest for a current density of and a rotation speed of 400 rpm. © 2000 The Electrochemical Society. All rights reserved.
Journal of The Electrochemical Society, 2005
ABSTRACT We investigated the mechanism of chemical and galvanic corrosion of tungsten nitride car... more ABSTRACT We investigated the mechanism of chemical and galvanic corrosion of tungsten nitride carbide (WNXCY) barrier during Cu chemical mechanical planarization (CMP). Our results demonstrate that chemical corrosion is caused by the oxidation of tungsten (W) in the WNXCY film by H2O2 followed by the dissolution of a tungsten oxide complex, which leads to WNXCY loss. WNXCY loss is enhanced during CMP due to galvanic corrosion driven by the Cu/WNXCY couple. A high loss rate occurs due to the strong potential difference between Cu and WNXCY in H2O2-containing slurries. A model representing WNXCY loss in Cu damascene lines during the CMP process is proposed. It supports WNXCY loss in the top part of the trench sidewall at the interface with Cu. We demonstrate that the use of HNO3 instead of H2O2 as the oxidizer, in the formulation of the corrosion-inhibiting model slurries reduces chemical and galvanic corrosion of WNXCY. Addition of monosaccharides or organic acids prevents excessive Cu loss. Wafer-level tests done with in-house corrosion-inhibiting model slurries show promising Cu and WNXCY compatibility without significant WNXCY loss. (c) 2005 The Electrochemical Society.
Journal of The Electrochemical Society, 2008
ABSTRACT Defect etching is a fast and simple technique for the revelation of defects in single-cr... more ABSTRACT Defect etching is a fast and simple technique for the revelation of defects in single-crystalline materials. We propose here three different chemistries that allow accurate monitoring of the density of threading dislocations in germanium. This work especially focuses on solutions that have low etch rates and high selectivity in order to work on thin layers. Moreover, solutions that do not contain any carcinogenic nor HF acid are proposed in order to reduce the impact on environment and the risks for the user. A comparison of the etch rate and the selectivity toward defects is given as a function of the composition of the etching solutions (components and concentrations). A complete procedure for the proper determination of threading dislocation densities is also presented.
Journal of The Electrochemical Society, 2004
The influences of Cu line width and pattern density are considered as the physical factors affect... more The influences of Cu line width and pattern density are considered as the physical factors affecting corrosion of Cu damascene interconnects. The Cu etch rate data reveals a line width dependency, for both isolated and semidense Cu lines, by showing higher etch rates for ...
Journal of The Electrochemical Society, 2009
ABSTRACT Thin SiGe-on-insulator (SGOI) substrates with Ge content varying between 42 and 93% were... more ABSTRACT Thin SiGe-on-insulator (SGOI) substrates with Ge content varying between 42 and 93% were produced by the Ge condensation technique and full structural characterization was carried out. In a second step, the electrical properties of these substrates were analyzed by the pseudo metal-oxide semiconductor field-effect transistor technique which allowed determination of the carrier low-field mobilities, as well as the density of fixed charges in the buried oxide (BOX) and the density of interface traps at the BOX-SiGe film interface. Optimization of intermediate anneals in argon during the condensation process made the production of high crystalline quality and high-mobility substrates possible (up to 400 cm2 V-1 s-1 for a 93% SGOI). Opposite trends were observed for holes and electrons: while the hole mobility increases with increasing Ge content, the electron mobility decreases. In addition, the density of interface traps and also the density of oxide charges were found to increase with increasing Ge content. Possible causes for this increase are discussed.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures
The inverse relationship between film thickness and electrical resistivity of metallic films is u... more The inverse relationship between film thickness and electrical resistivity of metallic films is usually studied by depositing a series of films with different thickness and measuring their sheet resistance with a four-point probe. However, the structure and uniformity of polycrystalline thin films ...
This paper discusses chemical and galvanic corrosion of tungsten nitride carbide (WNC) barrier me... more This paper discusses chemical and galvanic corrosion of tungsten nitride carbide (WNC) barrier metal. Chemical corrosion occurs due to the oxidation of W in the WNC film by H 2 O 2 , which is used as oxidizer in CMP slurries, followed by the dissolution of the oxide complex. Galvanic corrosion takes place due to the high potential difference between Cu and WNC established in the presence of H 2 O 2 based slurries during the CMP process. Use of HNO 3 as the oxidizing agent instead of H 2 O 2 reduces chemical and galvanic corrosion of WNC. In order to protect Cu against corrosion in such model slurries organic acids are used as additives. Malic acid containing HNO 3 based corrosion inhibiting model slurry is further tested on an experimental CMP tool for wafer level tests that showed promising Cu and WNC compatibility.
A key challenge in the engineering of Ge MOSFETs is to develop a proper Ge surface passivation te... more A key challenge in the engineering of Ge MOSFETs is to develop a proper Ge surface passivation technique prior to high-k dielectric deposition to obtain low interface state density and high carrier mobility. A review on some possible treatments to passivate the Ge surface is discussed. Another important aspect is the activation of p-and n-type dopants to form the active areas in devices. Finally, Ge deep submicron n-and p-FET devices fabricated with this technique on germanium-on-insulator substrates, yield promising device characteristics, showing the feasibility of these substrates.
Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729), 2004
Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729), 2004
Electromigration in copper damascene interconnects is usually associated with interfacial diffusi... more Electromigration in copper damascene interconnects is usually associated with interfacial diffusion at the copper/ dielectric barrier interface. In this study, we demonstrate how impurity and microstructural properties of the bulk copper can influence failures at the copper/dielectric barrier interface. Impurity concentrations in the bulk copper were modulated by varying electroplating conditions and the resulting effects on the copper microstructure and
ECS Transactions, 2007
Germanium possesses higher bulk mobilities than silicon and was used for the first transistors. H... more Germanium possesses higher bulk mobilities than silicon and was used for the first transistors. However, by the 1960s its use was largely supplanted with Si due largely to Si's high quality thermal oxide. Today, with the 45 nm technology node in production, high k dielectrics are beginning to replace SiO2 in the gate, and as such, one of the key reasons for using Si is no longer as relevant. This, combined with performance concerns for Si based devices for and beyond the 22 nm node has made Ge a worthy area for research for high performance devices. In this paper, we give an overview of some of the major issues for Ge MOSFETs, illustrating recent progress using data from IMEC. Key results include a factor of 10 reduction in threading dislocations for epi Ge on Si by the use of an ~850{degree sign}C anneal, the first successful use of As halo implants, progress on optimization of activation anneals, the use of a thin epitaxial Si passivation and its impact on threshold voltage, a...
MRS Proceedings, 2004
We present the influence of the electrochemical plating recipe and the bath chemistry on Cu grain... more We present the influence of the electrochemical plating recipe and the bath chemistry on Cu grain size evolution and its link to corrosion of Cu interconnects. Our results demonstrate the fact that Cu corrosion depends on the combination of (i) solution type and (ii) Cu quality. The latter is influenced by geometrical factors such as line width and pattern density as well as the electroplating parameters such as plating recipe and bath chemistry. Organic and inorganic acid based model-CMP solutions are used to make a comparison in terms of the interactions with the Cu surface. It is shown that an organic acid based solution etches Cu independent of the Cu quality. However, etching by an inorganic acid based solution reveals line width (0.2 μm <w<1.0 μm) and pattern density dependence…
Fresenius' Journal of Analytical Chemistry, 1998
ABSTRACT A fast, sensitive and reliable method for the indirect atomic absorption determination o... more ABSTRACT A fast, sensitive and reliable method for the indirect atomic absorption determination of SiO2 in copper composite coatings after extraction of silicomolybdic acid in a mixture of isobutyl methyl ketone and butanol (volume ratio 5 : 1) and measurement of the molybdenum absorbance in an air/acetylene flame is described. The experimental conditions are optimized for (i) prevention of the silicon polymerization during sample preparation and storage; (ii) for overcoming of the Cu(SiF6) – complex formation and (iii) for quantitative extraction of the yellow complex into the organic phase for a wide silicon concentration range. The method permits the determination of 0.5–10 mg/g Si in copper. The analytical performance of the proposed method is compared with direct Si determination using ICP-AES.
ECS Transactions, 2006
Ultra-thin SiGe films on insulator with high Ge fraction were fabricated through Ge condensation.... more Ultra-thin SiGe films on insulator with high Ge fraction were fabricated through Ge condensation. To achieve that strained SiGe layers were grown epitaxiallyon SOI wafers and oxidized in O at 1150ºC for various times. Raman measurements and X-TEM ...
ECS Transactions, 2008
Thin SGOI substrates with Ge content from 42 to 93% have been produced by the Ge condensation tec... more Thin SGOI substrates with Ge content from 42 to 93% have been produced by the Ge condensation technique and full structural characterization has been carried out. In a second step, the electrical properties of these substrates have been analyzed by the pseudo-MOSFETs technique which allowed the determination of the carrier low field mobilities as well as the density of fixed charges in the buried oxide (BOX) and the density of interface traps at the BOX-SiGe film interface. Optimization of intermediate anneals in argon during the condensation process has made the production of high crystalline quality and high mobility substrates possible (up to 400 cm2/Vs for a 93% SGOI). Opposite trends were observed for holes and electrons: while the hole mobility is increasing with increasing Ge content, the electron mobility decreases. Moreover, the density of interface traps and the density of oxide charges were found to increase with increasing Ge content.
Solid State Phenomena, 2008
A defect selective wet chemical etching technique that allows accurate determination of etch pit ... more A defect selective wet chemical etching technique that allows accurate determination of etch pit density (EPD) in thin Germanium (Ge) layers is described. The effect is achieved by using chromium (Cr VI ) based solution. Such a solution, in combination with other chemicals, exhibits mild oxidation power which provides low etch rates (ER) and excellent selectivity towards threading dislocations. The etching technique is able to delineate threading dislocations in layers with thickness in the range of 80 – 1500 nm within the resolution of scanning electron microscopy (SEM). Different types of Ge layers were analyzed (doping levels, defect density, degree of relaxation). The ER is shown to depend on several characteristics of the layer and is in the range of 7 to 100 nm/min.
Thin Solid Films, 2008
In the first part of this work we studied the effect of annealing time and temperature on the deg... more In the first part of this work we studied the effect of annealing time and temperature on the degree of threading dislocations density (TDD) reduction in epitaxial Ge films grown by CVD on Si. We show, that onestep controlled nitrogen annealing at temperatures above 800°C can decrease TDD of thick (1.6 µm) Ge layers with 1 order of magnitude from 1E+ 08/cm 2 down to 1E+ 07/cm 2. Our results indicate that when temperature is high enough (N 800°C) time does not play a role anymore. Thus for a temperature of 850°C the same degree of TDD reduction can be achieved for 3 as well for 30 min. In the second part of the work we demonstrate that the combination of cycled epi growth and high temperature annealing although beneficial for TDD reduction deteriorates the crystalline quality of the layers due to significant Si out-diffusion and SiGe formation. Ge on Si substrates with lower defect densities have been further characterized by leakage current measurements on diode structures. Our results indicate that the reduction of drain to bulk leakage is insignificant and does not correspond to 1 order of magnitude reduction in TDD. We therefore conclude that threading dislocations are not the dominant factor for reduced device performance.
Thin Solid Films, 2008
In the first part of this work, the fabrication of silicon germanium-on-insulator substrates (SGO... more In the first part of this work, the fabrication of silicon germanium-on-insulator substrates (SGOI) by the Ge condensation technique was studied. Ge atomic fractions as high as 93% have been obtained while maintaining nice structural properties of the films. We show that these layers exhibit a large compressive strain and that the strain can be lowered by introducing some annealing steps in argon ambient during the condensation. SGOI substrates with a Ge atomic fraction of 75% were subsequently used as template for the growth of strained epitaxial Ge layers. Because of the important strain in the SGOI, the temperature for the in-situ bake prior to the growth has to be carefully selected in order to avoid relaxation. Ge layers with compressive strain up to −1% and thicknesses up to 40 nm have been obtained. The crystal quality, roughness and thermal stability of the strained Ge layers were finally evaluated.
Microelectronic Engineering, 2003
Some of the spin-on interlayer dielectrics (ILD) with dielectric constant k below 2.3, targeted f... more Some of the spin-on interlayer dielectrics (ILD) with dielectric constant k below 2.3, targeted for the 65 nm node and below, are available with their spin-on hard masks (SoHM) to reduce the total effective capacitance and to provide high selectivity to their respective ILDs during integration. In this work, FF-02, JSR's SoHM is characterised. Its thermal stability, chemical compatibility to stripping solutions and resistance to moisture are investigated. Methods to seal the surface of FF-02 to chemicals are explored. Electrical properties including the dielectric constant, leakage current and breakdown fields are evaluated in planar capacitors and in single damascene structures.
Journal of The Electrochemical Society, 2000
ABSTRACT The influence of the hydrophobicity of silica particles on the electrodeposition of comp... more ABSTRACT The influence of the hydrophobicity of silica particles on the electrodeposition of composite coatings from acid copper sulfate solutions on rotating disk electrodes was studied. Spherical, nearly monodisperse hydrophilic and hydrophobic silica particles were used. The hydrophilic silica particles were prepared by the Stöber process. These particles were made hydrophobic by a treatment with oligodimethyl siloxane‐α,ω‐diol. The effect of cetyl trimethyl ammonium hydrogen sulfate (CTAHS) and sodium 1-dodecane sulfonate on the codeposition behavior was investigated. Hydrophilic silica did not codeposit from surfactant‐free nor from surfactant‐containing acid copper sulfate solutions, but up to 4 wt % (≅ 14 vol %) of hydrophobic silica codeposited from solutions containing 15 g/L of silica particles and . The codeposition rate of hydrophobic silica slowly decreased with time. The amount of codeposited particles was highest for a current density of and a rotation speed of 400 rpm. © 2000 The Electrochemical Society. All rights reserved.
Journal of The Electrochemical Society, 2005
ABSTRACT We investigated the mechanism of chemical and galvanic corrosion of tungsten nitride car... more ABSTRACT We investigated the mechanism of chemical and galvanic corrosion of tungsten nitride carbide (WNXCY) barrier during Cu chemical mechanical planarization (CMP). Our results demonstrate that chemical corrosion is caused by the oxidation of tungsten (W) in the WNXCY film by H2O2 followed by the dissolution of a tungsten oxide complex, which leads to WNXCY loss. WNXCY loss is enhanced during CMP due to galvanic corrosion driven by the Cu/WNXCY couple. A high loss rate occurs due to the strong potential difference between Cu and WNXCY in H2O2-containing slurries. A model representing WNXCY loss in Cu damascene lines during the CMP process is proposed. It supports WNXCY loss in the top part of the trench sidewall at the interface with Cu. We demonstrate that the use of HNO3 instead of H2O2 as the oxidizer, in the formulation of the corrosion-inhibiting model slurries reduces chemical and galvanic corrosion of WNXCY. Addition of monosaccharides or organic acids prevents excessive Cu loss. Wafer-level tests done with in-house corrosion-inhibiting model slurries show promising Cu and WNXCY compatibility without significant WNXCY loss. (c) 2005 The Electrochemical Society.
Journal of The Electrochemical Society, 2008
ABSTRACT Defect etching is a fast and simple technique for the revelation of defects in single-cr... more ABSTRACT Defect etching is a fast and simple technique for the revelation of defects in single-crystalline materials. We propose here three different chemistries that allow accurate monitoring of the density of threading dislocations in germanium. This work especially focuses on solutions that have low etch rates and high selectivity in order to work on thin layers. Moreover, solutions that do not contain any carcinogenic nor HF acid are proposed in order to reduce the impact on environment and the risks for the user. A comparison of the etch rate and the selectivity toward defects is given as a function of the composition of the etching solutions (components and concentrations). A complete procedure for the proper determination of threading dislocation densities is also presented.
Journal of The Electrochemical Society, 2004
The influences of Cu line width and pattern density are considered as the physical factors affect... more The influences of Cu line width and pattern density are considered as the physical factors affecting corrosion of Cu damascene interconnects. The Cu etch rate data reveals a line width dependency, for both isolated and semidense Cu lines, by showing higher etch rates for ...
Journal of The Electrochemical Society, 2009
ABSTRACT Thin SiGe-on-insulator (SGOI) substrates with Ge content varying between 42 and 93% were... more ABSTRACT Thin SiGe-on-insulator (SGOI) substrates with Ge content varying between 42 and 93% were produced by the Ge condensation technique and full structural characterization was carried out. In a second step, the electrical properties of these substrates were analyzed by the pseudo metal-oxide semiconductor field-effect transistor technique which allowed determination of the carrier low-field mobilities, as well as the density of fixed charges in the buried oxide (BOX) and the density of interface traps at the BOX-SiGe film interface. Optimization of intermediate anneals in argon during the condensation process made the production of high crystalline quality and high-mobility substrates possible (up to 400 cm2 V-1 s-1 for a 93% SGOI). Opposite trends were observed for holes and electrons: while the hole mobility increases with increasing Ge content, the electron mobility decreases. In addition, the density of interface traps and also the density of oxide charges were found to increase with increasing Ge content. Possible causes for this increase are discussed.