Enabling Moore's Law beyond CMOS technologies through heteroepitaxy (original) (raw)
Related papers
Sub10-nm Tunnel Field-Effect Transistor With Graded Si/Ge Heterojunction
IEEE Electron Device Letters, 2011
Line and Point Tunneling in Scaled Si/SiGe Heterostructure TFETs
IEEE Electron Device Letters, 2014
2011
Ultra-Thin SiGe in the Source Modifies Performance of Thin-Film Tunneling FET
arXiv: Mesoscale and Nanoscale Physics, 2020
Dr. Shiromani B A L M U K U N D Rahi
Design of Si 0.5 Ge 0.5 based tunnel field effect transistor and its performance evaluation
IEEE Transactions on Electron Devices, 2014
Solid-State Electronics, 2013
Si-based tunnel field-effect transistors for low-power nano-electronics
69th Device Research Conference, 2011
IEEE Transactions on Electron Devices, 2006
Dr. Shiromani B A L M U K U N D Rahi
RSC Adv., 2015
Si-based interband tunneling devices for high-speed logic and low power memory applications
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)
Drive current boosting of n-type tunnel FET with strained SiGe layer at source
Microelectronics Journal, 2008
A Tunnel FET for VDDV_{DD}VDD Scaling Below 0.6 V With a CMOS-Comparable Performance
IEEE Transactions on Electron Devices, 2011
Lateral interband tunneling transistor in silicon-on-insulator
Applied Physics Letters, 2004
Comparative Study of Silicon and Germanium Doping-less Tunnel Field Effect Transistors
IJSTE - International Journal of Science Technology and Engineering
IEEE Transactions on Electron Devices, 2006
Tunneling field-effect transistor with a strained Si channel and a Si0.5Ge0.5 source
2011
Uniform strain in heterostructure tunnel field-effect transistors
IEEE Electron Device Letters, 2016
Scaling the Vertical Tunnel FET With Tunnel Bandgap Modulation and Gate Workfunction Engineering
IEEE Transactions on Electron Devices, 2005
Heterogate junctionless tunnel field-effect transistor: future of low-power devices
Dr. Shiromani B A L M U K U N D Rahi
Journal of Computational Electronics, 2016