Low Noise Wide Tuning Range Quadrature Ring Oscillator for Multi-Standard Transceiver (original) (raw)
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This paper presents the design of a new four-stage ring oscillator with quadrature outputs using a 0.13µm CMOS 1P8M technology. The oscillator utilizes feed-forward technique and negative resistance to reduce the delay per stage and provides high frequencies. Employing single PMOS transistor to vary the load impedance allows reaching ultra-wide tuning range. The output frequency ranges from 0.8 to 11.3 GHz, which is equivalent to nearly 175% tuning range, while the circuit consumes only 10mW. Simulation results illustrate a phase noise of-83dBc/Hz @ 1MHz offset from centre frequency. Also, the worst case phase variation due to mismatch is better than 0.4˚over the above frequency range.
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2008 IEEE International Conference on Semiconductor Electronics, 2008
This paper presents the design of two new ring oscillators based on differential and single-ended topologies using a 0.13µm 1P8M CMOS technology. The differential oscillator utilizes feed-forward technique and a new composite load with inductive impedance, reducing the delay per stage and widening the tuning range. The output frequency ranges from 0.5 to 9.5 GHz and the circuit consumes only 9mW. The simulation result of phase noise is -85.3dBc/Hz @ 1MHz offset from centre frequency. The singleended ring oscillator with inductive composite load oscillates from 6.3 to 13.9 GHz and consumes only 5.1 mW with phase noise of -81.5dBc/Hz @ 1MHz offset from centre frequency.
International Journal of Engineering Research and Applications, 2017
Voltage Controlled Oscillator is one of the most imperative blocks in the present communication system. It finds application in both wired as well as wireless communication as clock generator, frequency synthesizer and system synchronizer. The desirable characteristics of a VCO are high frequency, low phase noise, low power, low voltage and enhanced range of tuning. A three stage CMOS voltage controlled ring oscillator based on differential architecture and a LC tank voltage-controlled ring oscillator based on cross coupled architecture hasbeen designed by using 32nm and 90 nm technology respectively. The former VCO has a tuning range spanning from 733.718 MHz to 2.065 GHz with a phase noise of-79.4dBc/Hz while the latter possess better phase noise of-89.7dBc/Hz at the cost of reduced tuning range spanning from 4.5GHZ to 4.9GHZ only which is comparatively lesser than its counterpart.
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A new circuit of delay cell for differential ring oscillator (DRO), to generate wide tuning range, has been proposed. Two architectures of DRO: 3 stage and 4 stage, have been designed and simulated under the power supply constraint of 1.1 V, using GPDK 45 nm CMOS technology. Dual voltages are used to control the tuning frequency range in 3 stage DRO whereas single voltage control is used in 4 stage DRO. Tuning ranges of 351 MHz-30.33 GHz and 574 MHz-20.49 GHz, are generated using the proposed 3-stage and 4-stage DRO circuits, respectively. Total Harmonic Distortion of both circuits, is also measured through simulation. Power consumption of the proposed 3-stage and 4 stage DRO, are found to be 866 lW and 783 lW at an oscillation frequency of 2.77 GHz and 1.86 GHz, respectively. Proposed circuits exhibit phase noise of-96.7 dBc/Hz and-99.54 dBc/Hz at an offset of 10 MHz from the frequency of oscillation. Layout, is also drawn, occupies an area of 137.97 lm 2 and 170.34 lm 2 for 3 stage and 4 stage DRO, respectively. Robustness of the proposed circuits are verified across Process, Voltage and Temperature variations. The proposed DROs exhibit the largest tuning range when compared with the recent literature.
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AEU - International Journal of Electronics and Communications, 2020
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2014 International Conference on Information Science, Electronics and Electrical Engineering, 2014
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