Demonstration of high quality and low loss millimeter wave passives on embedded wafer level packaging platform (EMWLP) (original) (raw)
Related papers
IEEE Transactions on Advanced Packaging, 2010
With the increasing demand for system integration to cater to continuously increasing number of I/Os as well as higher operating frequencies, reconfigured wafer-level packaging, or embedded WLP (EMWLP) is emerging as a promising technology for integration. This platform allows integrated passives to be designed in the redistribution layers using the mold compound as a substrate, which significantly improves the passives performance compared to those of on-chip. In this paper, we present low loss passives on EMWLP platform demonstrated in a 5.5-GHz band pass filter targeted for wireless local area network (WLAN) applications. To ascertain the feasibility of designing for low loss millimeter wave passives on EMWLP, transmission lines were designed and their loss characteristics investigated up to 110 GHz, which are reported here. Subsequently we demonstrate for the first time a narrowband low loss 77-GHz band pass filter on EMWLP platform, with a good correlation obtained between simulation and measurement results. In addition, a temperature dependence characterization was performed on the 77-GHz filter, with little variation in the measured filter characteristics observed.
Microwave and Millimeter-Wave Integrated Circuit Systems in Packaging
2009
In this work, EM simulation tools were exploited to investigate the package and interconnect structures for millimeter-wave and high-speed communication systems. Precise prediction on properties of passive structures as well as active devices is achieved by using accurate EM simulation techniques developed in this work. Complex 3D EM designs and modelling can be successfully accomplished by using EM simulations. As the foundation of the work, the general recommendations for EM simulations are firstly summarized according to two practical examples: design of a split ring resonator and investigation on multimode propagation in CPW structures. For the case of EM modelling of on-wafer measured passive components for millimeter-wave applications, a novel ground-ring excitation scheme with simple ground-signal-ground (G-S-G) probe models is proposed. The parasitic elements caused by the excitation structure are de-embedded by an extended "L-2L" calibration method. The excitation...
The Fifth International Conference on Advanced Semiconductor Devices and Microsystems, 2004. ASDAM 2004., 2004
High-resistivity polycrystalline silicon (HRPS) wafers are explored as a novel low-cost and low-loss substrate for radio-frequency (RF) passive components in wafer-level packaging (WLP) and integrated passive networks. A record quality factor (Q=11; 1 GHz; 34 nH) and very low loss (0.65 dB/cm; 17 GHz) are demonstrated for inductors and coplanar wave guides, respectively. The waferlevel packaging solution is based on an adhesive bonding of a passive HRPS wafer to an active silicon IC wafer, where the HRPS wafer serves as a mechanical carrier and vertical spacer. This enables integration of large RF passives with a vertical spacing of >150 µm to the conductive silicon substrate containing the circuitry, while providing mechanical stability, reducing form factor and avoiding any additional RF loss. The HRPS substrates have high dielectric constant, low RF loss, high thermal conductivity, perfect thermal matching, and processing similar to the single-crystalline silicon.
MCM integration technologies for 60-80 GHz applications
vii Zusammenfassung ix 157 6.4.1. Quasi-static analysis 158 6.4.2. Modelling of high-frequency dispersion 160 6.4.3. Accuracy results 162 6.5. Multi-layer dielectric configurations 166 6.5.1. Quasi-static analysis 167 6.5.2. Modelling of high-frequency dispersion 171 6.5.3. Dielectric loss tangent 172 6.5.4. Accuracy results 173 6.6. Extraction results 180 6.7. Summary 187 7. Conclusions 189 A. Reciprocity relations in waveguide junctions 193 B. Higher-order effects in wafer probing environment 197 C. High-frequency dispersion of microstrip lines 201 D. Conformai mapping for multi-layer microstrip lines 205 Glossary 209 Bibliography 213 Curriculum Vitae 235 vi Abstract This research addresses the development of a set of MCM (Multi-Chip Mo¬
2005
In this paper, we demonstrate the development of advanced 3-D low-temperature cofired ceramic (LTCC) system-on-package (SOP) passive components for compact, low cost millimeter-wave wireless front-end modules. Numerous miniaturized easy-to-design passive circuits that can be used as critical building blocks for millimetre-wave SOP modules have been hereby realized with high performance and high integration potential. One miniaturized slotted patch resonator has been designed by the optimal use of vertical coupling mechanism and transverse cuts and has been utilized to realize compact duplexers (39.8 GHz/59 GHz) and 3 and 5 poles band pass filters by the novel 3D (vertical and parallel) deployment of single-mode patch resonators. Measured results agree very well with the simulated data. Also, one multiplexing filter, called directional channelseparation filter, that can be used in mixer applications shows insertion loss of <3dB over the bandpass frequency band and a rejection ~ 25dB at around 38.5GHz over the band rejection section. LTCC fabrication limitations have been overcome by using vertical coupling mechanisms to satisfy millimetre-wave design requirements. Last, a double fed cross-shaped microstrip antenna has been designed for the purpose of doubling the data throughput by means of a dual-polarized wireless channel, covering the band between 59-64 GHz. This antenna can be easily integrated into a wireless millimeterwave link system. Index Terms -patch resonator, duplexer, low-temperature co-fired ceramic (LTCC), system-on-package (SOP), directional filter, multiplexing, 3D/vertical integration, microstrip antenna, dual polarization, millimeter-wave (mmW)
Low-Loss Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology
IEICE Transactions on Electronics, 2007
This paper proposes high-Q distributed constant passive devices using wafer-level chip scale package (WL-CSP) technology, which can be realized on a Si CMOS chip. A 90 • directional coupler using the WL-CSP technology has center frequency of 25.6 GHz, insertion loss of −0.5 dB and isolation of −29.8 dB in the measurement result. The WL-CSP technology contributes to realize low-loss RF passive devices on Si CMOS chip, which is indispensable to achieve small-size, cost-effective and low-power monolithic wireless communication circuits (MWCCs). key words: wafer-level chip scale package, RF CMOS, passive device
Die-on-wafer and wafer-level 3D integration for millimeter-wave smart antenna transceivers
The 2005 IEEE Annual Conference Wireless and Micrwave Technology, 2005., 2005
A three-dimensional (3D) IC technology platform for high-performance, heterogeneous integration of silicon ICs for mm-wave smart antenna transceivers is presented. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. A low noise amplifier (LNA), power amplifier (PA), and an analog-todigital converter (ADC) are designed in RF-enhanced SiGe BiCMOS process to operate in the 24GHz ISM band. These critical design blocks serve as a step towards the realization of a complete system integrated with I/O matching networks, switches, antennas, and digital processing in a 3D configuration.
IEEE Transactions on Advanced Packaging, 2009
In this paper, a system-on-package (SOP) technology using a thin-film substrate with a flip-chip interconnection has been developed for compact and high-performance millimeter-wave (mm-wave) modules. The thin-film substrate consists of Si-bumps, ground-bumps, and multilayer benzocyclobutene (BCB) films on a lossy silicon substrate. The lossy silicon substrate is not only a base plate of the thin-film substrate, but also suppresses the parasitic substrate mode excited in the thin-film substrate. Suppression of the substrate mode was verified with measurement results. The multilayer BCB films and the ground-bumps provide the thin-film substrate with high-performance integrated passives for the SOP capability. A broadband port terminator and a V-band broad-side coupler based on thin-film microstrip (TFMS) circuits were fabricated and characterized as mm-wave integrated passives. The Si-bumps dissipate the heat generated during the operation of flipped chips as well as provide mechanical support. The power dissipation capability of the Si-bumps was confirmed with an analysis of DC-IV characteristics of GaAs pseudomorphic high electron-mobility transistors (PHEMTs) and radio-frequency performances of a V-band power amplifier (PA). In addition, the flip-chip transition between a TFMS line on the thin-film substrate and a coplanar waveguide (CPW) line on a flipped chip was optimized with a compensation network, which consists of a high-impedance and low-impedance TFMS line and a removed ground technique. As an implementation example of the mm-wave SOP technology, a V-band power combining module (PCM) was developed on the thin-film substrate with the flip-chip interconnection. The V-band PCM incorporating two PAs with broadside couplers showed a combining efficiency higher than 78%.
IEEE Transactions on Advanced Packaging, 2007
This paper presents a polymer-based wafer-level integration technology suitable for integrating RF and mixed-signal circuits and systems. In this technology, disparate dies can be integrated together using a batch fabrication process. Very high density die-to-die interconnects with widths currently as small as 25 m are implemented. To demonstrate the capabilities of this technology, a 10-GHz receiver front-end implemented in 0.18-m CMOS technology is integrated with a high-resistivity Si substrate and embedded passives. By adjusting the input matching of the receiver using the embedded passives fabricated on the high-resistivity Si substrate, the input matching and conversion gain of the front-end receiver are improved.