Second order noise shaping for data-weighted averaging technique to improve sigma-delta DAC performance (original) (raw)

Completely first order and tone free partitioned data weighted averaging technique used in a multibit delta sigma modulator

Philippe Benabes

2009 European Conference on Circuit Theory and Design, 2009

View PDFchevron_right

A /spl Delta//spl Sigma/ DAC with reduced activity data weighted averaging and anti-jitter digital filter

gurjinder singh

2005

View PDFchevron_right

A Noise-Shaping Algorithm of Multi-bit DAC Nonlinearities

Haruo Kobayashi

View PDFchevron_right

Reducing multibit DAC circuits errors by a simplified dynamic element matching algorithm used in delta-sigma converters

Philippe Benabes

View PDFchevron_right

Nonlinearity correction for multibit /spl Delta//spl Sigma/ DACs

Lourdes Enríquez

IEEE Transactions on Circuits and Systems I: Regular Papers, 2005

View PDFchevron_right

Improved performance of multi-bit delta-sigma analog to digital converters via requantization

fred harris

1991., IEEE International Sympoisum on Circuits and Systems

View PDFchevron_right

A digital background correction technique combined with DWA for DAC mismatch errors in multibit ΣΔ ADCs

Hossein pakniat

Proceedings of 2010 IEEE International Symposium on Circuits and Systems, 2010

View PDFchevron_right

A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC With Signal-Independent Delta-I Noise DfT Scheme

Arthur van Roermund

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2000

View PDFchevron_right

A third-order Δ-Σ modulator using second-order noise-shaping dynamic element matching

hiroshi tanimoto

IEEE Journal of Solid-State Circuits, 1998

View PDFchevron_right

Quadrature Mismatch Shaping for Digital-to-Analog Converters

Ludo Weyten, Pieter Rombouts

IEEE Transactions on Circuits and Systems I: Regular Papers, 2000

View PDFchevron_right

Influence of Circuit Imperfections on the Performance of DACs

J Jacob Wikner

1999

View PDFchevron_right

Mismatch error shaping of DAC unit elements in multibit ∆Σ modulators using a novel unified ADC/DAC

Omid Hashemipour

TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES, 2021

View PDFchevron_right

A 110dB SNR and 0.5mW current-steering audio DAC implemented in 45nm CMOS

Gabriel Gomez

2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010

View PDFchevron_right

Spectral shaping of DAC nonlinearity errors through modulation of expected errors

J Jacob Wikner

2001

View PDFchevron_right

A digital calibration technique combined with DWA for multibit ΣΔ ADCs

Hossein pakniat

2010 18th Iranian Conference on Electrical Engineering, 2010

View PDFchevron_right

A Higher Order ADC Using Multi bit Quantizer and Noise Cancellation

IJIRT Journal

View PDFchevron_right

Implementation of a 4-Bit Direct Charge Transfer Switched Capacitor DAC and DWA DEM technique

International Journal IJRITCC

View PDFchevron_right

Design of binary weighted DAC for asynchronous ADC with improved slew rate and with calibrated size of capacitors

Asif Ikbal

Journal of Vibroengineering, 2020

View PDFchevron_right

High Speed and Wide Bandwidth Delta-Sigma ADCs

Muhammed Bolatkale

Analog Circuits and Signal Processing, 2014

View PDFchevron_right

Optimised weighted-resistor digital to analogue converter

Tejmal Rathore

IEE Proceedings - Circuits, Devices and Systems, 1998

View PDFchevron_right

Tunable mismatch shaping for quadrature bandpass delta-sigma data converters

Waqas Akram

2010

View PDFchevron_right

An 18-bit high performance audio s-? D/A converter

Ray Cheung

Journal of Semiconductors, 2010

View PDFchevron_right

On Design a High Speed Sigma Delta DAC Modulator for a Digital Communication Transceiver on Chip

Ruimin Huang

2008

View PDFchevron_right

Delta-sigma algorithmic analog-to-digital conversion

Gert Cauwenberghs

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353), 2002

View PDFchevron_right

Reduction of influence of finite resolution of feedback DAC on intelligent cyclic ADC performance using digital dither

Konrad Jedrzejewski

View PDFchevron_right

Optimization of the noise transfer function of Extended-Frequency-Band-Decomposition sigma-delta A/D converters

Philippe Benabes

2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, 2008

View PDFchevron_right

Systematic Design of Double-Sampling<tex>$SigmaDelta$</tex>A/D Converters With a Modified Noise Transfer Function

Ludo Weyten, Pieter Rombouts

IEEE Transactions on Circuits and Systems II: Express Briefs, 2004

View PDFchevron_right

Redundant signed digit coding in binary weighted DACs

Ludo Weyten, Pieter Rombouts

2008 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

View PDFchevron_right

A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling

Khiem Q. Nguyen

IEEE Journal of Solid-State Circuits, 1998

View PDFchevron_right

Comparison of Sigma–Delta Converter Circuit Architectures in Digital Cmos Technology

Avner Kornfeld

Journal of Circuits, Systems and Computers, 2005

View PDFchevron_right

Low-Pass Filtering SC-DAC for Reduced Jitter and Slewing Requirements on CTSDMs

Pieter Rombouts

IEEE Transactions on Circuits and Systems I: Regular Papers, 2018

View PDFchevron_right

An approach to tackle quantization noise folding in double-sampling ΣΔ modulation A/D converters

Ludo Weyten, Johan Raman, Pieter Rombouts

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 2003

View PDFchevron_right

A 6-mW, 70.1-dB SNDR, and 20-MHz BW Continuous-Time Sigma-Delta Modulator Using Low-Noise High-Linearity Feedback DAC

Sunsik Woo

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017

View PDFchevron_right

Using Different Weights in DACs

J Jacob Wikner

2014

View PDFchevron_right

Reducing quantization noise with recursive ΣΔ modulators

A. Annema

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), 2004

View PDFchevron_right