Optimized address assignment for DSPs with SIMD memory accesses (original) (raw)
2001, Proceedings of the 2001 conference on Asia South Pacific design automation - ASP-DAC '01
Related papers
Algorithms for address assignment in DSP code generation
1997
Instruction set design and optimizations for address computation in dsp processors
1996
Array index allocation under register constraints in DSP programs
Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013), 1999
Instruction set design and optimizations for address computation in DSP architectures
Proceedings of 9th International Symposium on Systems Synthesis, 1996
... Department of Electrical Engineering Princeton University, Princeton, New Jersey 08544, USA { guido,ashok,sharad}@ee.princeton.edu Abstract In this paper we investigate the problem of code gen-eration for address computation for DSP processors. ...
An ILP solution to address code generation for embedded applications on digital signal processors
ACM Transactions on Design Automation of Electronic Systems, 2012
Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2005
On Heuristic Solutions to the Simple Offset Assignment Problem in Address-Code Optimization
ACM Transactions on Embedded Computer Systems, 2012
Evaluating address register assignment and offset assignment algorithms
ACM Transactions on Embedded Computing Systems, 2011
Address register-oriented optimizations for embedded processors
2001
Code Optimization Techniques for Embedded DSP Microprocessors
32nd Design Automation Conference, 1995
Loading Preview
Sorry, preview is currently unavailable. You can download the paper by clicking the button above.
Related papers
Reducing code size through address register assignment
ACM Transactions on Embedded Computing Systems, 2006
Address Register-Oriented Optimizations
Storage Assignment to Decrease Code Size
1995
An Effective Heuristic for Simple Offset Assignment with Variable Coalescing
Lecture Notes in Computer Science, 2007
Instruction Assignment for Clustered VLIW DSP Compilers: A New Approach
1998
Optimized array index computation in DSP programs
1998
Address register allocation for arrays in loops of embedded programs
Microelectronics Journal, 2003
Evaluation of Offset Assignment Heuristics
Lecture Notes in Computer Science, 2007
Memory Offset Assignment for DSPs
Lecture Notes in Computer Science
Improving Offset Assignment on Embedded Processors Using Transformations
Lecture Notes in Computer Science, 2000
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
1997
Optimizing data permutations for SIMD devices
2006
Compact and efficient code generation through program restructuring on limited memory embedded DSPs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001
A practical approach to DSP code optimization using compiler/architecture
#HumanName:0x007fac34004348 Wolf, Egidijus Kazanavicius
2002
Hybrid Evolutionary Algorithm Based Solution for Register Allocation for Embedded Systems
Journal of Computers, 2008
Mapping Reference Code to Irregular DSPS Within the Retargetable, Optimizing Compiler Cogen(T)
International Journal of Computational Intelligence and Applications, 2003
Graph Coloring vs. Optimal Register Allocation for Optimizing Compilers
Lecture Notes in Computer Science, 2003
Using register-transfer paths in code generation for heterogeneous memory-register architectures
1996
Address calculation for retargetable compilation and exploration of instruction-set architectures
Proceedings of the 33rd annual conference on Design …
Related topics
Computer ScienceIntellectual PropertyGenetic AlgorithmsDigital Signal ProcessingQuality ImprovementGenetic AlgorithmDigital Signal ProcessorsArchitecture and MemoryAssemblyHardwareCode GenerationSystem on a ChipDigital Signal ProcessorRegistersSIMDCoresInstruction SetsDirect Memory AccessDSPsSingle Instruction Multiple Data...