Inverted Page Table (original) (raw)

Last Updated : 7 Nov, 2025

In an operating system that uses virtual memory, an Inverted Page Table (IPT) is a data structure used to map physical memory pages to virtual memory pages. Unlike a traditional Page Table, which is a per-process data structure, an IPT is a system-wide data structure that contains an entry for each physical page in memory.

• Inverted Page Table has one entry for each frame in main memory.
• It stores paging information for all processes in a single table.
• It removes the need for individual page tables per process.
• Indexing is done using frame numbers instead of logical page numbers.

Components of Inverted Page Table

Each entry in the page table contains the following fields.

• **Page number: It specifies the page number range of the logical address.
• **Process id: An inverted page table contains the address space information of all the processes in execution. Since two different processes can have a similar set of virtual addresses, it becomes necessary in the Inverted Page Table to store a process Id of each process to identify its address space uniquely. This is done by using the combination of PID and Page Number. So this Process Id acts as an address space identifier and ensures that a virtual page for a particular process is mapped correctly to the corresponding physical frame.
• **Control bits: These bits are used to store extra paging-related information. These include the valid bit, dirty bit, reference bits, protection, and locking information bits.
• **Chained pointer: It may be possible sometimes that two or more processes share a part of the main memory. In this case, two or more logical pages map to the same Page Table Entry then a chaining pointer is used to map the details of these logical pages to the root page table.

**Working of Inverted Page Table

The operation of an inverted page table is shown below.

Inverted Page Table

The virtual address generated by the CPU contains the fields and each page table entry contains the other relevant information required in paging related mechanism. When a memory reference takes place, this virtual address is matched by the Memory Management Unit(MMU), the Inverted Page table is searched and the corresponding frame number is obtained. If the match is found at the ith entry then the physical address of the process is sent as the real address otherwise if no match is found then Segmentation Fault is generated. **Note: Number of Entries in Inverted page table = Number of frames in Physical Address Space(PAS).

**Examples: The Inverted Page table and its variations are implemented in various systems like PowerPC, UltraSPARC, and the IA-64 architecture. An implementation of the Mach operating system on the RT-PC also uses this technique.

**Advantages of Inverted Page Table

The Main advantages of the inverted page table are as follow:

• Reduces memory usage as it needs entries equal to the number of physical frames.
• Lookup time is longer since translation occurs using virtual addresses; hashing is used to speed this up.
• Shared memory is harder to implement because each frame has only one entry; chaining helps handle multiple mappings.
• Simpler and more efficient than traditional page tables, reducing management complexity.
• Makes page swapping easier by quickly locating pages of a process.
• Improves cache performance as the smaller table fits better in CPU cache.