Model Configuration Parameters: Test Bench - MATLAB & Simulink (original) (raw)
The Test Bench category lets you set options that determine characteristics of generated test bench code.
These configuration parameters appear in the Configuration Parameters > HDL Code Generation > Test Bench category.
| Parameter | Description |
|---|---|
| Test bench name postfix | Specify suffix appended to test bench name. |
| Force clock | Specify whether the test bench forces clock input signals. |
| Clock high time (ns) | Specify the period, in nanoseconds, during which the test bench drives clock input signals high (1). |
| Clock low time (ns) | Specify the period, in nanoseconds, during which the test bench drives clock input signals low (0). |
| Hold time (ns) | Specify a hold time, in nanoseconds, for input signals and forced reset input signals. |
| Force clock enable | Specify whether the test bench forces clock enable input signals. |
| Clock enable delay (in clock cycles) | Define elapsed time (in clock cycles) between deassertion of reset and assertion of clock enable. |
| Force reset | Specify whether the test bench forces reset input signals. |
| Reset length (in clock cycles) | Define length of time (in clock cycles) during which reset is asserted. |
| Hold input data between samples | Specify how long subrate signal values are held in valid state. |
| Initialize test bench inputs | Specify initial value driven on test bench inputs before data is asserted to DUT. |
| Multi-file test bench | Divide generated test bench into helper functions, data, and HDL test bench code files. |
| Test bench data file name postfix | Specify suffix added to test bench data file name when generating multi-file test bench. |
| Test bench reference postfix | Specify character vector to be appended to names of reference signals generated in test bench code. |
| Use file I/O to read/write test bench data | Create and use data files for reading and writing test bench input and output data. |
| Ignore output data checking (number of samples) | Specify number of samples during which output data checking is suppressed. |
| Floating point tolerance check based on | Specify the floating-point tolerance check option. |
| Tolerance Value | Enter the tolerance value based on the floating-point tolerance check setting that you specify. |
| Floating point tolerance check | Specify the floating-point tolerance check option for HLS code generation. |
| Tolerance Value | Enter the tolerance value based on the floating-point tolerance check setting that you specify for HLS code generation. |
| Simulation library path | Specify the path to your compiled Altera® or Xilinx® simulation libraries. |
The Configuration Parameters dialog box also includes other code generation parameters: