MIParser.cpp Source File (original) (raw)

71#include

72#include

73#include

74#include

75#include

76#include

77#include

79using namespace llvm;

85 if (&Subtarget == &NewSubtarget)

86 return;

88 Names2InstrOpCodes.clear();

89 Names2Regs.clear();

90 Names2RegMasks.clear();

91 Names2SubRegIndices.clear();

92 Names2TargetIndices.clear();

93 Names2DirectTargetFlags.clear();

94 Names2BitmaskTargetFlags.clear();

95 Names2MMOTargetFlags.clear();

97 initNames2RegClasses();

98 initNames2RegBanks();

99}

100

101void PerTargetMIParsingState::initNames2Regs() {

102 if (!Names2Regs.empty())

103 return;

104

105

106 Names2Regs.insert(std::make_pair("noreg", 0));

108 assert(TRI && "Expected target register info");

109

110 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {

111 bool WasInserted =

113 .second;

114 (void)WasInserted;

115 assert(WasInserted && "Expected registers to be unique case-insensitively");

116 }

117}

118

121 initNames2Regs();

122 auto RegInfo = Names2Regs.find(RegName);

123 if (RegInfo == Names2Regs.end())

124 return true;

125 Reg = RegInfo->getValue();

126 return false;

127}

128

130 uint8_t &FlagValue) const {

132 std::optional<uint8_t> FV = TRI->getVRegFlagValue(FlagName);

133 if (!FV)

134 return true;

135 FlagValue = *FV;

136 return false;

137}

138

139void PerTargetMIParsingState::initNames2InstrOpCodes() {

140 if (!Names2InstrOpCodes.empty())

141 return;

143 assert(TII && "Expected target instruction info");

144 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)

146}

147

149 unsigned &OpCode) {

150 initNames2InstrOpCodes();

151 auto InstrInfo = Names2InstrOpCodes.find(InstrName);

152 if (InstrInfo == Names2InstrOpCodes.end())

153 return true;

154 OpCode = InstrInfo->getValue();

155 return false;

156}

157

158void PerTargetMIParsingState::initNames2RegMasks() {

159 if (!Names2RegMasks.empty())

160 return;

162 assert(TRI && "Expected target register info");

166 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)

167 Names2RegMasks.insert(

168 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));

169}

170

172 initNames2RegMasks();

173 auto RegMaskInfo = Names2RegMasks.find(Identifier);

174 if (RegMaskInfo == Names2RegMasks.end())

175 return nullptr;

176 return RegMaskInfo->getValue();

177}

178

179void PerTargetMIParsingState::initNames2SubRegIndices() {

180 if (!Names2SubRegIndices.empty())

181 return;

183 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)

184 Names2SubRegIndices.insert(

185 std::make_pair(TRI->getSubRegIndexName(I), I));

186}

187

189 initNames2SubRegIndices();

190 auto SubRegInfo = Names2SubRegIndices.find(Name);

191 if (SubRegInfo == Names2SubRegIndices.end())

192 return 0;

193 return SubRegInfo->getValue();

194}

195

196void PerTargetMIParsingState::initNames2TargetIndices() {

197 if (!Names2TargetIndices.empty())

198 return;

200 assert(TII && "Expected target instruction info");

201 auto Indices = TII->getSerializableTargetIndices();

202 for (const auto &I : Indices)

203 Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));

204}

205

207 initNames2TargetIndices();

208 auto IndexInfo = Names2TargetIndices.find(Name);

209 if (IndexInfo == Names2TargetIndices.end())

210 return true;

211 Index = IndexInfo->second;

212 return false;

213}

214

215void PerTargetMIParsingState::initNames2DirectTargetFlags() {

216 if (!Names2DirectTargetFlags.empty())

217 return;

218

220 assert(TII && "Expected target instruction info");

222 for (const auto &I : Flags)

223 Names2DirectTargetFlags.insert(

224 std::make_pair(StringRef(I.second), I.first));

225}

226

228 unsigned &Flag) {

229 initNames2DirectTargetFlags();

230 auto FlagInfo = Names2DirectTargetFlags.find(Name);

231 if (FlagInfo == Names2DirectTargetFlags.end())

232 return true;

233 Flag = FlagInfo->second;

234 return false;

235}

236

237void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {

238 if (!Names2BitmaskTargetFlags.empty())

239 return;

240

242 assert(TII && "Expected target instruction info");

244 for (const auto &I : Flags)

245 Names2BitmaskTargetFlags.insert(

246 std::make_pair(StringRef(I.second), I.first));

247}

248

250 unsigned &Flag) {

251 initNames2BitmaskTargetFlags();

252 auto FlagInfo = Names2BitmaskTargetFlags.find(Name);

253 if (FlagInfo == Names2BitmaskTargetFlags.end())

254 return true;

255 Flag = FlagInfo->second;

256 return false;

257}

258

259void PerTargetMIParsingState::initNames2MMOTargetFlags() {

260 if (!Names2MMOTargetFlags.empty())

261 return;

262

264 assert(TII && "Expected target instruction info");

265 auto Flags = TII->getSerializableMachineMemOperandTargetFlags();

266 for (const auto &I : Flags)

267 Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));

268}

269

272 initNames2MMOTargetFlags();

273 auto FlagInfo = Names2MMOTargetFlags.find(Name);

274 if (FlagInfo == Names2MMOTargetFlags.end())

275 return true;

276 Flag = FlagInfo->second;

277 return false;

278}

279

280void PerTargetMIParsingState::initNames2RegClasses() {

281 if (!Names2RegClasses.empty())

282 return;

283

285 for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {

286 const auto *RC = TRI->getRegClass(I);

287 Names2RegClasses.insert(

288 std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));

289 }

290}

291

292void PerTargetMIParsingState::initNames2RegBanks() {

293 if (!Names2RegBanks.empty())

294 return;

295

297

298

299 if (!RBI)

300 return;

301

303 const auto &RegBank = RBI->getRegBank(I);

304 Names2RegBanks.insert(

305 std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));

306 }

307}

308

311 auto RegClassInfo = Names2RegClasses.find(Name);

312 if (RegClassInfo == Names2RegClasses.end())

313 return nullptr;

314 return RegClassInfo->getValue();

315}

316

318 auto RegBankInfo = Names2RegBanks.find(Name);

319 if (RegBankInfo == Names2RegBanks.end())

320 return nullptr;

321 return RegBankInfo->getValue();

322}

323

326 : MF(MF), SM(&SM), IRSlots(IRSlots), Target(T) {

327}

328

330 auto I = VRegInfos.insert(std::make_pair(Num, nullptr));

331 if (I.second) {

334 Info->VReg = MRI.createIncompleteVirtualRegister();

335 I.first->second = Info;

336 }

337 return *I.first->second;

338}

339

342

344 if (I.second) {

347 I.first->second = Info;

348 }

349 return *I.first->second;

350}

351

355 if (Slot == -1)

356 return;

357 Slots2Values.insert(std::make_pair(unsigned(Slot), V));

358}

359

360

363 ModuleSlotTracker MST(F.getParent(), false);

365 for (const auto &Arg : F.args())

367 for (const auto &BB : F) {

369 for (const auto &I : BB)

371 }

372}

373

378}

379

380namespace {

381

382

383

384struct ParsedMachineOperand {

388 std::optional TiedDefIdx;

389

392 std::optional &TiedDefIdx)

393 : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {

394 if (TiedDefIdx)

396 "Only used register operands can be tied");

397 }

398};

399

400class MIParser {

407

409

410public:

415

416

417

418 void lex(unsigned SkipChar = 0);

419

420

421

422

424

425

426

427

429

430 bool

432 bool parseBasicBlocks();

435 bool parseStandaloneNamedRegister(Register &Reg);

436 bool parseStandaloneVirtualRegister(VRegInfo *&Info);

437 bool parseStandaloneRegister(Register &Reg);

438 bool parseStandaloneStackObject(int &FI);

439 bool parseStandaloneMDNode(MDNode *&Node);

441 bool parseMDTuple(MDNode *&MD, bool IsDistinct);

444

445 bool

451

454 bool parseNamedVirtualRegister(VRegInfo *&Info);

456 bool parseRegisterFlag(unsigned &Flags);

458 bool parseSubRegisterIndex(unsigned &SubReg);

459 bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);

461 std::optional &TiedDefIdx,

462 bool IsDef = false);

468 bool parseTypedImmediateOperand(MachineOperand &Dest);

472 bool parseStackFrameIndex(int &FI);

474 bool parseFixedStackFrameIndex(int &FI);

475 bool parseFixedStackObjectOperand(MachineOperand &Dest);

477 bool parseGlobalAddressOperand(MachineOperand &Dest);

478 bool parseConstantPoolIndexOperand(MachineOperand &Dest);

479 bool parseSubRegisterIndexOperand(MachineOperand &Dest);

480 bool parseJumpTableIndexOperand(MachineOperand &Dest);

481 bool parseExternalSymbolOperand(MachineOperand &Dest);

484 bool parseDIExpression(MDNode *&Expr);

485 bool parseDILocation(MDNode *&Expr);

487 bool parseCFIOffset(int &Offset);

489 bool parseCFIAddressSpace(unsigned &AddressSpace);

490 bool parseCFIEscapeValues(std::string& Values);

499 bool parseCustomRegisterMaskOperand(MachineOperand &Dest);

500 bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);

501 bool parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,

503 std::optional &TiedDefIdx);

504 bool parseMachineOperandAndTargetFlags(const unsigned OpCode,

505 const unsigned OpIdx,

507 std::optional &TiedDefIdx);

508 bool parseOffset(int64_t &Offset);

509 bool parseIRBlockAddressTaken(BasicBlock *&BB);

511 bool parseAddrspace(unsigned &Addrspace);

512 bool parseSectionID(std::optional &SID);

513 bool parseBBID(std::optional &BBID);

514 bool parseCallFrameSize(unsigned &CallFrameSize);

518 bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);

521 bool parseOptionalAtomicOrdering(AtomicOrdering &Order);

523 bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);

524 bool parseHeapAllocMarker(MDNode *&Node);

526

527 bool parseTargetImmMnemonic(const unsigned OpCode, const unsigned OpIdx,

529

530private:

531

532

533

535

536

537

538

539 bool getUint64(uint64_t &Result);

540

541

542

543

544

546

547

548

550

551

552

554

555 bool parseInstruction(unsigned &OpCode, unsigned &Flags);

556

559

562

563 const BasicBlock *getIRBlock(unsigned Slot);

565

566

568

569

570

571 bool parseStringConstant(std::string &Result);

572

573

574

576};

577

578}

579

583{}

584

588 SourceRange(SourceRange), PFS(PFS) {}

589

590void MIParser::lex(unsigned SkipChar) {

592 CurrentSource.substr(SkipChar), Token,

594}

595

596bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }

597

603

604

606 return true;

607 }

608

611 Source, {}, {});

612 return true;

613}

614

616 assert(SourceRange.isValid() && "Invalid source range");

619 (Loc - Source.data()));

620}

621

624

626 switch (TokenKind) {

628 return "','";

630 return "'='";

632 return "':'";

634 return "'('";

636 return "')'";

637 default:

638 return "";

639 }

640}

641

643 if (Token.isNot(TokenKind))

645 lex();

646 return false;

647}

648

650 if (Token.isNot(TokenKind))

651 return false;

652 lex();

653 return true;

654}

655

656

657bool MIParser::parseSectionID(std::optional &SID) {

659 lex();

661 unsigned Value = 0;

663 return error("Unknown Section ID");

665 } else {

666 const StringRef &S = Token.stringValue();

667 if (S == "Exception")

669 else if (S == "Cold")

671 else

672 return error("Unknown Section ID");

673 }

674 lex();

675 return false;

676}

677

678

679bool MIParser::parseBBID(std::optional &BBID) {

681 lex();

682 unsigned BaseID = 0;

683 unsigned CloneID = 0;

685 return error("Unknown BB ID");

686 lex();

689 return error("Unknown Clone ID");

690 lex();

691 }

692 BBID = {BaseID, CloneID};

693 return false;

694}

695

696

697bool MIParser::parseCallFrameSize(unsigned &CallFrameSize) {

699 lex();

700 unsigned Value = 0;

702 return error("Unknown call frame size");

703 CallFrameSize = Value;

704 lex();

705 return false;

706}

707

708bool MIParser::parseBasicBlockDefinition(

711 unsigned ID = 0;

713 return true;

714 auto Loc = Token.location();

715 auto Name = Token.stringValue();

716 lex();

717 bool MachineBlockAddressTaken = false;

718 BasicBlock *AddressTakenIRBlock = nullptr;

719 bool IsLandingPad = false;

720 bool IsInlineAsmBrIndirectTarget = false;

721 bool IsEHFuncletEntry = false;

722 std::optional SectionID;

724 std::optional BBID;

725 unsigned CallFrameSize = 0;

728 do {

729

730 switch (Token.kind()) {

732 MachineBlockAddressTaken = true;

733 lex();

734 break;

736 if (parseIRBlockAddressTaken(AddressTakenIRBlock))

737 return true;

738 break;

740 IsLandingPad = true;

741 lex();

742 break;

744 IsInlineAsmBrIndirectTarget = true;

745 lex();

746 break;

748 IsEHFuncletEntry = true;

749 lex();

750 break;

753 return true;

754 break;

757

758 if (parseIRBlock(BB, MF.getFunction()))

759 return true;

760 lex();

761 break;

763 if (parseSectionID(SectionID))

764 return true;

765 break;

767 if (parseBBID(BBID))

768 return true;

769 break;

771 if (parseCallFrameSize(CallFrameSize))

772 return true;

773 break;

774 default:

775 break;

776 }

779 return true;

780 }

782 return true;

783

784 if ( Name .empty()) {

785 BB = dyn_cast_or_null(

786 MF.getFunction().getValueSymbolTable()->lookup(Name));

787 if (!BB)

789 "' is not defined in the function '" +

790 MF.getName() + "'");

791 }

792 auto *MBB = MF.CreateMachineBasicBlock(BB, BBID);

794 bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;

795 if (!WasInserted)

796 return error(Loc, Twine("redefinition of machine basic block with id #") +

798 if (Alignment)

800 if (MachineBlockAddressTaken)

802 if (AddressTakenIRBlock)

807 if (SectionID) {

810 }

812 return false;

813}

814

815bool MIParser::parseBasicBlockDefinitions(

817 lex();

818

820 lex();

821 if (Token.isErrorOrEOF())

822 return Token.isError();

824 return error("expected a basic block definition before instructions");

825 unsigned BraceDepth = 0;

826 do {

827 if (parseBasicBlockDefinition(MBBSlots))

828 return true;

829 bool IsAfterNewline = false;

830

831 while (true) {

833 Token.isErrorOrEOF())

834 break;

836 return error("basic block definition should be located at the start of "

837 "the line");

839 IsAfterNewline = true;

840 continue;

841 }

842 IsAfterNewline = false;

844 ++BraceDepth;

846 if (!BraceDepth)

847 return error("extraneous closing brace ('}')");

848 --BraceDepth;

849 }

850 lex();

851 }

852

853 if (!Token.isError() && BraceDepth)

854 return error("expected '}'");

855 } while (!Token.isErrorOrEOF());

856 return Token.isError();

857}

858

861 lex();

863 return true;

864 if (Token.isNewlineOrEOF())

865 return false;

866 do {

868 return error("expected a named register");

870 if (parseNamedRegister(Reg))

871 return true;

872 lex();

875

878 return error("expected a lane mask");

880 "Use correct get-function for lane mask");

882 if (getUint64(V))

883 return error("invalid lane mask value");

885 lex();

886 }

889 return false;

890}

891

894 lex();

896 return true;

897 if (Token.isNewlineOrEOF())

898 return false;

899 do {

901 return error("expected a machine basic block reference");

904 return true;

905 lex();

906 unsigned Weight = 0;

910 return error("expected an integer literal after '('");

912 return true;

913 lex();

915 return true;

916 }

920 return false;

921}

922

925

927 lex();

929 while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())

930 lex();

932 }

934

935

936

937

938

939

940

941

942

943

944 bool ExplicitSuccessors = false;

945 while (true) {

947 if (parseBasicBlockSuccessors(MBB))

948 return true;

949 ExplicitSuccessors = true;

951 if (parseBasicBlockLiveins(MBB))

952 return true;

954 continue;

955 } else

956 break;

957 if (!Token.isNewlineOrEOF())

958 return error("expected line break at the end of a list");

959 lex();

960 }

961

962

963 bool IsInBundle = false;

968 continue;

970

971

973 IsInBundle = false;

974 continue;

975 }

978 return true;

980 if (IsInBundle) {

983 }

984 PrevMI = MI;

986 if (IsInBundle)

987 return error("nested instruction bundles are not allowed");

988 lex();

989

991 IsInBundle = true;

993

994 continue;

995 }

996 assert(Token.isNewlineOrEOF() && "MI is not fully parsed");

997 lex();

998 }

999

1000

1001 if (!ExplicitSuccessors) {

1003 bool IsFallthrough;

1007

1008 if (IsFallthrough) {

1009 AddFalthroughFrom = &MBB;

1010 } else {

1012 }

1013 }

1014

1015 return false;

1016}

1017

1018bool MIParser::parseBasicBlocks() {

1019 lex();

1020

1022 lex();

1023 if (Token.isErrorOrEOF())

1024 return Token.isError();

1025

1026

1029 do {

1032 return true;

1033 if (AddFalthroughFrom) {

1037 AddFalthroughFrom = nullptr;

1038 }

1039 if (parseBasicBlock(*MBB, AddFalthroughFrom))

1040 return true;

1041

1042

1045 return false;

1046}

1047

1049

1052 while (Token.isRegister() || Token.isRegisterFlag()) {

1053 auto Loc = Token.location();

1054 std::optional TiedDefIdx;

1055 if (parseRegisterOperand(MO, TiedDefIdx, true))

1056 return true;

1058 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));

1060 break;

1061 lex();

1062 }

1064 return true;

1065

1067 if (Token.isError() || parseInstruction(OpCode, Flags))

1068 return true;

1069

1070

1079 auto Loc = Token.location();

1080 std::optional TiedDefIdx;

1081 if (parseMachineOperandAndTargetFlags(OpCode, Operands.size(), MO, TiedDefIdx))

1082 return true;

1084 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));

1087 break;

1089 return error("expected ',' before the next machine operand");

1090 lex();

1091 }

1092

1093 MCSymbol *PreInstrSymbol = nullptr;

1095 if (parsePreOrPostInstrSymbol(PreInstrSymbol))

1096 return true;

1097 MCSymbol *PostInstrSymbol = nullptr;

1099 if (parsePreOrPostInstrSymbol(PostInstrSymbol))

1100 return true;

1101 MDNode *HeapAllocMarker = nullptr;

1103 if (parseHeapAllocMarker(HeapAllocMarker))

1104 return true;

1105 MDNode *PCSections = nullptr;

1107 if (parsePCSections(PCSections))

1108 return true;

1109

1110 unsigned CFIType = 0;

1112 lex();

1114 return error("expected an integer literal after 'cfi-type'");

1115

1117 return true;

1118 lex();

1119

1121 lex();

1122 }

1123

1124 unsigned InstrNum = 0;

1126 lex();

1128 return error("expected an integer literal after 'debug-instr-number'");

1130 return true;

1131 lex();

1132

1134 lex();

1135 }

1136

1139 lex();

1143 return true;

1145 if (parseDILocation(Node))

1146 return true;

1147 } else

1148 return error("expected a metadata node after 'debug-location'");

1149 if (!isa(Node))

1150 return error("referenced metadata is not a DILocation");

1152 }

1153

1154

1157 lex();

1158 while (!Token.isNewlineOrEOF()) {

1160 if (parseMachineMemoryOperand(MemOp))

1161 return true;

1163 if (Token.isNewlineOrEOF())

1164 break;

1166 return error("expected ',' before the next machine memory operand");

1167 lex();

1168 }

1169 }

1170

1171 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);

1172 if (!MCID.isVariadic()) {

1173

1174 if (verifyImplicitOperands(Operands, MCID))

1175 return true;

1176 }

1177

1178 MI = MF.CreateMachineInstr(MCID, DebugLocation, true);

1179 MI->setFlags(Flags);

1180

1181

1182

1183 for (const auto &Operand : Operands)

1184 MI->addOperand(MF, Operand.Operand);

1185

1186 if (assignRegisterTies(*MI, Operands))

1187 return true;

1188 if (PreInstrSymbol)

1189 MI->setPreInstrSymbol(MF, PreInstrSymbol);

1190 if (PostInstrSymbol)

1191 MI->setPostInstrSymbol(MF, PostInstrSymbol);

1192 if (HeapAllocMarker)

1193 MI->setHeapAllocMarker(MF, HeapAllocMarker);

1194 if (PCSections)

1195 MI->setPCSections(MF, PCSections);

1196 if (CFIType)

1197 MI->setCFIType(MF, CFIType);

1198 if (!MemOperands.empty())

1199 MI->setMemRefs(MF, MemOperands);

1200 if (InstrNum)

1201 MI->setDebugInstrNum(InstrNum);

1202 return false;

1203}

1204

1206 lex();

1208 return error("expected a machine basic block reference");

1210 return true;

1211 lex();

1214 "expected end of string after the machine basic block reference");

1215 return false;

1216}

1217

1218bool MIParser::parseStandaloneNamedRegister(Register &Reg) {

1219 lex();

1221 return error("expected a named register");

1222 if (parseNamedRegister(Reg))

1223 return true;

1224 lex();

1226 return error("expected end of string after the register reference");

1227 return false;

1228}

1229

1230bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {

1231 lex();

1233 return error("expected a virtual register");

1234 if (parseVirtualRegister(Info))

1235 return true;

1236 lex();

1238 return error("expected end of string after the register reference");

1239 return false;

1240}

1241

1242bool MIParser::parseStandaloneRegister(Register &Reg) {

1243 lex();

1246 return error("expected either a named or virtual register");

1247

1249 if (parseRegister(Reg, Info))

1250 return true;

1251

1252 lex();

1254 return error("expected end of string after the register reference");

1255 return false;

1256}

1257

1258bool MIParser::parseStandaloneStackObject(int &FI) {

1259 lex();

1261 return error("expected a stack object");

1262 if (parseStackFrameIndex(FI))

1263 return true;

1265 return error("expected end of string after the stack object reference");

1266 return false;

1267}

1268

1269bool MIParser::parseStandaloneMDNode(MDNode *&Node) {

1270 lex();

1273 return true;

1275 if (parseDIExpression(Node))

1276 return true;

1278 if (parseDILocation(Node))

1279 return true;

1280 } else

1281 return error("expected a metadata node");

1283 return error("expected end of string after the metadata node");

1284 return false;

1285}

1286

1287bool MIParser::parseMachineMetadata() {

1288 lex();

1290 return error("expected a metadata node");

1291

1292 lex();

1294 return error("expected metadata id after '!'");

1295 unsigned ID = 0;

1297 return true;

1298 lex();

1300 return true;

1302 if (IsDistinct)

1303 lex();

1305 return error("expected a metadata node");

1306 lex();

1307

1309 if (parseMDTuple(MD, IsDistinct))

1310 return true;

1311

1312 auto FI = PFS.MachineForwardRefMDNodes.find(ID);

1313 if (FI != PFS.MachineForwardRefMDNodes.end()) {

1315 PFS.MachineForwardRefMDNodes.erase(FI);

1316

1317 assert(PFS.MachineMetadataNodes[ID] == MD && "Tracking VH didn't work");

1318 } else {

1319 auto [It, Inserted] = PFS.MachineMetadataNodes.try_emplace(ID);

1320 if (!Inserted)

1321 return error("Metadata id is already used");

1322 It->second.reset(MD);

1323 }

1324

1325 return false;

1326}

1327

1328bool MIParser::parseMDTuple(MDNode *&MD, bool IsDistinct) {

1330 if (parseMDNodeVector(Elts))

1331 return true;

1333 : MDTuple::get)(MF.getFunction().getContext(), Elts);

1334 return false;

1335}

1336

1339 return error("expected '{' here");

1340 lex();

1341

1343 lex();

1344 return false;

1345 }

1346

1347 do {

1350 return true;

1351

1353

1355 break;

1356 lex();

1357 } while (true);

1358

1360 return error("expected end of metadata node");

1361 lex();

1362

1363 return false;

1364}

1365

1366

1367

1368bool MIParser::parseMetadata(Metadata *&MD) {

1370 return error("expected '!' here");

1371 lex();

1372

1374 std::string Str;

1375 if (parseStringConstant(Str))

1376 return true;

1377 MD = MDString::get(MF.getFunction().getContext(), Str);

1378 return false;

1379 }

1380

1382 return error("expected metadata id after '!'");

1383

1384 SMLoc Loc = mapSMLoc(Token.location());

1385

1386 unsigned ID = 0;

1388 return true;

1389 lex();

1390

1391 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);

1392 if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {

1393 MD = NodeInfo->second.get();

1394 return false;

1395 }

1396

1397 NodeInfo = PFS.MachineMetadataNodes.find(ID);

1398 if (NodeInfo != PFS.MachineMetadataNodes.end()) {

1399 MD = NodeInfo->second.get();

1400 return false;

1401 }

1402

1403 auto &FwdRef = PFS.MachineForwardRefMDNodes[ID];

1404 FwdRef = std::make_pair(

1406 PFS.MachineMetadataNodes[ID].reset(FwdRef.first.get());

1407 MD = FwdRef.first.get();

1408

1409 return false;

1410}

1411

1414 return MO.isDef() ? "implicit-def" : "implicit";

1415}

1416

1419 assert(Reg.isPhysical() && "expected phys reg");

1421}

1422

1423

1426 for (const auto &I : Operands) {

1428 return true;

1429 }

1430 return false;

1431}

1432

1436

1437

1438 return false;

1439

1440

1446

1447 const auto *TRI = MF.getSubtarget().getRegisterInfo();

1448 assert(TRI && "Expected target register info");

1449 for (const auto &I : ImplicitOperands) {

1451 continue;

1453 Twine("missing implicit register operand '") +

1456 }

1457 return false;

1458}

1459

1460bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {

1461

1462

1481

1482

1519

1520 lex();

1521 }

1523 return error("expected a machine instruction");

1524 StringRef InstrName = Token.stringValue();

1525 if (PFS.Target.parseInstrName(InstrName, OpCode))

1526 return error(Twine("unknown machine instruction name '") + InstrName + "'");

1527 lex();

1528 return false;

1529}

1530

1531bool MIParser::parseNamedRegister(Register &Reg) {

1534 if (PFS.Target.getRegisterByName(Name, Reg))

1535 return error(Twine("unknown register name '") + Name + "'");

1536 return false;

1537}

1538

1539bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {

1542

1543

1544 Info = &PFS.getVRegInfoNamed(Name);

1545 return false;

1546}

1547

1548bool MIParser::parseVirtualRegister(VRegInfo *&Info) {

1550 return parseNamedVirtualRegister(Info);

1552 unsigned ID;

1554 return true;

1555 Info = &PFS.getVRegInfo(ID);

1556 return false;

1557}

1558

1559bool MIParser::parseRegister(Register &Reg, VRegInfo *&Info) {

1560 switch (Token.kind()) {

1562 Reg = 0;

1563 return false;

1565 return parseNamedRegister(Reg);

1568 if (parseVirtualRegister(Info))

1569 return true;

1571 return false;

1572

1573 default:

1575 }

1576}

1577

1578bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {

1580 return error("expected '_', register class, or register bank name");

1583

1584

1586 if (RC) {

1587 lex();

1588

1595 return error(Loc, Twine("conflicting register classes, previously: ") +

1597 }

1599 RegInfo.Explicit = true;

1600 return false;

1601

1604 return error(Loc, "register class specification on generic register");

1605 }

1607 }

1608

1609

1611 if (Name != "_") {

1612 RegBank = PFS.Target.getRegBank(Name);

1613 if (!RegBank)

1614 return error(Loc, "expected '_', register class, or register bank name");

1615 }

1616

1617 lex();

1618

1624 if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)

1625 return error(Loc, "conflicting generic register banks");

1626 RegInfo.D.RegBank = RegBank;

1627 RegInfo.Explicit = true;

1628 return false;

1629

1631 return error(Loc, "register bank specification on normal register");

1632 }

1634}

1635

1636bool MIParser::parseRegisterFlag(unsigned &Flags) {

1637 const unsigned OldFlags = Flags;

1638 switch (Token.kind()) {

1641 break;

1644 break;

1647 break;

1650 break;

1653 break;

1656 break;

1659 break;

1662 break;

1665 break;

1668 break;

1669 default:

1670 llvm_unreachable("The current token should be a register flag");

1671 }

1672 if (OldFlags == Flags)

1673

1674

1675 return error("duplicate '" + Token.stringValue() + "' register flag");

1676 lex();

1677 return false;

1678}

1679

1680bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {

1682 lex();

1684 return error("expected a subregister index after '.'");

1685 auto Name = Token.stringValue();

1686 SubReg = PFS.Target.getSubRegIndex(Name);

1688 return error(Twine("use of unknown subregister index '") + Name + "'");

1689 lex();

1690 return false;

1691}

1692

1693bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {

1695 return true;

1697 return error("expected an integer literal after 'tied-def'");

1699 return true;

1700 lex();

1702 return true;

1703 return false;

1704}

1705

1709 for (unsigned I = 0, E = Operands.size(); I != E; ++I) {

1711 continue;

1712

1713

1714 unsigned DefIdx = *Operands[I].TiedDefIdx;

1715 if (DefIdx >= E)

1717 Twine("use of invalid tied-def operand index '" +

1718 Twine(DefIdx) + "'; instruction has only ") +

1719 Twine(E) + " operands");

1720 const auto &DefOperand = Operands[DefIdx].Operand;

1721 if (!DefOperand.isReg() || !DefOperand.isDef())

1722

1724 Twine("use of invalid tied-def operand index '") +

1725 Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +

1726 " isn't a defined register");

1727

1728 for (const auto &TiedPair : TiedRegisterPairs) {

1729 if (TiedPair.first == DefIdx)

1731 Twine("the tied-def operand #") + Twine(DefIdx) +

1732 " is already tied with another register operand");

1733 }

1734 TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));

1735 }

1736

1737

1738 for (const auto &TiedPair : TiedRegisterPairs)

1739 MI.tieOperands(TiedPair.first, TiedPair.second);

1740 return false;

1741}

1742

1743bool MIParser::parseRegisterOperand(MachineOperand &Dest,

1744 std::optional &TiedDefIdx,

1745 bool IsDef) {

1747 while (Token.isRegisterFlag()) {

1748 if (parseRegisterFlag(Flags))

1749 return true;

1750 }

1751 if (!Token.isRegister())

1752 return error("expected a register after register flags");

1755 if (parseRegister(Reg, RegInfo))

1756 return true;

1757 lex();

1758 unsigned SubReg = 0;

1760 if (parseSubRegisterIndex(SubReg))

1761 return true;

1762 if ( Reg .isVirtual())

1763 return error("subregister index expects a virtual register");

1764 }

1766 if ( Reg .isVirtual())

1767 return error("register class specification expects a virtual register");

1768 lex();

1769 if (parseRegisterClassOrBank(*RegInfo))

1770 return true;

1771 }

1775 unsigned Idx;

1776 if (!parseRegisterTiedDefIndex(Idx))

1777 TiedDefIdx = Idx;

1778 else {

1779

1781 if (parseLowLevelType(Token.location(), Ty))

1782 return error("expected tied-def or low-level type after '('");

1783

1785 return true;

1786

1787 if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)

1788 return error("inconsistent type for generic virtual register");

1789

1790 MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));

1791 MRI.setType(Reg, Ty);

1792 MRI.noteNewVirtualRegister(Reg);

1793 }

1794 }

1796

1797 if ( Reg .isVirtual())

1798 return error("unexpected type on physical register");

1799

1801 if (parseLowLevelType(Token.location(), Ty))

1802 return true;

1803

1805 return true;

1806

1807 if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)

1808 return error("inconsistent type for generic virtual register");

1809

1810 MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));

1811 MRI.setType(Reg, Ty);

1812 } else if (Reg.isVirtual()) {

1813

1814

1815

1818 return error("generic virtual registers must have a type");

1819 }

1820

1823 return error("cannot have a killed def operand");

1824 } else {

1826 return error("cannot have a dead use operand");

1827 }

1828

1834

1835 return false;

1836}

1837

1838bool MIParser::parseImmediateOperand(MachineOperand &Dest) {

1840 const APSInt &Int = Token.integerValue();

1841 if (auto SImm = Int.trySExtValue(); Int.isSigned() && SImm.has_value())

1843 else if (auto UImm = Int.tryZExtValue(); Int .isSigned() && UImm.has_value())

1845 else

1846 return error("integer literal is too large to be an immediate operand");

1847 lex();

1848 return false;

1849}

1850

1851bool MIParser::parseTargetImmMnemonic(const unsigned OpCode,

1852 const unsigned OpIdx,

1856 auto Loc = Token.location();

1857 size_t Len = 1;

1858 lex();

1859

1860

1862 Len += Token.range().size();

1863 lex();

1864 }

1865

1869 else {

1871 Src = StringRef(Loc, Len + Token.stringValue().size());

1872 }

1873 int64_t Val;

1876 -> bool { return error(Loc, Msg); }))

1877 return true;

1878

1881 lex();

1882 return false;

1883}

1884

1888 auto Source = StringValue.str();

1892 if ()

1893 return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());

1894 return false;

1895}

1896

1899 return ::parseIRConstant(

1900 Loc, StringValue, PFS, C,

1902 return error(Loc, Msg);

1903 });

1904}

1905

1908 return true;

1909 lex();

1910 return false;

1911}

1912

1913

1915 return Size != 0 && isUInt<16>(Size);

1916}

1917

1919 return NumElts != 0 && isUInt<16>(NumElts);

1920}

1921

1923 return isUInt<24>(AddrSpace);

1924}

1925

1927 if (Token.range().front() == 's' || Token.range().front() == 'p') {

1930 return error("expected integers after 's'/'p' type character");

1931 }

1932

1933 if (Token.range().front() == 's') {

1934 auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();

1935 if (ScalarSize) {

1937 return error("invalid size for scalar type");

1939 } else {

1941 }

1942 lex();

1943 return false;

1944 } else if (Token.range().front() == 'p') {

1948 return error("invalid address space number");

1949

1951 lex();

1952 return false;

1953 }

1954

1955

1957 return error(Loc, "expected sN, pA, , , , "

1958 "or for GlobalISel type");

1959 lex();

1960

1961 bool HasVScale =

1963 if (HasVScale) {

1964 lex();

1966 return error("expected or ");

1967 lex();

1968 }

1969

1970 auto GetError = [this, &HasVScale, Loc]() {

1971 if (HasVScale)

1973 Loc, "expected or for vector type");

1974 return error(Loc, "expected or for vector type");

1975 };

1976

1978 return GetError();

1979 uint64_t NumElements = Token.integerValue().getZExtValue();

1981 return error("invalid number of vector elements");

1982

1983 lex();

1984

1986 return GetError();

1987 lex();

1988

1989 if (Token.range().front() != 's' && Token.range().front() != 'p')

1990 return GetError();

1991

1994 return error("expected integers after 's'/'p' type character");

1995

1996 if (Token.range().front() == 's') {

1997 auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();

1999 return error("invalid size for scalar element in vector");

2001 } else if (Token.range().front() == 'p') {

2005 return error("invalid address space number");

2006

2008 } else

2009 return GetError();

2010 lex();

2011

2013 return GetError();

2014

2015 lex();

2016

2018 return false;

2019}

2020

2021bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {

2023 StringRef TypeStr = Token.range();

2024 if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&

2025 TypeStr.front() != 'p')

2027 "a typed immediate operand should start with one of 'i', 's', or 'p'");

2030 return error("expected integers after 'i'/'s'/'p' type character");

2031

2032 auto Loc = Token.location();

2033 lex();

2036 !(Token.range() == "true" || Token.range() == "false"))

2037 return error("expected an integer literal");

2038 }

2041 return true;

2043 return false;

2044}

2045

2046bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {

2047 auto Loc = Token.location();

2048 lex();

2051 return error("expected a floating point literal");

2054 return true;

2056 return false;

2057}

2058

2062 assert(S[0] == '0' && tolower(S[1]) == 'x');

2063

2064 if (!isxdigit(S[2]))

2065 return true;

2067 APInt A(V.size()*4, V, 16);

2068

2069

2070

2071 unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();

2073 return false;

2074}

2075

2079 const uint64_t Limit = uint64_t(std::numeric_limits::max()) + 1;

2081 if (Val64 == Limit)

2082 return ErrCB(Token.location(), "expected 32-bit integer (too large)");

2083 Result = Val64;

2084 return false;

2085 }

2089 return true;

2090 if (A.getBitWidth() > 32)

2091 return ErrCB(Token.location(), "expected 32-bit integer (too large)");

2092 Result = A.getZExtValue();

2093 return false;

2094 }

2095 return true;

2096}

2097

2098bool MIParser::getUnsigned(unsigned &Result) {

2099 return ::getUnsigned(

2101 return error(Loc, Msg);

2102 });

2103}

2104

2110 return true;

2111 auto MBBInfo = PFS.MBBSlots.find(Number);

2112 if (MBBInfo == PFS.MBBSlots.end())

2113 return error(Twine("use of undefined machine basic block #") +

2115 MBB = MBBInfo->second;

2116

2117

2118 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())

2120 " isn't '" + Token.stringValue() + "'");

2121 return false;

2122}

2123

2124bool MIParser::parseMBBOperand(MachineOperand &Dest) {

2127 return true;

2129 lex();

2130 return false;

2131}

2132

2133bool MIParser::parseStackFrameIndex(int &FI) {

2135 unsigned ID;

2137 return true;

2138 auto ObjectInfo = PFS.StackObjectSlots.find(ID);

2139 if (ObjectInfo == PFS.StackObjectSlots.end())

2140 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +

2141 "'");

2143 if (const auto *Alloca =

2144 MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))

2145 Name = Alloca->getName();

2146 if (!Token.stringValue().empty() && Token.stringValue() != Name)

2147 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +

2148 "' isn't '" + Token.stringValue() + "'");

2149 lex();

2150 FI = ObjectInfo->second;

2151 return false;

2152}

2153

2154bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {

2155 int FI;

2156 if (parseStackFrameIndex(FI))

2157 return true;

2159 return false;

2160}

2161

2162bool MIParser::parseFixedStackFrameIndex(int &FI) {

2164 unsigned ID;

2166 return true;

2167 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);

2168 if (ObjectInfo == PFS.FixedStackObjectSlots.end())

2169 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +

2171 lex();

2172 FI = ObjectInfo->second;

2173 return false;

2174}

2175

2176bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {

2177 int FI;

2178 if (parseFixedStackFrameIndex(FI))

2179 return true;

2181 return false;

2182}

2183

2187 switch (Token.kind()) {

2190 GV = M->getNamedValue(Token.stringValue());

2191 if (!GV)

2192 return ErrCB(Token.location(), Twine("use of undefined global value '") +

2193 Token.range() + "'");

2194 break;

2195 }

2197 unsigned GVIdx;

2199 return true;

2201 if (!GV)

2202 return ErrCB(Token.location(), Twine("use of undefined global value '@") +

2203 Twine(GVIdx) + "'");

2204 break;

2205 }

2206 default:

2207 llvm_unreachable("The current token should be a global value");

2208 }

2209 return false;

2210}

2211

2212bool MIParser::parseGlobalValue(GlobalValue *&GV) {

2213 return ::parseGlobalValue(

2214 Token, PFS, GV,

2216 return error(Loc, Msg);

2217 });

2218}

2219

2220bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {

2223 return true;

2224 lex();

2226 if (parseOperandsOffset(Dest))

2227 return true;

2228 return false;

2229}

2230

2231bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {

2233 unsigned ID;

2235 return true;

2237 if (ConstantInfo == PFS.ConstantPoolSlots.end())

2238 return error("use of undefined constant '%const." + Twine(ID) + "'");

2239 lex();

2241 if (parseOperandsOffset(Dest))

2242 return true;

2243 return false;

2244}

2245

2246bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {

2248 unsigned ID;

2250 return true;

2251 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);

2252 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())

2253 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");

2254 lex();

2256 return false;

2257}

2258

2259bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {

2261 const char *Symbol = MF.createExternalSymbolName(Token.stringValue());

2262 lex();

2264 if (parseOperandsOffset(Dest))

2265 return true;

2266 return false;

2267}

2268

2269bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {

2271 MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());

2272 lex();

2274 if (parseOperandsOffset(Dest))

2275 return true;

2276 return false;

2277}

2278

2279bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {

2282 unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());

2283 if (SubRegIndex == 0)

2284 return error(Twine("unknown subregister index '") + Name + "'");

2285 lex();

2287 return false;

2288}

2289

2290bool MIParser::parseMDNode(MDNode *&Node) {

2292

2293 auto Loc = Token.location();

2294 lex();

2296 return error("expected metadata id after '!'");

2297 unsigned ID;

2299 return true;

2300 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);

2301 if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {

2302 NodeInfo = PFS.MachineMetadataNodes.find(ID);

2303 if (NodeInfo == PFS.MachineMetadataNodes.end())

2304 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");

2305 }

2306 lex();

2307 Node = NodeInfo->second.get();

2308 return false;

2309}

2310

2311bool MIParser::parseDIExpression(MDNode *&Expr) {

2312 unsigned Read;

2314 CurrentSource, Read, Error, *PFS.MF.getFunction().getParent(),

2315 &PFS.IRSlots);

2316 CurrentSource = CurrentSource.substr(Read);

2317 lex();

2318 if (!Expr)

2320 return false;

2321}

2322

2323bool MIParser::parseDILocation(MDNode *&Loc) {

2325 lex();

2326

2327 bool HaveLine = false;

2328 unsigned Line = 0;

2329 unsigned Column = 0;

2331 MDNode *InlinedAt = nullptr;

2332 bool ImplicitCode = false;

2333

2335 return true;

2336

2338 do {

2340 if (Token.stringValue() == "line") {

2341 lex();

2343 return true;

2345 Token.integerValue().isSigned())

2346 return error("expected unsigned integer");

2347 Line = Token.integerValue().getZExtValue();

2348 HaveLine = true;

2349 lex();

2350 continue;

2351 }

2352 if (Token.stringValue() == "column") {

2353 lex();

2355 return true;

2357 Token.integerValue().isSigned())

2358 return error("expected unsigned integer");

2359 Column = Token.integerValue().getZExtValue();

2360 lex();

2361 continue;

2362 }

2363 if (Token.stringValue() == "scope") {

2364 lex();

2366 return true;

2368 return error("expected metadata node");

2369 if (!isa(Scope))

2370 return error("expected DIScope node");

2371 continue;

2372 }

2373 if (Token.stringValue() == "inlinedAt") {

2374 lex();

2376 return true;

2379 return true;

2381 if (parseDILocation(InlinedAt))

2382 return true;

2383 } else

2384 return error("expected metadata node");

2385 if (!isa(InlinedAt))

2386 return error("expected DILocation node");

2387 continue;

2388 }

2389 if (Token.stringValue() == "isImplicitCode") {

2390 lex();

2392 return true;

2394 return error("expected true/false");

2395

2396

2397

2398 if (Token.stringValue() == "true")

2399 ImplicitCode = true;

2400 else if (Token.stringValue() == "false")

2401 ImplicitCode = false;

2402 else

2403 return error("expected true/false");

2404 lex();

2405 continue;

2406 }

2407 }

2408 return error(Twine("invalid DILocation argument '") +

2409 Token.stringValue() + "'");

2411 }

2412

2414 return true;

2415

2416 if (!HaveLine)

2417 return error("DILocation requires line number");

2418 if (!Scope)

2419 return error("DILocation requires a scope");

2420

2421 Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,

2422 InlinedAt, ImplicitCode);

2423 return false;

2424}

2425

2426bool MIParser::parseMetadataOperand(MachineOperand &Dest) {

2430 return true;

2432 if (parseDIExpression(Node))

2433 return true;

2434 }

2436 return false;

2437}

2438

2439bool MIParser::parseCFIOffset(int &Offset) {

2441 return error("expected a cfi offset");

2442 if (Token.integerValue().getSignificantBits() > 32)

2443 return error("expected a 32 bit integer (the cfi offset is too large)");

2444 Offset = (int)Token.integerValue().getExtValue();

2445 lex();

2446 return false;

2447}

2448

2449bool MIParser::parseCFIRegister(Register &Reg) {

2451 return error("expected a cfi register");

2453 if (parseNamedRegister(LLVMReg))

2454 return true;

2455 const auto *TRI = MF.getSubtarget().getRegisterInfo();

2456 assert(TRI && "Expected target register info");

2457 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);

2458 if (DwarfReg < 0)

2459 return error("invalid DWARF register");

2461 lex();

2462 return false;

2463}

2464

2465bool MIParser::parseCFIAddressSpace(unsigned &AddressSpace) {

2467 return error("expected a cfi address space literal");

2468 if (Token.integerValue().isSigned())

2469 return error("expected an unsigned integer (cfi address space)");

2470 AddressSpace = Token.integerValue().getZExtValue();

2471 lex();

2472 return false;

2473}

2474

2475bool MIParser::parseCFIEscapeValues(std::string &Values) {

2476 do {

2478 return error("expected a hexadecimal literal");

2481 return true;

2482 if (Value > UINT8_MAX)

2483 return error("expected a 8-bit integer (too large)");

2484 Values.push_back(static_cast<uint8_t>(Value));

2485 lex();

2487 return false;

2488}

2489

2490bool MIParser::parseCFIOperand(MachineOperand &Dest) {

2491 auto Kind = Token.kind();

2492 lex();

2496 unsigned CFIIndex;

2497 switch (Kind) {

2499 if (parseCFIRegister(Reg))

2500 return true;

2502 break;

2504 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2505 parseCFIOffset(Offset))

2506 return true;

2507 CFIIndex =

2509 break;

2511 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2512 parseCFIOffset(Offset))

2513 return true;

2514 CFIIndex = MF.addFrameInst(

2516 break;

2518 if (parseCFIRegister(Reg))

2519 return true;

2520 CFIIndex =

2522 break;

2524 if (parseCFIOffset(Offset))

2525 return true;

2526 CFIIndex =

2528 break;

2530 if (parseCFIOffset(Offset))

2531 return true;

2532 CFIIndex = MF.addFrameInst(

2534 break;

2536 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2537 parseCFIOffset(Offset))

2538 return true;

2539 CFIIndex =

2541 break;

2543 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2546 return true;

2549 break;

2552 break;

2554 if (parseCFIRegister(Reg))

2555 return true;

2557 break;

2560 break;

2562 if (parseCFIRegister(Reg))

2563 return true;

2565 break;

2568 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2569 parseCFIRegister(Reg2))

2570 return true;

2571

2572 CFIIndex =

2574 break;

2575 }

2578 break;

2581 break;

2583 CFIIndex =

2585 break;

2587 std::string Values;

2588 if (parseCFIEscapeValues(Values))

2589 return true;

2591 break;

2592 }

2593 default:

2594

2595 llvm_unreachable("The current token should be a cfi operand");

2596 }

2598 return false;

2599}

2600

2602 switch (Token.kind()) {

2604 BB = dyn_cast_or_null(

2605 F.getValueSymbolTable()->lookup(Token.stringValue()));

2606 if (!BB)

2607 return error(Twine("use of undefined IR block '") + Token.range() + "'");

2608 break;

2609 }

2611 unsigned SlotNumber = 0;

2613 return true;

2614 BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));

2615 if (!BB)

2616 return error(Twine("use of undefined IR block '%ir-block.") +

2617 Twine(SlotNumber) + "'");

2618 break;

2619 }

2620 default:

2621 llvm_unreachable("The current token should be an IR block reference");

2622 }

2623 return false;

2624}

2625

2626bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {

2628 lex();

2630 return true;

2633 return error("expected a global value");

2636 return true;

2637 auto *F = dyn_cast(GV);

2638 if ()

2639 return error("expected an IR function reference");

2640 lex();

2642 return true;

2645 return error("expected an IR block reference");

2646 if (parseIRBlock(BB, *F))

2647 return true;

2648 lex();

2650 return true;

2652 if (parseOperandsOffset(Dest))

2653 return true;

2654 return false;

2655}

2656

2657bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {

2659 lex();

2661 return error("expected syntax intrinsic(@llvm.whatever)");

2662

2664 return error("expected syntax intrinsic(@llvm.whatever)");

2665

2666 std::string Name = std::string(Token.stringValue());

2667 lex();

2668

2670 return error("expected ')' to terminate intrinsic name");

2671

2672

2673

2678

2680 return error("unknown intrinsic name");

2682

2683 return false;

2684}

2685

2686bool MIParser::parsePredicateOperand(MachineOperand &Dest) {

2689 lex();

2690

2692 return error("expected syntax intpred(whatever) or floatpred(whatever");

2693

2695 return error("whatever");

2696

2698 if (IsFloat) {

2718 return error("invalid floating-point predicate");

2719 } else {

2733 return error("invalid integer predicate");

2734 }

2735

2736 lex();

2739 return error("predicate should be terminated by ')'.");

2740

2741 return false;

2742}

2743

2744bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {

2746

2747 lex();

2749 return error("expected syntax shufflemask(, ...)");

2750

2752 do {

2756 const APSInt &Int = Token.integerValue();

2758 } else

2759 return error("expected integer constant");

2760

2761 lex();

2763

2765 return error("shufflemask should be terminated by ')'.");

2766

2767 ArrayRef MaskAlloc = MF.allocateShuffleMask(ShufMask);

2769 return false;

2770}

2771

2772bool MIParser::parseDbgInstrRefOperand(MachineOperand &Dest) {

2774

2775 lex();

2777 return error("expected syntax dbg-instr-ref(, )");

2778

2780 return error("expected unsigned integer for instruction index");

2781 uint64_t InstrIdx = Token.integerValue().getZExtValue();

2782 assert(InstrIdx <= std::numeric_limits::max() &&

2783 "Instruction reference's instruction index is too large");

2784 lex();

2785

2787 return error("expected syntax dbg-instr-ref(, )");

2788

2790 return error("expected unsigned integer for operand index");

2791 uint64_t OpIdx = Token.integerValue().getZExtValue();

2792 assert(OpIdx <= std::numeric_limits::max() &&

2793 "Instruction reference's operand index is too large");

2794 lex();

2795

2797 return error("expected syntax dbg-instr-ref(, )");

2798

2800 return false;

2801}

2802

2803bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {

2805 lex();

2807 return true;

2809 return error("expected the name of the target index");

2811 if (PFS.Target.getTargetIndex(Token.stringValue(), Index))

2812 return error("use of undefined target index '" + Token.stringValue() + "'");

2813 lex();

2815 return true;

2817 if (parseOperandsOffset(Dest))

2818 return true;

2819 return false;

2820}

2821

2822bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {

2823 assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");

2824 lex();

2826 return true;

2827

2829 do {

2832 return error("expected a named register");

2834 if (parseNamedRegister(Reg))

2835 return true;

2836 lex();

2838 }

2839

2840

2842

2844 return true;

2846 return false;

2847}

2848

2849bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {

2852 lex();

2854 return true;

2855 while (true) {

2857 return error("expected a named register");

2859 if (parseNamedRegister(Reg))

2860 return true;

2861 lex();

2863

2865 break;

2866 lex();

2867 }

2869 return true;

2871 return false;

2872}

2873

2874bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,

2876 std::optional &TiedDefIdx) {

2877 switch (Token.kind()) {

2892 return parseRegisterOperand(Dest, TiedDefIdx);

2894 return parseImmediateOperand(Dest);

2902 return parseFPImmediateOperand(Dest);

2904 return parseMBBOperand(Dest);

2906 return parseStackObjectOperand(Dest);

2908 return parseFixedStackObjectOperand(Dest);

2911 return parseGlobalAddressOperand(Dest);

2913 return parseConstantPoolIndexOperand(Dest);

2915 return parseJumpTableIndexOperand(Dest);

2917 return parseExternalSymbolOperand(Dest);

2919 return parseMCSymbolOperand(Dest);

2921 return parseSubRegisterIndexOperand(Dest);

2924 return parseMetadataOperand(Dest);

2942 return parseCFIOperand(Dest);

2944 return parseBlockAddressOperand(Dest);

2946 return parseIntrinsicOperand(Dest);

2948 return parseTargetIndexOperand(Dest);

2950 return parseLiveoutRegisterMaskOperand(Dest);

2953 return parsePredicateOperand(Dest);

2955 return parseShuffleMaskOperand(Dest);

2957 return parseDbgInstrRefOperand(Dest);

2959 return true;

2961 if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {

2963 lex();

2964 break;

2965 } else if (Token.stringValue() == "CustomRegMask") {

2966 return parseCustomRegisterMaskOperand(Dest);

2967 } else

2968 return parseTypedImmediateOperand(Dest);

2970 const auto *TII = MF.getSubtarget().getInstrInfo();

2971 if (const auto *Formatter = TII->getMIRFormatter()) {

2972 return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);

2973 }

2974 [[fallthrough]];

2975 }

2976 default:

2977

2978 return error("expected a machine operand");

2979 }

2980 return false;

2981}

2982

2983bool MIParser::parseMachineOperandAndTargetFlags(

2984 const unsigned OpCode, const unsigned OpIdx, MachineOperand &Dest,

2985 std::optional &TiedDefIdx) {

2986 unsigned TF = 0;

2987 bool HasTargetFlags = false;

2989 HasTargetFlags = true;

2990 lex();

2992 return true;

2994 return error("expected the name of the target flag");

2995 if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {

2996 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))

2997 return error("use of undefined target flag '" + Token.stringValue() +

2998 "'");

2999 }

3000 lex();

3002 lex();

3004 return error("expected the name of the target flag");

3005 unsigned BitFlag = 0;

3006 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))

3007 return error("use of undefined target flag '" + Token.stringValue() +

3008 "'");

3009

3010 TF |= BitFlag;

3011 lex();

3012 }

3014 return true;

3015 }

3016 auto Loc = Token.location();

3017 if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))

3018 return true;

3019 if (!HasTargetFlags)

3020 return false;

3021 if (Dest.isReg())

3022 return error(Loc, "register operands can't have target flags");

3024 return false;

3025}

3026

3027bool MIParser::parseOffset(int64_t &Offset) {

3029 return false;

3032 lex();

3034 return error("expected an integer literal after '" + Sign + "'");

3035 if (Token.integerValue().getSignificantBits() > 64)

3036 return error("expected 64-bit integer (too large)");

3037 Offset = Token.integerValue().getExtValue();

3038 if (IsNegative)

3040 lex();

3041 return false;

3042}

3043

3044bool MIParser::parseIRBlockAddressTaken(BasicBlock *&BB) {

3046 lex();

3048 return error("expected basic block after 'ir_block_address_taken'");

3049

3050 if (parseIRBlock(BB, MF.getFunction()))

3051 return true;

3052

3053 lex();

3054 return false;

3055}

3056

3057bool MIParser::parseAlignment(uint64_t &Alignment) {

3059 lex();

3061 return error("expected an integer literal after 'align'");

3062 if (getUint64(Alignment))

3063 return true;

3064 lex();

3065

3067 return error("expected a power-of-2 literal after 'align'");

3068

3069 return false;

3070}

3071

3072bool MIParser::parseAddrspace(unsigned &Addrspace) {

3074 lex();

3076 return error("expected an integer literal after 'addrspace'");

3078 return true;

3079 lex();

3080 return false;

3081}

3082

3085 if (parseOffset(Offset))

3086 return true;

3088 return false;

3089}

3090

3093 switch (Token.kind()) {

3096 break;

3097 }

3099 unsigned SlotNumber = 0;

3100 if (getUnsigned(Token, SlotNumber, ErrCB))

3101 return true;

3103 break;

3104 }

3109 return true;

3110 V = GV;

3111 break;

3112 }

3116 return true;

3117 V = C;

3118 break;

3119 }

3121 V = nullptr;

3122 return false;

3123 default:

3124 llvm_unreachable("The current token should be an IR block reference");

3125 }

3126 if (!V)

3127 return ErrCB(Token.location(), Twine("use of undefined IR value '") + Token.range() + "'");

3128 return false;

3129}

3130

3131bool MIParser::parseIRValue(const Value *&V) {

3132 return ::parseIRValue(

3134 return error(Loc, Msg);

3135 });

3136}

3137

3138bool MIParser::getUint64(uint64_t &Result) {

3139 if (Token.hasIntegerValue()) {

3140 if (Token.integerValue().getActiveBits() > 64)

3141 return error("expected 64-bit integer (too large)");

3142 Result = Token.integerValue().getZExtValue();

3143 return false;

3144 }

3148 return true;

3149 if (A.getBitWidth() > 64)

3150 return error("expected 64-bit integer (too large)");

3151 Result = A.getZExtValue();

3152 return false;

3153 }

3154 return true;

3155}

3156

3157bool MIParser::getHexUint(APInt &Result) {

3158 return ::getHexUint(Token, Result);

3159}

3160

3162 const auto OldFlags = Flags;

3163 switch (Token.kind()) {

3166 break;

3169 break;

3172 break;

3175 break;

3178 if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))

3179 return error("use of undefined target MMO flag '" + Token.stringValue() +

3180 "'");

3182 break;

3183 }

3184 default:

3185 llvm_unreachable("The current token should be a memory operand flag");

3186 }

3187 if (OldFlags == Flags)

3188

3189

3190 return error("duplicate '" + Token.stringValue() + "' memory operand flag");

3191 lex();

3192 return false;

3193}

3194

3195bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {

3196 switch (Token.kind()) {

3198 PSV = MF.getPSVManager().getStack();

3199 break;

3201 PSV = MF.getPSVManager().getGOT();

3202 break;

3204 PSV = MF.getPSVManager().getJumpTable();

3205 break;

3207 PSV = MF.getPSVManager().getConstantPool();

3208 break;

3210 int FI;

3211 if (parseFixedStackFrameIndex(FI))

3212 return true;

3213 PSV = MF.getPSVManager().getFixedStack(FI);

3214

3215 return false;

3216 }

3218 int FI;

3219 if (parseStackFrameIndex(FI))

3220 return true;

3221 PSV = MF.getPSVManager().getFixedStack(FI);

3222

3223 return false;

3224 }

3226 lex();

3227 switch (Token.kind()) {

3232 return true;

3233 PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);

3234 break;

3235 }

3237 PSV = MF.getPSVManager().getExternalSymbolCallEntry(

3238 MF.createExternalSymbolName(Token.stringValue()));

3239 break;

3240 default:

3242 "expected a global value or an external symbol after 'call-entry'");

3243 }

3244 break;

3246 lex();

3247 const auto *TII = MF.getSubtarget().getInstrInfo();

3248 if (const auto *Formatter = TII->getMIRFormatter()) {

3249 if (Formatter->parseCustomPseudoSourceValue(

3250 Token.stringValue(), MF, PFS, PSV,

3252 return error(Loc, Msg);

3253 }))

3254 return true;

3255 } else

3256 return error("unable to parse target custom pseudo source value");

3257 break;

3258 }

3259 default:

3260 llvm_unreachable("The current token should be pseudo source value");

3261 }

3262 lex();

3263 return false;

3264}

3265

3272 if (parseMemoryPseudoSourceValue(PSV))

3273 return true;

3275 if (parseOffset(Offset))

3276 return true;

3278 return false;

3279 }

3285 return error("expected an IR value reference");

3286 const Value *V = nullptr;

3288 return true;

3289 if (V && ->getType()->isPointerTy())

3290 return error("expected a pointer IR value");

3291 lex();

3293 if (parseOffset(Offset))

3294 return true;

3296 return false;

3297}

3298

3299bool MIParser::parseOptionalScope(LLVMContext &Context,

3302 if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {

3303 lex();

3305 return error("expected '(' in syncscope");

3306

3307 std::string SSN;

3308 if (parseStringConstant(SSN))

3309 return true;

3310

3313 return error("expected ')' in syncscope");

3314 }

3315

3316 return false;

3317}

3318

3319bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {

3322 return false;

3323

3332

3334 lex();

3335 return false;

3336 }

3337

3338 return error("expected an atomic scope, ordering or a size specification");

3339}

3340

3341bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {

3343 return true;

3345 while (Token.isMemoryOperandFlag()) {

3346 if (parseMemoryOperandFlag(Flags))

3347 return true;

3348 }

3350 (Token.stringValue() != "load" && Token.stringValue() != "store"))

3351 return error("expected 'load' or 'store' memory operation");

3352 if (Token.stringValue() == "load")

3354 else

3356 lex();

3357

3358

3361 lex();

3362 }

3363

3364

3366 if (parseOptionalScope(MF.getFunction().getContext(), SSID))

3367 return true;

3368

3369

3371 if (parseOptionalAtomicOrdering(Order))

3372 return true;

3373

3374 if (parseOptionalAtomicOrdering(FailureOrder))

3375 return true;

3376

3380 return error("expected memory LLT, the size integer literal or 'unknown-size' after "

3381 "memory operation");

3382

3386 if (getUint64(Size))

3387 return true;

3388

3389

3391 lex();

3393 lex();

3394 } else {

3396 return true;

3397 if (parseLowLevelType(Token.location(), MemoryType))

3398 return true;

3400 return true;

3401 }

3402

3405 const char *Word =

3408 ? "on"

3410 if (Token.stringValue() != Word)

3412 lex();

3413

3414 if (parseMachinePointerInfo(Ptr))

3415 return true;

3416 }

3420 : 1;

3424 switch (Token.kind()) {

3426

3429 return true;

3430 if (Ptr.Offset & (Alignment - 1)) {

3431

3432

3433

3434

3435 return error("specified alignment is more aligned than offset");

3436 }

3437 BaseAlignment = Alignment;

3438 break;

3439 }

3441

3443 return true;

3444 break;

3446 if (parseAddrspace(Ptr.AddrSpace))

3447 return true;

3448 break;

3450 lex();

3452 return true;

3453 break;

3455 lex();

3457 return true;

3458 break;

3460 lex();

3462 return true;

3463 break;

3465 lex();

3467 return true;

3468 break;

3469

3470 default:

3471 return error("expected 'align' or '!tbaa' or '!alias.scope' or "

3472 "'!noalias' or '!range'");

3473 }

3474 }

3476 return true;

3477 Dest = MF.getMachineMemOperand(Ptr, Flags, MemoryType, Align(BaseAlignment),

3478 AAInfo, Range, SSID, Order, FailureOrder);

3479 return false;

3480}

3481

3482bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {

3485 "Invalid token for a pre- post-instruction symbol!");

3486 lex();

3488 return error("expected a symbol after 'pre-instr-symbol'");

3489 Symbol = getOrCreateMCSymbol(Token.stringValue());

3490 lex();

3493 return false;

3495 return error("expected ',' before the next machine operand");

3496 lex();

3497 return false;

3498}

3499

3500bool MIParser::parseHeapAllocMarker(MDNode *&Node) {

3502 "Invalid token for a heap alloc marker!");

3503 lex();

3505 return true;

3507 return error("expected a MDNode after 'heap-alloc-marker'");

3510 return false;

3512 return error("expected ',' before the next machine operand");

3513 lex();

3514 return false;

3515}

3516

3517bool MIParser::parsePCSections(MDNode *&Node) {

3519 "Invalid token for a PC sections!");

3520 lex();

3522 return true;

3524 return error("expected a MDNode after 'pcsections'");

3527 return false;

3529 return error("expected ',' before the next machine operand");

3530 lex();

3531 return false;

3532}

3533

3537 ModuleSlotTracker MST(F.getParent(), false);

3539 for (const auto &BB : F) {

3541 continue;

3543 if (Slot == -1)

3544 continue;

3545 Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));

3546 }

3547}

3548

3550 unsigned Slot,

3552 return Slots2BasicBlocks.lookup(Slot);

3553}

3554

3555const BasicBlock *MIParser::getIRBlock(unsigned Slot) {

3556 if (Slots2BasicBlocks.empty())

3559}

3560

3561const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {

3562 if (&F == &MF.getFunction())

3563 return getIRBlock(Slot);

3567}

3568

3570

3571

3572

3573

3574

3575 return MF.getContext().getOrCreateSymbol(Name);

3576}

3577

3578bool MIParser::parseStringConstant(std::string &Result) {

3580 return error("expected string constant");

3581 Result = std::string(Token.stringValue());

3582 lex();

3583 return false;

3584}

3585

3589 return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);

3590}

3591

3594 return MIParser(PFS, Error, Src).parseBasicBlocks();

3595}

3596

3600 return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);

3601}

3602

3606 return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);

3607}

3608

3612 return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);

3613}

3614

3618 return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);

3619}

3620

3624 return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);

3625}

3626

3629 return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);

3630}

3631

3634 return MIParser(PFS, Error, Src, SrcRange).parseMachineMetadata();

3635}

3636

3642 ErrorCallback(Loc, Msg);

3643 });

3644 V = nullptr;

3645

3646 return ::parseIRValue(Token, PFS, V, ErrorCallback);

3647}

unsigned const MachineRegisterInfo * MRI

This file defines the StringMap class.

This file implements a class to represent arbitrary precision integral constant values and operations...

This file implements the APSInt class, which is a simple class that represents an arbitrary sized int...

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Atomic ordering constants.

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

Analysis containing CSE Info

This file contains the declarations for the subclasses of Constant, which represent the different fla...

static Error parseAlignment(StringRef Str, Align &Alignment, StringRef Name, bool AllowZero=false)

Attempts to parse an alignment component of a specification.

Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx

This file defines the DenseMap class.

const HexagonInstrInfo * TII

Module.h This file contains the declarations for the Module class.

A common definition of LaneBitmask for use in TableGen and CodeGen.

Implement a low-level type suitable for MachineInstr level instruction selection.

static const char * printImplicitRegisterFlag(const MachineOperand &MO)

static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)

static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)

static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)

static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)

Creates the mapping from slot numbers to function's unnamed IR values.

static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)

static bool verifyScalarSize(uint64_t Size)

static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)

static bool getHexUint(const MIToken &Token, APInt &Result)

static bool verifyVectorElementCount(uint64_t NumElts)

static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)

static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)

function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType

static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)

Return true if the parsed machine operands contain a given machine operand.

static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)

static bool verifyAddrSpace(uint64_t AddrSpace)

mir Rename Register Operands

unsigned const TargetRegisterInfo * TRI

ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)

Parse Input that contains metadata.

This file defines the SmallVector class.

This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...

Class for arbitrary precision integers.

uint64_t getZExtValue() const

Get zero extended value.

uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const

If this value is smaller than the specified limit, return it, otherwise return the limit value.

An arbitrary precision integer that knows its signedness.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

size_t size() const

size - Get the array size.

LLVM Basic Block Representation.

static BlockAddress * get(Function *F, BasicBlock *BB)

Return a BlockAddress for the specified function and basic block.

static BranchProbability getRaw(uint32_t N)

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

@ FCMP_OEQ

0 0 0 1 True if ordered and equal

@ FCMP_TRUE

1 1 1 1 Always true (always folded)

@ ICMP_SLT

signed less than

@ ICMP_SLE

signed less or equal

@ FCMP_OLT

0 1 0 0 True if ordered and less than

@ FCMP_ULE

1 1 0 1 True if unordered, less than, or equal

@ FCMP_OGT

0 0 1 0 True if ordered and greater than

@ FCMP_OGE

0 0 1 1 True if ordered and greater than or equal

@ ICMP_UGE

unsigned greater or equal

@ ICMP_UGT

unsigned greater than

@ ICMP_SGT

signed greater than

@ FCMP_ULT

1 1 0 0 True if unordered or less than

@ FCMP_ONE

0 1 1 0 True if ordered and operands are unequal

@ FCMP_UEQ

1 0 0 1 True if unordered or equal

@ ICMP_ULT

unsigned less than

@ FCMP_UGT

1 0 1 0 True if unordered or greater than

@ FCMP_OLE

0 1 0 1 True if ordered and less than or equal

@ FCMP_ORD

0 1 1 1 True if ordered (no nans)

@ ICMP_SGE

signed greater or equal

@ FCMP_UNE

1 1 1 0 True if unordered or not equal

@ ICMP_ULE

unsigned less or equal

@ FCMP_UGE

1 0 1 1 True if unordered, greater than, or equal

@ FCMP_FALSE

0 0 0 0 Always false (always folded)

@ FCMP_UNO

1 0 0 0 True if unordered: isnan(X) | isnan(Y)

bool isFPPredicate() const

bool isIntPredicate() const

This is an important base class in LLVM.

This class represents an Operation in the Expression.

A parsed version of the target data layout string in and methods for querying it.

ValueT lookup(const_arg_type_t< KeyT > Val) const

lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...

std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)

static constexpr ElementCount get(ScalarTy MinVal, bool Scalable)

Lightweight error class with error context and mandatory checking.

ValueSymbolTable * getValueSymbolTable()

getSymbolTable() - Return the symbol table if any, otherwise nullptr.

Module * getParent()

Get the module that this global value is contained inside of...

ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override

Return an array that contains the direct target flag values and their names.

ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override

Return an array that contains the bitmask target flag values and their names.

static constexpr LLT vector(ElementCount EC, unsigned ScalarSizeInBits)

Get a low-level vector of some number of elements and element width.

static constexpr LLT scalar(unsigned SizeInBits)

Get a low-level scalar or aggregate "bag of bits".

static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)

Get a low-level pointer in the given address space.

static constexpr LLT token()

Get a low-level token; just a scalar with zero bits (or no size).

This is an important class for using LLVM in a threaded context.

SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)

getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID.

static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_def_cfa_register modifies a rule for computing CFA.

static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_undefined From now on the previous value of Register can't be restored anymore.

static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...

static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int64_t Offset, unsigned AddressSpace, SMLoc Loc)

.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...

static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2, SMLoc Loc={})

.cfi_register Previous value of Register1 is saved in register Register2.

static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})

.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.

static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})

.cfi_offset Previous value of Register is saved at offset Offset from CFA.

static MCCFIInstruction createNegateRAStateWithPC(MCSymbol *L, SMLoc Loc={})

.cfi_negate_ra_state_with_pc AArch64 negate RA state with PC.

static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc={})

.cfi_negate_ra_state AArch64 negate RA state.

static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc={})

.cfi_remember_state Save all current rules for all registers.

static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset, SMLoc Loc={})

.cfi_def_cfa_offset modifies a rule for computing CFA.

static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, SMLoc Loc={}, StringRef Comment="")

.cfi_escape Allows the user to add arbitrary bytes to the unwind info.

static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc={})

.cfi_window_save SPARC register window is saved.

static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment, SMLoc Loc={})

.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...

static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc={})

.cfi_restore_state Restore the previously saved state.

static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_same_value Current value of Register is the same as in the previous frame.

static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})

.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.

Describe properties that are true of each instruction in the target description file.

ArrayRef< MCPhysReg > implicit_defs() const

Return a list of registers that are potentially written by any instance of this machine instruction.

bool isCall() const

Return true if the instruction is a call.

ArrayRef< MCPhysReg > implicit_uses() const

Return a list of registers that are potentially read by any instance of this machine instruction.

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

void replaceAllUsesWith(Metadata *MD)

RAUW a temporary.

static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)

static MDString * get(LLVMContext &Context, StringRef Str)

static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)

Return a distinct node.

static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)

static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)

Return a temporary node.

MIRFormater - Interface to format MIR operand based on target.

virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx, StringRef Src, int64_t &Imm, ErrorCallbackType ErrorCallback) const

Implement target specific parsing of immediate mnemonics.

static bool parseIRValue(StringRef Src, MachineFunction &MF, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrorCallback)

Helper functions to parse IR value from MIR serialization format which will be useful for target spec...

void normalizeSuccProbs()

Normalize probabilities of all successors so that the sum of them becomes one.

void setAddressTakenIRBlock(BasicBlock *BB)

Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.

instr_iterator insert(instr_iterator I, MachineInstr *M)

Insert MI into the instruction list before I, possibly inside a bundle.

void setCallFrameSize(unsigned N)

Set the call frame size on entry to this basic block.

void setAlignment(Align A)

Set alignment of the basic block.

void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())

Add Succ as a successor of this MachineBasicBlock.

void setSectionID(MBBSectionID V)

Sets the section ID for this basic block.

void setIsInlineAsmBrIndirectTarget(bool V=true)

Indicates if this is the indirect dest of an INLINEASM_BR.

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

void setIsEHFuncletEntry(bool V=true)

Indicates if this is the entry block of an EH funclet.

bool isSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB is a successor of this block.

StringRef getName() const

Return the name of the corresponding LLVM basic block, or an empty string.

void setMachineBlockAddressTaken()

Set this block to indicate that its address is used as something other than the target of a terminato...

void setIsEHPad(bool V=true)

Indicates the block is a landing pad.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Function & getFunction()

Return the LLVM function that this machine code represents.

Representation of each machine instruction.

void setFlag(MIFlag Flag)

Set a MI flag.

A description of a memory reference used in the backend.

Flags

Flags values. These may be or'd together.

@ MOVolatile

The memory access is volatile.

@ MODereferenceable

The memory access is dereferenceable (i.e., doesn't trap).

@ MOLoad

The memory access reads data.

@ MONonTemporal

The memory access is non-temporal.

@ MOInvariant

The memory access always returns the same value (or traps).

@ MOStore

The memory access writes data.

MachineOperand class - Representation of each machine instruction operand.

static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)

static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)

static MachineOperand CreateFPImm(const ConstantFP *CFP)

static MachineOperand CreateCFIIndex(unsigned CFIIndex)

static MachineOperand CreateRegMask(const uint32_t *Mask)

CreateRegMask - Creates a register mask operand referencing Mask.

bool isReg() const

isReg - Tests if this is a MO_Register operand.

static MachineOperand CreateCImm(const ConstantInt *CI)

static MachineOperand CreateMetadata(const MDNode *Meta)

static MachineOperand CreatePredicate(unsigned Pred)

static MachineOperand CreateImm(int64_t Val)

static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)

static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)

static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx)

static MachineOperand CreateRegLiveOut(const uint32_t *Mask)

static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)

static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)

void setTargetFlags(unsigned F)

bool isIdenticalTo(const MachineOperand &Other) const

Returns true if this operand is identical to the specified operand except for liveness related flags ...

static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)

static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)

static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)

static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)

static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)

static MachineOperand CreateFI(int Idx)

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Creates a new virtual register that has no register class, register bank or size assigned yet.

This interface provides simple read-only access to a block of memory, and provides simple methods for...

virtual StringRef getBufferIdentifier() const

Return an identifier for this buffer, typically the filename it was read from.

const char * getBufferEnd() const

const char * getBufferStart() const

Manage lifetime of a slot tracker for printing IR.

int getLocalSlot(const Value *V)

Return the slot number of the specified local value.

void incorporateFunction(const Function &F)

Incorporate the given function.

A Module instance is used to store all the information related to an LLVM module.

Special value supplied for machine level alias analysis.

Holds all the information related to register banks.

const RegisterBank & getRegBank(unsigned ID)

Get the register bank identified by ID.

unsigned getNumRegBanks() const

Get the total number of register banks.

This class implements the register bank concept.

Wrapper class representing virtual and physical registers.

Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...

Represents a location in source code.

static SMLoc getFromPointer(const char *Ptr)

Represents a range in source code.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

void push_back(const T &Elt)

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.

unsigned getMainFileID() const

const MemoryBuffer * getMemoryBuffer(unsigned i) const

SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const

Return an SMDiagnostic at the specified location with the specified string.

iterator find(StringRef Key)

bool insert(MapEntryTy *KeyValue)

insert - Insert the specified key/value pair into the map.

StringRef - Represent a constant reference to a string, i.e.

std::string str() const

str - Get the contents as an std::string.

constexpr StringRef substr(size_t Start, size_t N=npos) const

Return a reference to the substring from [Start, Start + N).

StringRef drop_front(size_t N=1) const

Return a StringRef equal to 'this' but with the first N elements dropped.

constexpr size_t size() const

size - Get the string size.

char front() const

front - Get the first character in the string.

std::string lower() const

A switch()-like statement whose cases are string literals.

StringSwitch & Case(StringLiteral S, T Value)

TargetIntrinsicInfo - Interface to description of machine instruction set.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

TargetSubtargetInfo - Generic base class for all target subtargets.

virtual const TargetRegisterInfo * getRegisterInfo() const

getRegisterInfo - If register information is available, return it.

virtual const RegisterBankInfo * getRegBankInfo() const

If the information for the register banks is available, return it.

virtual const TargetInstrInfo * getInstrInfo() const

Target - Wrapper for Target specific information.

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

std::string str() const

Return the twine contents as a std::string.

Value * lookup(StringRef Name) const

This method finds the value with the given Name in the the symbol table.

LLVM Value Representation.

An efficient, type-erasing, non-owning reference to a callable.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

constexpr std::underlying_type_t< E > Mask()

Get a bitmask with 1s in all places up to the high-order bit of E's largest value.

@ C

The default llvm calling convention, compatible with C.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

ID lookupIntrinsicID(StringRef Name)

This does the actual lookup of an intrinsic ID which matches the given function name.

@ Implicit

Not emitted register (e.g. carry, or temporary result).

@ Debug

@ Renamable

@ Define

@ InternalRead

@ Kill

The last use of a register.

@ Undef

Value of the register doesn't matter.

@ EarlyClobber

@ System

Synchronized with respect to all concurrently executing threads.

Reg

All possible values of the reg field in the ModR/M byte.

support::ulittle32_t Word

Scope

Defines the scope in which this symbol should be visible: Default – Visible in the public interface o...

This is an optimization pass for GlobalISel generic memory operations.

bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)

bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)

bool all_of(R &&range, UnaryPredicate P)

Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.

StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)

Consume a single machine instruction token in the given source and return the remaining source string...

constexpr bool isPowerOf2_64(uint64_t Value)

Return true if the argument is a power of two > 0 (64 bit edition.)

bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)

Parse the machine basic block definitions, and skip the machine instructions.

void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)

Determine a possible list of successors of a basic block based on the basic block machine operand bei...

bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)

uint64_t PowerOf2Ceil(uint64_t A)

Returns the power of two which is greater than or equal to the given value.

DIExpression * parseDIExpressionBodyAtBeginning(StringRef Asm, unsigned &Read, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots)

AtomicOrdering

Atomic ordering for LLVM's memory model.

bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)

Parse the machine instructions.

bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)

Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)

Parse a type and a constant value in the given string.

const char * toString(DWARFSectionKind Kind)

bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)

bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)

bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)

A collection of metadata nodes that might be associated with a memory access used by the alias-analys...

MDNode * Scope

The tag for alias scope specification (used with noalias).

MDNode * TBAA

The tag for type-based alias analysis.

MDNode * NoAlias

The tag specifying the noalias scope.

This struct is a compact representation of a valid (non-zero power of two) alignment.

static constexpr LaneBitmask getAll()

static const MBBSectionID ExceptionSectionID

static const MBBSectionID ColdSectionID

A token produced by the machine instruction lexer.

bool hasIntegerValue() const

bool is(TokenKind K) const

StringRef stringValue() const

Return the token's string value.

@ kw_cfi_aarch64_negate_ra_sign_state

@ kw_cfi_llvm_def_aspace_cfa

@ kw_inlineasm_br_indirect_target

@ kw_cfi_aarch64_negate_ra_sign_state_with_pc

@ kw_cfi_def_cfa_register

@ kw_cfi_adjust_cfa_offset

@ kw_machine_block_address_taken

@ kw_ir_block_address_taken

StringRef::iterator location() const

const APSInt & integerValue() const

This class contains a discriminated union of information about pointers in memory operands,...

VRegInfo & getVRegInfo(Register Num)

const SlotMapping & IRSlots

const Value * getIRValue(unsigned Slot)

DenseMap< unsigned, MachineBasicBlock * > MBBSlots

StringMap< VRegInfo * > VRegInfosNamed

DenseMap< unsigned, const Value * > Slots2Values

Maps from slot numbers to function's unnamed values.

PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)

DenseMap< Register, VRegInfo * > VRegInfos

VRegInfo & getVRegInfoNamed(StringRef RegName)

BumpPtrAllocator Allocator

bool getVRegFlagValue(StringRef FlagName, uint8_t &FlagValue) const

bool getDirectTargetFlag(StringRef Name, unsigned &Flag)

Try to convert a name of a direct target flag to the corresponding target flag.

const RegisterBank * getRegBank(StringRef Name)

Check if the given identifier is a name of a register bank.

bool parseInstrName(StringRef InstrName, unsigned &OpCode)

Try to convert an instruction name to an opcode.

unsigned getSubRegIndex(StringRef Name)

Check if the given identifier is a name of a subregister index.

bool getTargetIndex(StringRef Name, int &Index)

Try to convert a name of target index to the corresponding target index.

void setTarget(const TargetSubtargetInfo &NewSubtarget)

bool getRegisterByName(StringRef RegName, Register &Reg)

Try to convert a register name to a register number.

bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)

Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.

bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)

Try to convert a name of a bitmask target flag to the corresponding target flag.

const TargetRegisterClass * getRegClass(StringRef Name)

Check if the given identifier is a name of a register class.

const uint32_t * getRegMask(StringRef Identifier)

Check if the given identifier is a name of a register mask.

This struct contains the mappings from the slot numbers to unnamed metadata nodes,...

NumberedValues< GlobalValue * > GlobalValues