MIParser.cpp Source File (original) (raw)

70#include

71#include

72#include

73#include

74#include

75#include

76#include

78using namespace llvm;

84 if (&Subtarget == &NewSubtarget)

85 return;

87 Names2InstrOpCodes.clear();

88 Names2Regs.clear();

89 Names2RegMasks.clear();

90 Names2SubRegIndices.clear();

91 Names2TargetIndices.clear();

92 Names2DirectTargetFlags.clear();

93 Names2BitmaskTargetFlags.clear();

94 Names2MMOTargetFlags.clear();

96 initNames2RegClasses();

97 initNames2RegBanks();

98}

100void PerTargetMIParsingState::initNames2Regs() {

101 if (!Names2Regs.empty())

102 return;

103

104

105 Names2Regs.insert(std::make_pair("noreg", 0));

107 assert(TRI && "Expected target register info");

108

109 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {

110 bool WasInserted =

112 .second;

113 (void)WasInserted;

114 assert(WasInserted && "Expected registers to be unique case-insensitively");

115 }

116}

117

120 initNames2Regs();

121 auto RegInfo = Names2Regs.find(RegName);

122 if (RegInfo == Names2Regs.end())

123 return true;

124 Reg = RegInfo->getValue();

125 return false;

126}

127

129 uint8_t &FlagValue) const {

130 const auto *TRI = Subtarget.getRegisterInfo();

131 std::optional<uint8_t> FV = TRI->getVRegFlagValue(FlagName);

132 if (!FV)

133 return true;

134 FlagValue = *FV;

135 return false;

136}

137

138void PerTargetMIParsingState::initNames2InstrOpCodes() {

139 if (!Names2InstrOpCodes.empty())

140 return;

142 assert(TII && "Expected target instruction info");

143 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)

145}

146

148 unsigned &OpCode) {

149 initNames2InstrOpCodes();

150 auto InstrInfo = Names2InstrOpCodes.find(InstrName);

151 if (InstrInfo == Names2InstrOpCodes.end())

152 return true;

153 OpCode = InstrInfo->getValue();

154 return false;

155}

156

157void PerTargetMIParsingState::initNames2RegMasks() {

158 if (!Names2RegMasks.empty())

159 return;

161 assert(TRI && "Expected target register info");

165 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)

166 Names2RegMasks.insert(

167 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));

168}

169

171 initNames2RegMasks();

172 auto RegMaskInfo = Names2RegMasks.find(Identifier);

173 if (RegMaskInfo == Names2RegMasks.end())

174 return nullptr;

175 return RegMaskInfo->getValue();

176}

177

178void PerTargetMIParsingState::initNames2SubRegIndices() {

179 if (!Names2SubRegIndices.empty())

180 return;

182 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)

183 Names2SubRegIndices.insert(

184 std::make_pair(TRI->getSubRegIndexName(I), I));

185}

186

188 initNames2SubRegIndices();

189 auto SubRegInfo = Names2SubRegIndices.find(Name);

190 if (SubRegInfo == Names2SubRegIndices.end())

191 return 0;

192 return SubRegInfo->getValue();

193}

194

195void PerTargetMIParsingState::initNames2TargetIndices() {

196 if (!Names2TargetIndices.empty())

197 return;

199 assert(TII && "Expected target instruction info");

200 auto Indices = TII->getSerializableTargetIndices();

201 for (const auto &I : Indices)

202 Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));

203}

204

206 initNames2TargetIndices();

207 auto IndexInfo = Names2TargetIndices.find(Name);

208 if (IndexInfo == Names2TargetIndices.end())

209 return true;

210 Index = IndexInfo->second;

211 return false;

212}

213

214void PerTargetMIParsingState::initNames2DirectTargetFlags() {

215 if (!Names2DirectTargetFlags.empty())

216 return;

217

219 assert(TII && "Expected target instruction info");

220 auto Flags = TII->getSerializableDirectMachineOperandTargetFlags();

221 for (const auto &I : Flags)

222 Names2DirectTargetFlags.insert(

223 std::make_pair(StringRef(I.second), I.first));

224}

225

227 unsigned &Flag) {

228 initNames2DirectTargetFlags();

229 auto FlagInfo = Names2DirectTargetFlags.find(Name);

230 if (FlagInfo == Names2DirectTargetFlags.end())

231 return true;

232 Flag = FlagInfo->second;

233 return false;

234}

235

236void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {

237 if (!Names2BitmaskTargetFlags.empty())

238 return;

239

241 assert(TII && "Expected target instruction info");

242 auto Flags = TII->getSerializableBitmaskMachineOperandTargetFlags();

243 for (const auto &I : Flags)

244 Names2BitmaskTargetFlags.insert(

245 std::make_pair(StringRef(I.second), I.first));

246}

247

249 unsigned &Flag) {

250 initNames2BitmaskTargetFlags();

251 auto FlagInfo = Names2BitmaskTargetFlags.find(Name);

252 if (FlagInfo == Names2BitmaskTargetFlags.end())

253 return true;

254 Flag = FlagInfo->second;

255 return false;

256}

257

258void PerTargetMIParsingState::initNames2MMOTargetFlags() {

259 if (!Names2MMOTargetFlags.empty())

260 return;

261

263 assert(TII && "Expected target instruction info");

264 auto Flags = TII->getSerializableMachineMemOperandTargetFlags();

265 for (const auto &I : Flags)

266 Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));

267}

268

271 initNames2MMOTargetFlags();

272 auto FlagInfo = Names2MMOTargetFlags.find(Name);

273 if (FlagInfo == Names2MMOTargetFlags.end())

274 return true;

275 Flag = FlagInfo->second;

276 return false;

277}

278

279void PerTargetMIParsingState::initNames2RegClasses() {

280 if (!Names2RegClasses.empty())

281 return;

282

284 for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {

285 const auto *RC = TRI->getRegClass(I);

286 Names2RegClasses.insert(

287 std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));

288 }

289}

290

291void PerTargetMIParsingState::initNames2RegBanks() {

292 if (!Names2RegBanks.empty())

293 return;

294

295 const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();

296

297

298 if (!RBI)

299 return;

300

302 const auto &RegBank = RBI->getRegBank(I);

303 Names2RegBanks.insert(

304 std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));

305 }

306}

307

310 auto RegClassInfo = Names2RegClasses.find(Name);

311 if (RegClassInfo == Names2RegClasses.end())

312 return nullptr;

313 return RegClassInfo->getValue();

314}

315

317 auto RegBankInfo = Names2RegBanks.find(Name);

318 if (RegBankInfo == Names2RegBanks.end())

319 return nullptr;

320 return RegBankInfo->getValue();

321}

322

327

330 if (I.second) {

333 Info->VReg = MRI.createIncompleteVirtualRegister();

334 I.first->second = Info;

335 }

336 return *I.first->second;

337}

338

341

343 if (I.second) {

345 Info->VReg = MF.getRegInfo().createIncompleteVirtualRegister(RegName);

346 I.first->second = Info;

347 }

348 return *I.first->second;

349}

350

354 if (Slot == -1)

355 return;

356 Slots2Values.insert(std::make_pair(unsigned(Slot), V));

357}

358

359

362 ModuleSlotTracker MST(F.getParent(), false);

364 for (const auto &Arg : F.args())

366 for (const auto &BB : F) {

368 for (const auto &I : BB)

370 }

371}

372

378

379namespace {

380

381

382

383struct ParsedMachineOperand {

387 std::optional TiedDefIdx;

388

391 std::optional &TiedDefIdx)

392 : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {

393 if (TiedDefIdx)

395 "Only used register operands can be tied");

396 }

397};

398

399class MIParser {

400 MachineFunction &MF;

401 SMDiagnostic &Error;

402 StringRef Source, CurrentSource;

403 SMRange SourceRange;

404 MIToken Token;

405 PerFunctionMIParsingState &PFS;

406

407 DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;

408

409public:

410 MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,

411 StringRef Source);

412 MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,

413 StringRef Source, SMRange SourceRange);

414

415

416

417 void lex(unsigned SkipChar = 0);

418

419

420

421

422 bool error(const Twine &Msg);

423

424

425

426

428

429 bool

430 parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);

431 bool parseBasicBlocks();

432 bool parse(MachineInstr *&MI);

433 bool parseStandaloneMBB(MachineBasicBlock *&MBB);

434 bool parseStandaloneNamedRegister(Register &Reg);

435 bool parseStandaloneVirtualRegister(VRegInfo *&Info);

436 bool parseStandaloneRegister(Register &Reg);

437 bool parseStandaloneStackObject(int &FI);

438 bool parseStandaloneMDNode(MDNode *&Node);

440 bool parseMDTuple(MDNode *&MD, bool IsDistinct);

441 bool parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts);

443

444 bool

445 parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);

446 bool parseBasicBlock(MachineBasicBlock &MBB,

447 MachineBasicBlock *&AddFalthroughFrom);

448 bool parseBasicBlockLiveins(MachineBasicBlock &MBB);

449 bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);

450

452 bool parseVirtualRegister(VRegInfo *&Info);

453 bool parseNamedVirtualRegister(VRegInfo *&Info);

454 bool parseRegister(Register &Reg, VRegInfo *&VRegInfo);

455 bool parseRegisterFlag(unsigned &Flags);

456 bool parseRegisterClassOrBank(VRegInfo &RegInfo);

457 bool parseSubRegisterIndex(unsigned &SubReg);

458 bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);

459 bool parseRegisterOperand(MachineOperand &Dest,

460 std::optional &TiedDefIdx,

461 bool IsDef = false);

462 bool parseImmediateOperand(MachineOperand &Dest);

464 const Constant *&C);

467 bool parseTypedImmediateOperand(MachineOperand &Dest);

468 bool parseFPImmediateOperand(MachineOperand &Dest);

470 bool parseMBBOperand(MachineOperand &Dest);

471 bool parseStackFrameIndex(int &FI);

472 bool parseStackObjectOperand(MachineOperand &Dest);

473 bool parseFixedStackFrameIndex(int &FI);

474 bool parseFixedStackObjectOperand(MachineOperand &Dest);

476 bool parseGlobalAddressOperand(MachineOperand &Dest);

477 bool parseConstantPoolIndexOperand(MachineOperand &Dest);

478 bool parseSubRegisterIndexOperand(MachineOperand &Dest);

479 bool parseJumpTableIndexOperand(MachineOperand &Dest);

480 bool parseExternalSymbolOperand(MachineOperand &Dest);

481 bool parseMCSymbolOperand(MachineOperand &Dest);

482 [[nodiscard]] bool parseMDNode(MDNode *&Node);

483 bool parseDIExpression(MDNode *&Expr);

484 bool parseDILocation(MDNode *&Expr);

485 bool parseMetadataOperand(MachineOperand &Dest);

486 bool parseCFIOffset(int &Offset);

487 bool parseCFIRegister(unsigned &Reg);

488 bool parseCFIAddressSpace(unsigned &AddressSpace);

489 bool parseCFIEscapeValues(std::string& Values);

490 bool parseCFIOperand(MachineOperand &Dest);

491 bool parseIRBlock(BasicBlock *&BB, const Function &F);

492 bool parseBlockAddressOperand(MachineOperand &Dest);

493 bool parseIntrinsicOperand(MachineOperand &Dest);

494 bool parsePredicateOperand(MachineOperand &Dest);

495 bool parseShuffleMaskOperand(MachineOperand &Dest);

496 bool parseTargetIndexOperand(MachineOperand &Dest);

497 bool parseDbgInstrRefOperand(MachineOperand &Dest);

498 bool parseCustomRegisterMaskOperand(MachineOperand &Dest);

499 bool parseLaneMaskOperand(MachineOperand &Dest);

500 bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);

501 bool parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,

502 MachineOperand &Dest,

503 std::optional &TiedDefIdx);

504 bool parseMachineOperandAndTargetFlags(const unsigned OpCode,

505 const unsigned OpIdx,

506 MachineOperand &Dest,

507 std::optional &TiedDefIdx);

508 bool parseOffset(int64_t &Offset);

509 bool parseIRBlockAddressTaken(BasicBlock *&BB);

511 bool parseAddrspace(unsigned &Addrspace);

512 bool parseSectionID(std::optional &SID);

513 bool parseBBID(std::optional &BBID);

514 bool parseCallFrameSize(unsigned &CallFrameSize);

515 bool parseOperandsOffset(MachineOperand &Op);

518 bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);

519 bool parseMachinePointerInfo(MachinePointerInfo &Dest);

521 bool parseOptionalAtomicOrdering(AtomicOrdering &Order);

522 bool parseMachineMemoryOperand(MachineMemOperand *&Dest);

523 bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);

524 bool parseHeapAllocMarker(MDNode *&Node);

525 bool parsePCSections(MDNode *&Node);

526

527 bool parseTargetImmMnemonic(const unsigned OpCode, const unsigned OpIdx,

528 MachineOperand &Dest, const MIRFormatter &MF);

529

530private:

531

532

533

535

536

537

538

539 bool getUint64(uint64_t &Result);

540

541

542

543

544

546

547

548

550

551

552

554

555 bool parseInstruction(unsigned &OpCode, unsigned &Flags);

556

557 bool assignRegisterTies(MachineInstr &MI,

559

561 const MCInstrDesc &MCID);

562

563 const BasicBlock *getIRBlock(unsigned Slot);

564 const BasicBlock *getIRBlock(unsigned Slot, const Function &F);

565

566

567 MCSymbol *getOrCreateMCSymbol(StringRef Name);

568

569

570

571 bool parseStringConstant(std::string &Result);

572

573

574

576};

577

578}

579

583{}

584

588 SourceRange(SourceRange), PFS(PFS) {}

589

590void MIParser::lex(unsigned SkipChar) {

592 CurrentSource.substr(SkipChar), Token,

594}

595

596bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }

597

603

604

606 return true;

607 }

608

611 Source, {}, {});

612 return true;

613}

614

616 assert(SourceRange.isValid() && "Invalid source range");

620}

621

624

626 switch (TokenKind) {

628 return "','";

630 return "'='";

632 return "':'";

634 return "'('";

636 return "')'";

637 default:

638 return "";

639 }

640}

641

643 if (Token.isNot(TokenKind))

645 lex();

646 return false;

647}

648

650 if (Token.isNot(TokenKind))

651 return false;

652 lex();

653 return true;

654}

655

656

657bool MIParser::parseSectionID(std::optional &SID) {

659 lex();

661 unsigned Value = 0;

663 return error("Unknown Section ID");

665 } else {

666 const StringRef &S = Token.stringValue();

667 if (S == "Exception")

669 else if (S == "Cold")

671 else

672 return error("Unknown Section ID");

673 }

674 lex();

675 return false;

676}

677

678

679bool MIParser::parseBBID(std::optional &BBID) {

681 lex();

682 unsigned BaseID = 0;

683 unsigned CloneID = 0;

685 return error("Unknown BB ID");

686 lex();

689 return error("Unknown Clone ID");

690 lex();

691 }

692 BBID = {BaseID, CloneID};

693 return false;

694}

695

696

697bool MIParser::parseCallFrameSize(unsigned &CallFrameSize) {

699 lex();

700 unsigned Value = 0;

702 return error("Unknown call frame size");

703 CallFrameSize = Value;

704 lex();

705 return false;

706}

707

708bool MIParser::parseBasicBlockDefinition(

711 unsigned ID = 0;

713 return true;

714 auto Loc = Token.location();

715 auto Name = Token.stringValue();

716 lex();

717 bool MachineBlockAddressTaken = false;

718 BasicBlock *AddressTakenIRBlock = nullptr;

719 bool IsLandingPad = false;

720 bool IsInlineAsmBrIndirectTarget = false;

721 bool IsEHFuncletEntry = false;

722 std::optional SectionID;

723 uint64_t Alignment = 0;

724 std::optional BBID;

725 unsigned CallFrameSize = 0;

728 do {

729

730 switch (Token.kind()) {

732 MachineBlockAddressTaken = true;

733 lex();

734 break;

736 if (parseIRBlockAddressTaken(AddressTakenIRBlock))

737 return true;

738 break;

740 IsLandingPad = true;

741 lex();

742 break;

744 IsInlineAsmBrIndirectTarget = true;

745 lex();

746 break;

748 IsEHFuncletEntry = true;

749 lex();

750 break;

753 return true;

754 break;

757

758 if (parseIRBlock(BB, MF.getFunction()))

759 return true;

760 lex();

761 break;

763 if (parseSectionID(SectionID))

764 return true;

765 break;

767 if (parseBBID(BBID))

768 return true;

769 break;

771 if (parseCallFrameSize(CallFrameSize))

772 return true;

773 break;

774 default:

775 break;

776 }

779 return true;

780 }

782 return true;

783

784 if ( Name .empty()) {

786 MF.getFunction().getValueSymbolTable()->lookup(Name));

787 if (!BB)

788 return error(Loc, Twine("basic block '") + Name +

789 "' is not defined in the function '" +

790 MF.getName() + "'");

791 }

792 auto *MBB = MF.CreateMachineBasicBlock(BB, BBID);

794 bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;

795 if (!WasInserted)

796 return error(Loc, Twine("redefinition of machine basic block with id #") +

798 if (Alignment)

800 if (MachineBlockAddressTaken)

802 if (AddressTakenIRBlock)

807 if (SectionID) {

810 }

812 return false;

813}

814

815bool MIParser::parseBasicBlockDefinitions(

817 lex();

818

820 lex();

821 if (Token.isErrorOrEOF())

822 return Token.isError();

824 return error("expected a basic block definition before instructions");

825 unsigned BraceDepth = 0;

826 do {

827 if (parseBasicBlockDefinition(MBBSlots))

828 return true;

829 bool IsAfterNewline = false;

830

831 while (true) {

833 Token.isErrorOrEOF())

834 break;

836 return error("basic block definition should be located at the start of "

837 "the line");

839 IsAfterNewline = true;

840 continue;

841 }

842 IsAfterNewline = false;

844 ++BraceDepth;

846 if (!BraceDepth)

847 return error("extraneous closing brace ('}')");

848 --BraceDepth;

849 }

850 lex();

851 }

852

853 if (!Token.isError() && BraceDepth)

854 return error("expected '}'");

855 } while (!Token.isErrorOrEOF());

856 return Token.isError();

857}

858

861 lex();

863 return true;

864 if (Token.isNewlineOrEOF())

865 return false;

866 do {

868 return error("expected a named register");

870 if (parseNamedRegister(Reg))

871 return true;

872 lex();

875

878 return error("expected a lane mask");

880 "Use correct get-function for lane mask");

882 if (getUint64(V))

883 return error("invalid lane mask value");

885 lex();

886 }

889 return false;

890}

891

894 lex();

896 return true;

897 if (Token.isNewlineOrEOF())

898 return false;

899 do {

901 return error("expected a machine basic block reference");

904 return true;

905 lex();

906 unsigned Weight = 0;

910 return error("expected an integer literal after '('");

912 return true;

913 lex();

915 return true;

916 }

920 return false;

921}

922

925

927 lex();

929 while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())

930 lex();

932 }

934

935

936

937

938

939

940

941

942

943

944 bool ExplicitSuccessors = false;

945 while (true) {

947 if (parseBasicBlockSuccessors(MBB))

948 return true;

949 ExplicitSuccessors = true;

951 if (parseBasicBlockLiveins(MBB))

952 return true;

954 continue;

955 } else

956 break;

957 if (!Token.isNewlineOrEOF())

958 return error("expected line break at the end of a list");

959 lex();

960 }

961

962

963 bool IsInBundle = false;

968 continue;

970

971

973 IsInBundle = false;

974 continue;

975 }

978 return true;

980 if (IsInBundle) {

983 }

984 PrevMI = MI;

986 if (IsInBundle)

987 return error("nested instruction bundles are not allowed");

988 lex();

989

991 IsInBundle = true;

993

994 continue;

995 }

996 assert(Token.isNewlineOrEOF() && "MI is not fully parsed");

997 lex();

998 }

999

1000

1001 if (!ExplicitSuccessors) {

1003 bool IsFallthrough;

1007

1008 if (IsFallthrough) {

1009 AddFalthroughFrom = &MBB;

1010 } else {

1012 }

1013 }

1014

1015 return false;

1016}

1017

1018bool MIParser::parseBasicBlocks() {

1019 lex();

1020

1022 lex();

1023 if (Token.isErrorOrEOF())

1024 return Token.isError();

1025

1026

1029 do {

1032 return true;

1033 if (AddFalthroughFrom) {

1037 AddFalthroughFrom = nullptr;

1038 }

1039 if (parseBasicBlock(*MBB, AddFalthroughFrom))

1040 return true;

1041

1042

1045 return false;

1046}

1047

1049

1052 while (Token.isRegister() || Token.isRegisterFlag()) {

1053 auto Loc = Token.location();

1054 std::optional TiedDefIdx;

1055 if (parseRegisterOperand(MO, TiedDefIdx, true))

1056 return true;

1058 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));

1060 break;

1061 lex();

1062 }

1064 return true;

1065

1067 if (Token.isError() || parseInstruction(OpCode, Flags))

1068 return true;

1069

1070

1080 auto Loc = Token.location();

1081 std::optional TiedDefIdx;

1082 if (parseMachineOperandAndTargetFlags(OpCode, Operands.size(), MO, TiedDefIdx))

1083 return true;

1085 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));

1088 break;

1090 return error("expected ',' before the next machine operand");

1091 lex();

1092 }

1093

1094 MCSymbol *PreInstrSymbol = nullptr;

1096 if (parsePreOrPostInstrSymbol(PreInstrSymbol))

1097 return true;

1098 MCSymbol *PostInstrSymbol = nullptr;

1100 if (parsePreOrPostInstrSymbol(PostInstrSymbol))

1101 return true;

1102 MDNode *HeapAllocMarker = nullptr;

1104 if (parseHeapAllocMarker(HeapAllocMarker))

1105 return true;

1106 MDNode *PCSections = nullptr;

1108 if (parsePCSections(PCSections))

1109 return true;

1110

1111 unsigned CFIType = 0;

1113 lex();

1115 return error("expected an integer literal after 'cfi-type'");

1116

1118 return true;

1119 lex();

1120

1122 lex();

1123 }

1124

1127 lex();

1129 return true;

1130 lex();

1131 }

1132

1133 unsigned InstrNum = 0;

1135 lex();

1137 return error("expected an integer literal after 'debug-instr-number'");

1139 return true;

1140 lex();

1141

1143 lex();

1144 }

1145

1148 lex();

1152 return true;

1154 if (parseDILocation(Node))

1155 return true;

1156 } else

1157 return error("expected a metadata node after 'debug-location'");

1159 return error("referenced metadata is not a DILocation");

1160 DebugLocation = DebugLoc(Node);

1161 }

1162

1163

1166 lex();

1167 while (!Token.isNewlineOrEOF()) {

1169 if (parseMachineMemoryOperand(MemOp))

1170 return true;

1172 if (Token.isNewlineOrEOF())

1173 break;

1174 if (OpCode == TargetOpcode::BUNDLE && Token.is(MIToken::lbrace))

1175 break;

1177 return error("expected ',' before the next machine memory operand");

1178 lex();

1179 }

1180 }

1181

1182 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);

1183 if ( MCID .isVariadic()) {

1184

1185 if (verifyImplicitOperands(Operands, MCID))

1186 return true;

1187 }

1188

1189 MI = MF.CreateMachineInstr(MCID, DebugLocation, true);

1190 MI->setFlags(Flags);

1191

1192

1193

1194 for (const auto &Operand : Operands)

1195 MI->addOperand(MF, Operand.Operand);

1196

1197 if (assignRegisterTies(*MI, Operands))

1198 return true;

1199 if (PreInstrSymbol)

1200 MI->setPreInstrSymbol(MF, PreInstrSymbol);

1201 if (PostInstrSymbol)

1202 MI->setPostInstrSymbol(MF, PostInstrSymbol);

1203 if (HeapAllocMarker)

1204 MI->setHeapAllocMarker(MF, HeapAllocMarker);

1205 if (PCSections)

1206 MI->setPCSections(MF, PCSections);

1207 if (CFIType)

1208 MI->setCFIType(MF, CFIType);

1209 if (DS)

1210 MI->setDeactivationSymbol(MF, DS);

1211 if (!MemOperands.empty())

1212 MI->setMemRefs(MF, MemOperands);

1213 if (InstrNum)

1214 MI->setDebugInstrNum(InstrNum);

1215 return false;

1216}

1217

1219 lex();

1221 return error("expected a machine basic block reference");

1223 return true;

1224 lex();

1227 "expected end of string after the machine basic block reference");

1228 return false;

1229}

1230

1231bool MIParser::parseStandaloneNamedRegister(Register &Reg) {

1232 lex();

1234 return error("expected a named register");

1235 if (parseNamedRegister(Reg))

1236 return true;

1237 lex();

1239 return error("expected end of string after the register reference");

1240 return false;

1241}

1242

1243bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {

1244 lex();

1246 return error("expected a virtual register");

1247 if (parseVirtualRegister(Info))

1248 return true;

1249 lex();

1251 return error("expected end of string after the register reference");

1252 return false;

1253}

1254

1255bool MIParser::parseStandaloneRegister(Register &Reg) {

1256 lex();

1259 return error("expected either a named or virtual register");

1260

1262 if (parseRegister(Reg, Info))

1263 return true;

1264

1265 lex();

1267 return error("expected end of string after the register reference");

1268 return false;

1269}

1270

1271bool MIParser::parseStandaloneStackObject(int &FI) {

1272 lex();

1274 return error("expected a stack object");

1275 if (parseStackFrameIndex(FI))

1276 return true;

1278 return error("expected end of string after the stack object reference");

1279 return false;

1280}

1281

1282bool MIParser::parseStandaloneMDNode(MDNode *&Node) {

1283 lex();

1286 return true;

1288 if (parseDIExpression(Node))

1289 return true;

1291 if (parseDILocation(Node))

1292 return true;

1293 } else

1294 return error("expected a metadata node");

1296 return error("expected end of string after the metadata node");

1297 return false;

1298}

1299

1300bool MIParser::parseMachineMetadata() {

1301 lex();

1303 return error("expected a metadata node");

1304

1305 lex();

1307 return error("expected metadata id after '!'");

1308 unsigned ID = 0;

1310 return true;

1311 lex();

1313 return true;

1315 if (IsDistinct)

1316 lex();

1318 return error("expected a metadata node");

1319 lex();

1320

1322 if (parseMDTuple(MD, IsDistinct))

1323 return true;

1324

1325 auto FI = PFS.MachineForwardRefMDNodes.find(ID);

1326 if (FI != PFS.MachineForwardRefMDNodes.end()) {

1327 FI->second.first->replaceAllUsesWith(MD);

1328 PFS.MachineForwardRefMDNodes.erase(FI);

1329

1330 assert(PFS.MachineMetadataNodes[ID] == MD && "Tracking VH didn't work");

1331 } else {

1332 auto [It, Inserted] = PFS.MachineMetadataNodes.try_emplace(ID);

1333 if (!Inserted)

1334 return error("Metadata id is already used");

1335 It->second.reset(MD);

1336 }

1337

1338 return false;

1339}

1340

1341bool MIParser::parseMDTuple(MDNode *&MD, bool IsDistinct) {

1343 if (parseMDNodeVector(Elts))

1344 return true;

1346 : MDTuple::get)(MF.getFunction().getContext(), Elts);

1347 return false;

1348}

1349

1352 return error("expected '{' here");

1353 lex();

1354

1356 lex();

1357 return false;

1358 }

1359

1360 do {

1363 return true;

1364

1366

1368 break;

1369 lex();

1370 } while (true);

1371

1373 return error("expected end of metadata node");

1374 lex();

1375

1376 return false;

1377}

1378

1379

1380

1381bool MIParser::parseMetadata(Metadata *&MD) {

1383 return error("expected '!' here");

1384 lex();

1385

1387 std::string Str;

1388 if (parseStringConstant(Str))

1389 return true;

1390 MD = MDString::get(MF.getFunction().getContext(), Str);

1391 return false;

1392 }

1393

1395 return error("expected metadata id after '!'");

1396

1397 SMLoc Loc = mapSMLoc(Token.location());

1398

1399 unsigned ID = 0;

1401 return true;

1402 lex();

1403

1404 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);

1405 if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {

1406 MD = NodeInfo->second.get();

1407 return false;

1408 }

1409

1410 NodeInfo = PFS.MachineMetadataNodes.find(ID);

1411 if (NodeInfo != PFS.MachineMetadataNodes.end()) {

1412 MD = NodeInfo->second.get();

1413 return false;

1414 }

1415

1416 auto &FwdRef = PFS.MachineForwardRefMDNodes[ID];

1417 FwdRef = std::make_pair(

1419 PFS.MachineMetadataNodes[ID].reset(FwdRef.first.get());

1420 MD = FwdRef.first.get();

1421

1422 return false;

1423}

1424

1427 return MO.isDef() ? "implicit-def" : "implicit";

1428}

1429

1432 assert(Reg.isPhysical() && "expected phys reg");

1434}

1435

1436

1439 for (const auto &I : Operands) {

1441 return true;

1442 }

1443 return false;

1444}

1445

1448 if (MCID.isCall())

1449

1450

1451 return false;

1452

1453

1459

1460 const auto *TRI = MF.getSubtarget().getRegisterInfo();

1461 assert(TRI && "Expected target register info");

1462 for (const auto &I : ImplicitOperands) {

1464 continue;

1465 return error(Operands.empty() ? Token.location() : Operands.back().End,

1466 Twine("missing implicit register operand '") +

1469 }

1470 return false;

1471}

1472

1473bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {

1474

1475

1496

1497

1538

1539 lex();

1540 }

1542 return error("expected a machine instruction");

1543 StringRef InstrName = Token.stringValue();

1544 if (PFS.Target.parseInstrName(InstrName, OpCode))

1545 return error(Twine("unknown machine instruction name '") + InstrName + "'");

1546 lex();

1547 return false;

1548}

1549

1550bool MIParser::parseNamedRegister(Register &Reg) {

1553 if (PFS.Target.getRegisterByName(Name, Reg))

1554 return error(Twine("unknown register name '") + Name + "'");

1555 return false;

1556}

1557

1558bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {

1561

1562

1563 Info = &PFS.getVRegInfoNamed(Name);

1564 return false;

1565}

1566

1567bool MIParser::parseVirtualRegister(VRegInfo *&Info) {

1569 return parseNamedVirtualRegister(Info);

1571 unsigned ID;

1573 return true;

1574 Info = &PFS.getVRegInfo(ID);

1575 return false;

1576}

1577

1579 switch (Token.kind()) {

1581 Reg = 0;

1582 return false;

1584 return parseNamedRegister(Reg);

1587 if (parseVirtualRegister(Info))

1588 return true;

1590 return false;

1591

1592 default:

1594 }

1595}

1596

1597bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {

1599 return error("expected '_', register class, or register bank name");

1602

1603

1605 if (RC) {

1606 lex();

1607

1608 switch (RegInfo.Kind) {

1612 if (RegInfo.Explicit && RegInfo.D.RC != RC) {

1614 return error(Loc, Twine("conflicting register classes, previously: ") +

1615 Twine(TRI.getRegClassName(RegInfo.D.RC)));

1616 }

1617 RegInfo.D.RC = RC;

1619 return false;

1620

1623 return error(Loc, "register class specification on generic register");

1624 }

1626 }

1627

1628

1630 if (Name != "_") {

1631 RegBank = PFS.Target.getRegBank(Name);

1632 if (!RegBank)

1633 return error(Loc, "expected '_', register class, or register bank name");

1634 }

1635

1636 lex();

1637

1638 switch (RegInfo.Kind) {

1644 return error(Loc, "conflicting generic register banks");

1645 RegInfo.D.RegBank = RegBank;

1647 return false;

1648

1650 return error(Loc, "register bank specification on normal register");

1651 }

1653}

1654

1655bool MIParser::parseRegisterFlag(unsigned &Flags) {

1656 const unsigned OldFlags = Flags;

1657 switch (Token.kind()) {

1660 break;

1663 break;

1666 break;

1669 break;

1672 break;

1675 break;

1678 break;

1681 break;

1684 break;

1687 break;

1688 default:

1689 llvm_unreachable("The current token should be a register flag");

1690 }

1691 if (OldFlags == Flags)

1692

1693

1694 return error("duplicate '" + Token.stringValue() + "' register flag");

1695 lex();

1696 return false;

1697}

1698

1699bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {

1701 lex();

1703 return error("expected a subregister index after '.'");

1704 auto Name = Token.stringValue();

1705 SubReg = PFS.Target.getSubRegIndex(Name);

1707 return error(Twine("use of unknown subregister index '") + Name + "'");

1708 lex();

1709 return false;

1710}

1711

1712bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {

1714 return true;

1716 return error("expected an integer literal after 'tied-def'");

1718 return true;

1719 lex();

1721 return true;

1722 return false;

1723}

1724

1728 for (unsigned I = 0, E = Operands.size(); I != E; ++I) {

1729 if (!Operands[I].TiedDefIdx)

1730 continue;

1731

1732

1733 unsigned DefIdx = *Operands[I].TiedDefIdx;

1734 if (DefIdx >= E)

1735 return error(Operands[I].Begin,

1736 Twine("use of invalid tied-def operand index '" +

1737 Twine(DefIdx) + "'; instruction has only ") +

1738 Twine(E) + " operands");

1739 const auto &DefOperand = Operands[DefIdx].Operand;

1740 if (!DefOperand.isReg() || !DefOperand.isDef())

1741

1742 return error(Operands[I].Begin,

1743 Twine("use of invalid tied-def operand index '") +

1744 Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +

1745 " isn't a defined register");

1746

1747 for (const auto &TiedPair : TiedRegisterPairs) {

1748 if (TiedPair.first == DefIdx)

1749 return error(Operands[I].Begin,

1750 Twine("the tied-def operand #") + Twine(DefIdx) +

1751 " is already tied with another register operand");

1752 }

1753 TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));

1754 }

1755

1756

1757 for (const auto &TiedPair : TiedRegisterPairs)

1758 MI.tieOperands(TiedPair.first, TiedPair.second);

1759 return false;

1760}

1761

1762bool MIParser::parseRegisterOperand(MachineOperand &Dest,

1763 std::optional &TiedDefIdx,

1764 bool IsDef) {

1766 while (Token.isRegisterFlag()) {

1767 if (parseRegisterFlag(Flags))

1768 return true;

1769 }

1770 if (!Token.isRegister())

1771 return error("expected a register after register flags");

1774 if (parseRegister(Reg, RegInfo))

1775 return true;

1776 lex();

1777 unsigned SubReg = 0;

1779 if (parseSubRegisterIndex(SubReg))

1780 return true;

1782 return error("subregister index expects a virtual register");

1783 }

1786 return error("register class specification expects a virtual register");

1787 lex();

1788 if (parseRegisterClassOrBank(*RegInfo))

1789 return true;

1790 }

1794 unsigned Idx;

1795 if (!parseRegisterTiedDefIndex(Idx))

1796 TiedDefIdx = Idx;

1797 else {

1798

1800 if (parseLowLevelType(Token.location(), Ty))

1801 return error("expected tied-def or low-level type after '('");

1802

1804 return true;

1805

1806 if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)

1807 return error("inconsistent type for generic virtual register");

1808

1809 MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));

1810 MRI.setType(Reg, Ty);

1811 MRI.noteNewVirtualRegister(Reg);

1812 }

1813 }

1815

1817 return error("unexpected type on physical register");

1818

1820 if (parseLowLevelType(Token.location(), Ty))

1821 return true;

1822

1824 return true;

1825

1826 if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)

1827 return error("inconsistent type for generic virtual register");

1828

1829 MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));

1830 MRI.setType(Reg, Ty);

1832

1833

1834

1837 return error("generic virtual registers must have a type");

1838 }

1839

1842 return error("cannot have a killed def operand");

1843 } else {

1845 return error("cannot have a dead use operand");

1846 }

1847

1853

1854 return false;

1855}

1856

1857bool MIParser::parseImmediateOperand(MachineOperand &Dest) {

1859 const APSInt &Int = Token.integerValue();

1860 if (auto SImm = Int.trySExtValue(); Int.isSigned() && SImm.has_value())

1862 else if (auto UImm = Int.tryZExtValue(); Int .isSigned() && UImm.has_value())

1864 else

1865 return error("integer literal is too large to be an immediate operand");

1866 lex();

1867 return false;

1868}

1869

1870bool MIParser::parseTargetImmMnemonic(const unsigned OpCode,

1871 const unsigned OpIdx,

1875 auto Loc = Token.location();

1876 size_t Len = 1;

1877 lex();

1878

1879

1881 Len += Token.range().size();

1882 lex();

1883 }

1884

1888 else {

1890 Src = StringRef(Loc, Len + Token.stringValue().size());

1891 }

1892 int64_t Val;

1895 -> bool { return error(Loc, Msg); }))

1896 return true;

1897

1900 lex();

1901 return false;

1902}

1903

1907 auto Source = StringValue.str();

1911 if ()

1912 return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());

1913 return false;

1914}

1915

1918 return ::parseIRConstant(

1919 Loc, StringValue, PFS, C,

1922 });

1923}

1924

1927 return true;

1928 lex();

1929 return false;

1930}

1931

1932

1936

1938 return NumElts != 0 && isUInt<16>(NumElts);

1939}

1940

1944

1946 if (Token.range().front() == 's' || Token.range().front() == 'p') {

1949 return error("expected integers after 's'/'p' type character");

1950 }

1951

1952 if (Token.range().front() == 's') {

1953 auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();

1954 if (ScalarSize) {

1956 return error("invalid size for scalar type");

1958 } else {

1960 }

1961 lex();

1962 return false;

1963 } else if (Token.range().front() == 'p') {

1967 return error("invalid address space number");

1968

1970 lex();

1971 return false;

1972 }

1973

1974

1976 return error(Loc, "expected sN, pA, , , , "

1977 "or for GlobalISel type");

1978 lex();

1979

1980 bool HasVScale =

1982 if (HasVScale) {

1983 lex();

1985 return error("expected or ");

1986 lex();

1987 }

1988

1989 auto GetError = [this, &HasVScale, Loc]() {

1990 if (HasVScale)

1992 Loc, "expected or for vector type");

1993 return error(Loc, "expected or for vector type");

1994 };

1995

1997 return GetError();

1998 uint64_t NumElements = Token.integerValue().getZExtValue();

2000 return error("invalid number of vector elements");

2001

2002 lex();

2003

2005 return GetError();

2006 lex();

2007

2008 if (Token.range().front() != 's' && Token.range().front() != 'p')

2009 return GetError();

2010

2013 return error("expected integers after 's'/'p' type character");

2014

2015 if (Token.range().front() == 's') {

2016 auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();

2018 return error("invalid size for scalar element in vector");

2020 } else if (Token.range().front() == 'p') {

2024 return error("invalid address space number");

2025

2027 } else

2028 return GetError();

2029 lex();

2030

2032 return GetError();

2033

2034 lex();

2035

2037 return false;

2038}

2039

2040bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {

2042 StringRef TypeStr = Token.range();

2043 if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&

2044 TypeStr.front() != 'p')

2046 "a typed immediate operand should start with one of 'i', 's', or 'p'");

2049 return error("expected integers after 'i'/'s'/'p' type character");

2050

2051 auto Loc = Token.location();

2052 lex();

2055 !(Token.range() == "true" || Token.range() == "false"))

2056 return error("expected an integer literal");

2057 }

2060 return true;

2062 return false;

2063}

2064

2065bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {

2066 auto Loc = Token.location();

2067 lex();

2070 return error("expected a floating point literal");

2073 return true;

2075 return false;

2076}

2077

2081 assert(S[0] == '0' && tolower(S[1]) == 'x');

2082

2083 if (!isxdigit(S[2]))

2084 return true;

2086 APInt A(V.size()*4, V, 16);

2087

2088

2089

2090 unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();

2092 return false;

2093}

2094

2098 const uint64_t Limit = uint64_t(std::numeric_limits::max()) + 1;

2100 if (Val64 == Limit)

2101 return ErrCB(Token.location(), "expected 32-bit integer (too large)");

2102 Result = Val64;

2103 return false;

2104 }

2108 return true;

2109 if (A.getBitWidth() > 32)

2110 return ErrCB(Token.location(), "expected 32-bit integer (too large)");

2111 Result = A.getZExtValue();

2112 return false;

2113 }

2114 return true;

2115}

2116

2117bool MIParser::getUnsigned(unsigned &Result) {

2118 return ::getUnsigned(

2121 });

2122}

2123

2129 return true;

2130 auto MBBInfo = PFS.MBBSlots.find(Number);

2131 if (MBBInfo == PFS.MBBSlots.end())

2132 return error(Twine("use of undefined machine basic block #") +

2134 MBB = MBBInfo->second;

2135

2136

2137 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())

2139 " isn't '" + Token.stringValue() + "'");

2140 return false;

2141}

2142

2143bool MIParser::parseMBBOperand(MachineOperand &Dest) {

2146 return true;

2148 lex();

2149 return false;

2150}

2151

2152bool MIParser::parseStackFrameIndex(int &FI) {

2154 unsigned ID;

2156 return true;

2157 auto ObjectInfo = PFS.StackObjectSlots.find(ID);

2158 if (ObjectInfo == PFS.StackObjectSlots.end())

2159 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +

2160 "'");

2162 if (const auto *Alloca =

2163 MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))

2164 Name = Alloca->getName();

2165 if (!Token.stringValue().empty() && Token.stringValue() != Name)

2166 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +

2167 "' isn't '" + Token.stringValue() + "'");

2168 lex();

2169 FI = ObjectInfo->second;

2170 return false;

2171}

2172

2173bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {

2174 int FI;

2175 if (parseStackFrameIndex(FI))

2176 return true;

2178 return false;

2179}

2180

2181bool MIParser::parseFixedStackFrameIndex(int &FI) {

2183 unsigned ID;

2185 return true;

2186 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);

2187 if (ObjectInfo == PFS.FixedStackObjectSlots.end())

2188 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +

2190 lex();

2191 FI = ObjectInfo->second;

2192 return false;

2193}

2194

2195bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {

2196 int FI;

2197 if (parseFixedStackFrameIndex(FI))

2198 return true;

2200 return false;

2201}

2202

2206 switch (Token.kind()) {

2209 GV = M->getNamedValue(Token.stringValue());

2210 if (!GV)

2211 return ErrCB(Token.location(), Twine("use of undefined global value '") +

2212 Token.range() + "'");

2213 break;

2214 }

2216 unsigned GVIdx;

2218 return true;

2220 if (!GV)

2221 return ErrCB(Token.location(), Twine("use of undefined global value '@") +

2222 Twine(GVIdx) + "'");

2223 break;

2224 }

2225 default:

2226 llvm_unreachable("The current token should be a global value");

2227 }

2228 return false;

2229}

2230

2231bool MIParser::parseGlobalValue(GlobalValue *&GV) {

2232 return ::parseGlobalValue(

2233 Token, PFS, GV,

2236 });

2237}

2238

2239bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {

2242 return true;

2243 lex();

2245 if (parseOperandsOffset(Dest))

2246 return true;

2247 return false;

2248}

2249

2250bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {

2252 unsigned ID;

2254 return true;

2256 if (ConstantInfo == PFS.ConstantPoolSlots.end())

2257 return error("use of undefined constant '%const." + Twine(ID) + "'");

2258 lex();

2260 if (parseOperandsOffset(Dest))

2261 return true;

2262 return false;

2263}

2264

2265bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {

2267 unsigned ID;

2269 return true;

2270 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);

2271 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())

2272 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");

2273 lex();

2275 return false;

2276}

2277

2278bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {

2280 const char *Symbol = MF.createExternalSymbolName(Token.stringValue());

2281 lex();

2283 if (parseOperandsOffset(Dest))

2284 return true;

2285 return false;

2286}

2287

2288bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {

2290 MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());

2291 lex();

2293 if (parseOperandsOffset(Dest))

2294 return true;

2295 return false;

2296}

2297

2298bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {

2301 unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());

2302 if (SubRegIndex == 0)

2303 return error(Twine("unknown subregister index '") + Name + "'");

2304 lex();

2306 return false;

2307}

2308

2309bool MIParser::parseMDNode(MDNode *&Node) {

2311

2312 auto Loc = Token.location();

2313 lex();

2315 return error("expected metadata id after '!'");

2316 unsigned ID;

2318 return true;

2319 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);

2320 if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {

2321 NodeInfo = PFS.MachineMetadataNodes.find(ID);

2322 if (NodeInfo == PFS.MachineMetadataNodes.end())

2323 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");

2324 }

2325 lex();

2326 Node = NodeInfo->second.get();

2327 return false;

2328}

2329

2330bool MIParser::parseDIExpression(MDNode *&Expr) {

2331 unsigned Read;

2333 CurrentSource, Read, Error, *PFS.MF.getFunction().getParent(),

2334 &PFS.IRSlots);

2335 CurrentSource = CurrentSource.substr(Read);

2336 lex();

2337 if (!Expr)

2339 return false;

2340}

2341

2342bool MIParser::parseDILocation(MDNode *&Loc) {

2344 lex();

2345

2346 bool HaveLine = false;

2347 unsigned Line = 0;

2348 unsigned Column = 0;

2350 MDNode *InlinedAt = nullptr;

2351 bool ImplicitCode = false;

2352 uint64_t AtomGroup = 0;

2353 uint64_t AtomRank = 0;

2354

2356 return true;

2357

2359 do {

2361 if (Token.stringValue() == "line") {

2362 lex();

2364 return true;

2366 Token.integerValue().isSigned())

2367 return error("expected unsigned integer");

2368 Line = Token.integerValue().getZExtValue();

2369 HaveLine = true;

2370 lex();

2371 continue;

2372 }

2373 if (Token.stringValue() == "column") {

2374 lex();

2376 return true;

2378 Token.integerValue().isSigned())

2379 return error("expected unsigned integer");

2380 Column = Token.integerValue().getZExtValue();

2381 lex();

2382 continue;

2383 }

2384 if (Token.stringValue() == "scope") {

2385 lex();

2387 return true;

2389 return error("expected metadata node");

2391 return error("expected DIScope node");

2392 continue;

2393 }

2394 if (Token.stringValue() == "inlinedAt") {

2395 lex();

2397 return true;

2400 return true;

2402 if (parseDILocation(InlinedAt))

2403 return true;

2404 } else

2405 return error("expected metadata node");

2407 return error("expected DILocation node");

2408 continue;

2409 }

2410 if (Token.stringValue() == "isImplicitCode") {

2411 lex();

2413 return true;

2415 return error("expected true/false");

2416

2417

2418

2419 if (Token.stringValue() == "true")

2420 ImplicitCode = true;

2421 else if (Token.stringValue() == "false")

2422 ImplicitCode = false;

2423 else

2424 return error("expected true/false");

2425 lex();

2426 continue;

2427 }

2428 if (Token.stringValue() == "atomGroup") {

2429 lex();

2431 return true;

2433 Token.integerValue().isSigned())

2434 return error("expected unsigned integer");

2435 AtomGroup = Token.integerValue().getZExtValue();

2436 lex();

2437 continue;

2438 }

2439 if (Token.stringValue() == "atomRank") {

2440 lex();

2442 return true;

2444 Token.integerValue().isSigned())

2445 return error("expected unsigned integer");

2446 AtomRank = Token.integerValue().getZExtValue();

2447 lex();

2448 continue;

2449 }

2450 }

2451 return error(Twine("invalid DILocation argument '") +

2452 Token.stringValue() + "'");

2454 }

2455

2457 return true;

2458

2459 if (!HaveLine)

2460 return error("DILocation requires line number");

2461 if (!Scope)

2462 return error("DILocation requires a scope");

2463

2464 Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,

2465 InlinedAt, ImplicitCode, AtomGroup, AtomRank);

2466 return false;

2467}

2468

2469bool MIParser::parseMetadataOperand(MachineOperand &Dest) {

2473 return true;

2475 if (parseDIExpression(Node))

2476 return true;

2477 }

2479 return false;

2480}

2481

2482bool MIParser::parseCFIOffset(int &Offset) {

2484 return error("expected a cfi offset");

2485 if (Token.integerValue().getSignificantBits() > 32)

2486 return error("expected a 32 bit integer (the cfi offset is too large)");

2487 Offset = (int)Token.integerValue().getExtValue();

2488 lex();

2489 return false;

2490}

2491

2492bool MIParser::parseCFIRegister(unsigned &Reg) {

2494 return error("expected a cfi register");

2496 if (parseNamedRegister(LLVMReg))

2497 return true;

2498 const auto *TRI = MF.getSubtarget().getRegisterInfo();

2499 assert(TRI && "Expected target register info");

2500 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);

2501 if (DwarfReg < 0)

2502 return error("invalid DWARF register");

2503 Reg = (unsigned)DwarfReg;

2504 lex();

2505 return false;

2506}

2507

2508bool MIParser::parseCFIAddressSpace(unsigned &AddressSpace) {

2510 return error("expected a cfi address space literal");

2511 if (Token.integerValue().isSigned())

2512 return error("expected an unsigned integer (cfi address space)");

2513 AddressSpace = Token.integerValue().getZExtValue();

2514 lex();

2515 return false;

2516}

2517

2518bool MIParser::parseCFIEscapeValues(std::string &Values) {

2519 do {

2521 return error("expected a hexadecimal literal");

2524 return true;

2525 if (Value > UINT8_MAX)

2526 return error("expected a 8-bit integer (too large)");

2527 Values.push_back(static_cast<uint8_t>(Value));

2528 lex();

2530 return false;

2531}

2532

2533bool MIParser::parseCFIOperand(MachineOperand &Dest) {

2534 auto Kind = Token.kind();

2535 lex();

2537 unsigned Reg;

2539 unsigned CFIIndex;

2540 switch (Kind) {

2542 if (parseCFIRegister(Reg))

2543 return true;

2545 break;

2547 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2548 parseCFIOffset(Offset))

2549 return true;

2550 CFIIndex =

2552 break;

2554 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2555 parseCFIOffset(Offset))

2556 return true;

2557 CFIIndex = MF.addFrameInst(

2559 break;

2561 if (parseCFIRegister(Reg))

2562 return true;

2563 CFIIndex =

2565 break;

2567 if (parseCFIOffset(Offset))

2568 return true;

2569 CFIIndex =

2571 break;

2573 if (parseCFIOffset(Offset))

2574 return true;

2575 CFIIndex = MF.addFrameInst(

2577 break;

2579 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2580 parseCFIOffset(Offset))

2581 return true;

2582 CFIIndex =

2584 break;

2586 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2589 return true;

2592 break;

2595 break;

2597 if (parseCFIRegister(Reg))

2598 return true;

2600 break;

2603 break;

2605 if (parseCFIRegister(Reg))

2606 return true;

2608 break;

2610 unsigned Reg2;

2611 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||

2612 parseCFIRegister(Reg2))

2613 return true;

2614

2615 CFIIndex =

2617 break;

2618 }

2621 break;

2624 break;

2626 CFIIndex =

2628 break;

2630 std::string Values;

2631 if (parseCFIEscapeValues(Values))

2632 return true;

2634 break;

2635 }

2636 default:

2637

2638 llvm_unreachable("The current token should be a cfi operand");

2639 }

2641 return false;

2642}

2643

2645 switch (Token.kind()) {

2648 F.getValueSymbolTable()->lookup(Token.stringValue()));

2649 if (!BB)

2650 return error(Twine("use of undefined IR block '") + Token.range() + "'");

2651 break;

2652 }

2654 unsigned SlotNumber = 0;

2656 return true;

2657 BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));

2658 if (!BB)

2659 return error(Twine("use of undefined IR block '%ir-block.") +

2660 Twine(SlotNumber) + "'");

2661 break;

2662 }

2663 default:

2664 llvm_unreachable("The current token should be an IR block reference");

2665 }

2666 return false;

2667}

2668

2669bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {

2671 lex();

2673 return true;

2676 return error("expected a global value");

2679 return true;

2681 if ()

2682 return error("expected an IR function reference");

2683 lex();

2685 return true;

2688 return error("expected an IR block reference");

2689 if (parseIRBlock(BB, *F))

2690 return true;

2691 lex();

2693 return true;

2695 if (parseOperandsOffset(Dest))

2696 return true;

2697 return false;

2698}

2699

2700bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {

2702 lex();

2704 return error("expected syntax intrinsic(@llvm.whatever)");

2705

2707 return error("expected syntax intrinsic(@llvm.whatever)");

2708

2709 std::string Name = std::string(Token.stringValue());

2710 lex();

2711

2713 return error("expected ')' to terminate intrinsic name");

2714

2715

2718 return error("unknown intrinsic name");

2720

2721 return false;

2722}

2723

2724bool MIParser::parsePredicateOperand(MachineOperand &Dest) {

2727 lex();

2728

2730 return error("expected syntax intpred(whatever) or floatpred(whatever");

2731

2733 return error("whatever");

2734

2736 if (IsFloat) {

2756 return error("invalid floating-point predicate");

2757 } else {

2771 return error("invalid integer predicate");

2772 }

2773

2774 lex();

2777 return error("predicate should be terminated by ')'.");

2778

2779 return false;

2780}

2781

2782bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {

2784

2785 lex();

2787 return error("expected syntax shufflemask(, ...)");

2788

2790 do {

2794 const APSInt &Int = Token.integerValue();

2796 } else

2797 return error("expected integer constant");

2798

2799 lex();

2801

2803 return error("shufflemask should be terminated by ')'.");

2804

2805 if (ShufMask.size() < 2)

2806 return error("shufflemask should have > 1 element");

2807

2808 ArrayRef MaskAlloc = MF.allocateShuffleMask(ShufMask);

2810 return false;

2811}

2812

2813bool MIParser::parseDbgInstrRefOperand(MachineOperand &Dest) {

2815

2816 lex();

2818 return error("expected syntax dbg-instr-ref(, )");

2819

2821 return error("expected unsigned integer for instruction index");

2822 uint64_t InstrIdx = Token.integerValue().getZExtValue();

2823 assert(InstrIdx <= std::numeric_limits::max() &&

2824 "Instruction reference's instruction index is too large");

2825 lex();

2826

2828 return error("expected syntax dbg-instr-ref(, )");

2829

2831 return error("expected unsigned integer for operand index");

2832 uint64_t OpIdx = Token.integerValue().getZExtValue();

2833 assert(OpIdx <= std::numeric_limits::max() &&

2834 "Instruction reference's operand index is too large");

2835 lex();

2836

2838 return error("expected syntax dbg-instr-ref(, )");

2839

2841 return false;

2842}

2843

2844bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {

2846 lex();

2848 return true;

2850 return error("expected the name of the target index");

2852 if (PFS.Target.getTargetIndex(Token.stringValue(), Index))

2853 return error("use of undefined target index '" + Token.stringValue() + "'");

2854 lex();

2856 return true;

2858 if (parseOperandsOffset(Dest))

2859 return true;

2860 return false;

2861}

2862

2863bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {

2864 assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");

2865 lex();

2867 return true;

2868

2869 uint32_t *Mask = MF.allocateRegMask();

2870 do {

2873 return error("expected a named register");

2875 if (parseNamedRegister(Reg))

2876 return true;

2877 lex();

2879 }

2880

2881

2883

2885 return true;

2887 return false;

2888}

2889

2890bool MIParser::parseLaneMaskOperand(MachineOperand &Dest) {

2892

2893 lex();

2895 return true;

2896

2897

2899 return error("expected a valid lane mask value");

2901 "Use correct get-function for lane mask.");

2903 if (getUint64(V))

2904 return true;

2906 lex();

2907

2909 return true;

2910

2912 return false;

2913}

2914

2915bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {

2917 uint32_t *Mask = MF.allocateRegMask();

2918 lex();

2920 return true;

2921 while (true) {

2923 return error("expected a named register");

2925 if (parseNamedRegister(Reg))

2926 return true;

2927 lex();

2929

2931 break;

2932 lex();

2933 }

2935 return true;

2937 return false;

2938}

2939

2940bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,

2942 std::optional &TiedDefIdx) {

2943 switch (Token.kind()) {

2958 return parseRegisterOperand(Dest, TiedDefIdx);

2960 return parseImmediateOperand(Dest);

2968 return parseFPImmediateOperand(Dest);

2970 return parseMBBOperand(Dest);

2972 return parseStackObjectOperand(Dest);

2974 return parseFixedStackObjectOperand(Dest);

2977 return parseGlobalAddressOperand(Dest);

2979 return parseConstantPoolIndexOperand(Dest);

2981 return parseJumpTableIndexOperand(Dest);

2983 return parseExternalSymbolOperand(Dest);

2985 return parseMCSymbolOperand(Dest);

2987 return parseSubRegisterIndexOperand(Dest);

2990 return parseMetadataOperand(Dest);

3008 return parseCFIOperand(Dest);

3010 return parseBlockAddressOperand(Dest);

3012 return parseIntrinsicOperand(Dest);

3014 return parseTargetIndexOperand(Dest);

3016 return parseLaneMaskOperand(Dest);

3018 return parseLiveoutRegisterMaskOperand(Dest);

3021 return parsePredicateOperand(Dest);

3023 return parseShuffleMaskOperand(Dest);

3025 return parseDbgInstrRefOperand(Dest);

3027 return true;

3029 if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {

3031 lex();

3032 break;

3033 } else if (Token.stringValue() == "CustomRegMask") {

3034 return parseCustomRegisterMaskOperand(Dest);

3035 } else

3036 return parseTypedImmediateOperand(Dest);

3038 const auto *TII = MF.getSubtarget().getInstrInfo();

3040 return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);

3041 }

3042 [[fallthrough]];

3043 }

3044 default:

3045

3046 return error("expected a machine operand");

3047 }

3048 return false;

3049}

3050

3051bool MIParser::parseMachineOperandAndTargetFlags(

3053 std::optional &TiedDefIdx) {

3054 unsigned TF = 0;

3055 bool HasTargetFlags = false;

3057 HasTargetFlags = true;

3058 lex();

3060 return true;

3062 return error("expected the name of the target flag");

3063 if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {

3064 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))

3065 return error("use of undefined target flag '" + Token.stringValue() +

3066 "'");

3067 }

3068 lex();

3070 lex();

3072 return error("expected the name of the target flag");

3073 unsigned BitFlag = 0;

3074 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))

3075 return error("use of undefined target flag '" + Token.stringValue() +

3076 "'");

3077

3078 TF |= BitFlag;

3079 lex();

3080 }

3082 return true;

3083 }

3084 auto Loc = Token.location();

3085 if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))

3086 return true;

3087 if (!HasTargetFlags)

3088 return false;

3089 if (Dest.isReg())

3090 return error(Loc, "register operands can't have target flags");

3092 return false;

3093}

3094

3095bool MIParser::parseOffset(int64_t &Offset) {

3097 return false;

3100 lex();

3102 return error("expected an integer literal after '" + Sign + "'");

3103 if (Token.integerValue().getSignificantBits() > 64)

3104 return error("expected 64-bit integer (too large)");

3105 Offset = Token.integerValue().getExtValue();

3106 if (IsNegative)

3108 lex();

3109 return false;

3110}

3111

3112bool MIParser::parseIRBlockAddressTaken(BasicBlock *&BB) {

3114 lex();

3116 return error("expected basic block after 'ir_block_address_taken'");

3117

3118 if (parseIRBlock(BB, MF.getFunction()))

3119 return true;

3120

3121 lex();

3122 return false;

3123}

3124

3125bool MIParser::parseAlignment(uint64_t &Alignment) {

3127 lex();

3129 return error("expected an integer literal after 'align'");

3130 if (getUint64(Alignment))

3131 return true;

3132 lex();

3133

3135 return error("expected a power-of-2 literal after 'align'");

3136

3137 return false;

3138}

3139

3140bool MIParser::parseAddrspace(unsigned &Addrspace) {

3142 lex();

3144 return error("expected an integer literal after 'addrspace'");

3146 return true;

3147 lex();

3148 return false;

3149}

3150

3153 if (parseOffset(Offset))

3154 return true;

3156 return false;

3157}

3158

3161 switch (Token.kind()) {

3164 break;

3165 }

3167 unsigned SlotNumber = 0;

3168 if (getUnsigned(Token, SlotNumber, ErrCB))

3169 return true;

3171 break;

3172 }

3177 return true;

3178 V = GV;

3179 break;

3180 }

3184 return true;

3185 V = C;

3186 break;

3187 }

3189 V = nullptr;

3190 return false;

3191 default:

3192 llvm_unreachable("The current token should be an IR block reference");

3193 }

3194 if (!V)

3195 return ErrCB(Token.location(), Twine("use of undefined IR value '") + Token.range() + "'");

3196 return false;

3197}

3198

3199bool MIParser::parseIRValue(const Value *&V) {

3200 return ::parseIRValue(

3203 });

3204}

3205

3206bool MIParser::getUint64(uint64_t &Result) {

3207 if (Token.hasIntegerValue()) {

3208 if (Token.integerValue().getActiveBits() > 64)

3209 return error("expected 64-bit integer (too large)");

3210 Result = Token.integerValue().getZExtValue();

3211 return false;

3212 }

3216 return true;

3217 if (A.getBitWidth() > 64)

3218 return error("expected 64-bit integer (too large)");

3219 Result = A.getZExtValue();

3220 return false;

3221 }

3222 return true;

3223}

3224

3225bool MIParser::getHexUint(APInt &Result) {

3226 return ::getHexUint(Token, Result);

3227}

3228

3230 const auto OldFlags = Flags;

3231 switch (Token.kind()) {

3234 break;

3237 break;

3240 break;

3243 break;

3246 if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))

3247 return error("use of undefined target MMO flag '" + Token.stringValue() +

3248 "'");

3250 break;

3251 }

3252 default:

3253 llvm_unreachable("The current token should be a memory operand flag");

3254 }

3255 if (OldFlags == Flags)

3256

3257

3258 return error("duplicate '" + Token.stringValue() + "' memory operand flag");

3259 lex();

3260 return false;

3261}

3262

3263bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {

3264 switch (Token.kind()) {

3266 PSV = MF.getPSVManager().getStack();

3267 break;

3269 PSV = MF.getPSVManager().getGOT();

3270 break;

3272 PSV = MF.getPSVManager().getJumpTable();

3273 break;

3275 PSV = MF.getPSVManager().getConstantPool();

3276 break;

3278 int FI;

3279 if (parseFixedStackFrameIndex(FI))

3280 return true;

3281 PSV = MF.getPSVManager().getFixedStack(FI);

3282

3283 return false;

3284 }

3286 int FI;

3287 if (parseStackFrameIndex(FI))

3288 return true;

3289 PSV = MF.getPSVManager().getFixedStack(FI);

3290

3291 return false;

3292 }

3294 lex();

3295 switch (Token.kind()) {

3300 return true;

3301 PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);

3302 break;

3303 }

3305 PSV = MF.getPSVManager().getExternalSymbolCallEntry(

3306 MF.createExternalSymbolName(Token.stringValue()));

3307 break;

3308 default:

3310 "expected a global value or an external symbol after 'call-entry'");

3311 }

3312 break;

3314 lex();

3315 const auto *TII = MF.getSubtarget().getInstrInfo();

3317 if (Formatter->parseCustomPseudoSourceValue(

3318 Token.stringValue(), MF, PFS, PSV,

3320 return error(Loc, Msg);

3321 }))

3322 return true;

3323 } else

3324 return error("unable to parse target custom pseudo source value");

3325 break;

3326 }

3327 default:

3328 llvm_unreachable("The current token should be pseudo source value");

3329 }

3330 lex();

3331 return false;

3332}

3333

3340 if (parseMemoryPseudoSourceValue(PSV))

3341 return true;

3343 if (parseOffset(Offset))

3344 return true;

3346 return false;

3347 }

3353 return error("expected an IR value reference");

3354 const Value *V = nullptr;

3356 return true;

3357 if (V && ->getType()->isPointerTy())

3358 return error("expected a pointer IR value");

3359 lex();

3361 if (parseOffset(Offset))

3362 return true;

3364 return false;

3365}

3366

3370 if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {

3371 lex();

3373 return error("expected '(' in syncscope");

3374

3375 std::string SSN;

3376 if (parseStringConstant(SSN))

3377 return true;

3378

3379 SSID = Context.getOrInsertSyncScopeID(SSN);

3381 return error("expected ')' in syncscope");

3382 }

3383

3384 return false;

3385}

3386

3387bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {

3390 return false;

3391

3400

3402 lex();

3403 return false;

3404 }

3405

3406 return error("expected an atomic scope, ordering or a size specification");

3407}

3408

3409bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {

3411 return true;

3413 while (Token.isMemoryOperandFlag()) {

3414 if (parseMemoryOperandFlag(Flags))

3415 return true;

3416 }

3418 (Token.stringValue() != "load" && Token.stringValue() != "store"))

3419 return error("expected 'load' or 'store' memory operation");

3420 if (Token.stringValue() == "load")

3422 else

3424 lex();

3425

3426

3429 lex();

3430 }

3431

3432

3434 if (parseOptionalScope(MF.getFunction().getContext(), SSID))

3435 return true;

3436

3437

3439 if (parseOptionalAtomicOrdering(Order))

3440 return true;

3441

3442 if (parseOptionalAtomicOrdering(FailureOrder))

3443 return true;

3444

3448 return error("expected memory LLT, the size integer literal or 'unknown-size' after "

3449 "memory operation");

3450

3453 uint64_t Size;

3454 if (getUint64(Size))

3455 return true;

3456

3457

3459 lex();

3461 lex();

3462 } else {

3464 return true;

3465 if (parseLowLevelType(Token.location(), MemoryType))

3466 return true;

3468 return true;

3469 }

3470

3473 const char *Word =

3476 ? "on"

3478 if (Token.stringValue() != Word)

3479 return error(Twine("expected '") + Word + "'");

3480 lex();

3481

3482 if (parseMachinePointerInfo(Ptr))

3483 return true;

3484 }

3485 uint64_t BaseAlignment =

3488 : 1;

3492 switch (Token.kind()) {

3494

3495 uint64_t Alignment;

3497 return true;

3498 if (Ptr.Offset & (Alignment - 1)) {

3499

3500

3501

3502

3503 return error("specified alignment is more aligned than offset");

3504 }

3505 BaseAlignment = Alignment;

3506 break;

3507 }

3509

3511 return true;

3512 break;

3514 if (parseAddrspace(Ptr.AddrSpace))

3515 return true;

3516 break;

3518 lex();

3520 return true;

3521 break;

3523 lex();

3525 return true;

3526 break;

3528 lex();

3530 return true;

3531 break;

3533 lex();

3535 return true;

3536 break;

3538 lex();

3540 return true;

3541 break;

3542

3543 default:

3544 return error("expected 'align' or '!tbaa' or '!alias.scope' or "

3545 "'!noalias' or '!range' or '!noalias.addrspace'");

3546 }

3547 }

3549 return true;

3550 Dest = MF.getMachineMemOperand(Ptr, Flags, MemoryType, Align(BaseAlignment),

3551 AAInfo, Range, SSID, Order, FailureOrder);

3552 return false;

3553}

3554

3555bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {

3558 "Invalid token for a pre- post-instruction symbol!");

3559 lex();

3561 return error("expected a symbol after 'pre-instr-symbol'");

3562 Symbol = getOrCreateMCSymbol(Token.stringValue());

3563 lex();

3566 return false;

3568 return error("expected ',' before the next machine operand");

3569 lex();

3570 return false;

3571}

3572

3573bool MIParser::parseHeapAllocMarker(MDNode *&Node) {

3575 "Invalid token for a heap alloc marker!");

3576 lex();

3578 return true;

3579 if (!Node)

3580 return error("expected a MDNode after 'heap-alloc-marker'");

3583 return false;

3585 return error("expected ',' before the next machine operand");

3586 lex();

3587 return false;

3588}

3589

3590bool MIParser::parsePCSections(MDNode *&Node) {

3592 "Invalid token for a PC sections!");

3593 lex();

3595 return true;

3596 if (!Node)

3597 return error("expected a MDNode after 'pcsections'");

3600 return false;

3602 return error("expected ',' before the next machine operand");

3603 lex();

3604 return false;

3605}

3606

3610 ModuleSlotTracker MST(F.getParent(), false);

3612 for (const auto &BB : F) {

3614 continue;

3616 if (Slot == -1)

3617 continue;

3618 Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));

3619 }

3620}

3621

3623 unsigned Slot,

3625 return Slots2BasicBlocks.lookup(Slot);

3626}

3627

3628const BasicBlock *MIParser::getIRBlock(unsigned Slot) {

3629 if (Slots2BasicBlocks.empty())

3632}

3633

3634const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {

3635 if (&F == &MF.getFunction())

3636 return getIRBlock(Slot);

3640}

3641

3643

3644

3645

3646

3647

3648 return MF.getContext().getOrCreateSymbol(Name);

3649}

3650

3651bool MIParser::parseStringConstant(std::string &Result) {

3653 return error("expected string constant");

3654 Result = std::string(Token.stringValue());

3655 lex();

3656 return false;

3657}

3658

3662 return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);

3663}

3664

3667 return MIParser(PFS, Error, Src).parseBasicBlocks();

3668}

3669

3673 return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);

3674}

3675

3679 return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);

3680}

3681

3685 return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);

3686}

3687

3691 return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);

3692}

3693

3697 return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);

3698}

3699

3702 return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);

3703}

3704

3707 return MIParser(PFS, Error, Src, SrcRange).parseMachineMetadata();

3708}

3709

3715 ErrorCallback(Loc, Msg);

3716 });

3717 V = nullptr;

3718

3719 return ::parseIRValue(Token, PFS, V, ErrorCallback);

3720}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

This file defines the StringMap class.

This file implements a class to represent arbitrary precision integral constant values and operations...

This file implements the APSInt class, which is a simple class that represents an arbitrary sized int...

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Atomic ordering constants.

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")

Analysis containing CSE Info

This file contains the declarations for the subclasses of Constant, which represent the different fla...

static Error parseAlignment(StringRef Str, Align &Alignment, StringRef Name, bool AllowZero=false)

Attempts to parse an alignment component of a specification.

This file defines the DenseMap class.

Module.h This file contains the declarations for the Module class.

A common definition of LaneBitmask for use in TableGen and CodeGen.

static llvm::Error parse(DataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)

Implement a low-level type suitable for MachineInstr level instruction selection.

static const char * printImplicitRegisterFlag(const MachineOperand &MO)

Definition MIParser.cpp:1425

static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)

Definition MIParser.cpp:3622

static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)

Definition MIParser.cpp:1430

static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)

Definition MIParser.cpp:1904

static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)

Creates the mapping from slot numbers to function's unnamed IR values.

Definition MIParser.cpp:360

static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)

Definition MIParser.cpp:3159

static bool verifyScalarSize(uint64_t Size)

Definition MIParser.cpp:1933

static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)

Definition MIParser.cpp:2095

static bool getHexUint(const MIToken &Token, APInt &Result)

Definition MIParser.cpp:2078

static bool verifyVectorElementCount(uint64_t NumElts)

Definition MIParser.cpp:1937

static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)

Definition MIParser.cpp:351

static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)

Definition MIParser.cpp:3607

function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType

Definition MIParser.cpp:623

static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)

Return true if the parsed machine operands contain a given machine operand.

Definition MIParser.cpp:1437

static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)

Definition MIParser.cpp:2203

static bool verifyAddrSpace(uint64_t AddrSpace)

Definition MIParser.cpp:1941

Promote Memory to Register

MachineInstr unsigned OpIdx

ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))

static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)

Parse Input that contains metadata.

This file defines the SmallVector class.

This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...

Class for arbitrary precision integers.

uint64_t getZExtValue() const

Get zero extended value.

uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const

If this value is smaller than the specified limit, return it, otherwise return the limit value.

An arbitrary precision integer that knows its signedness.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

const T & back() const

back - Get the last element.

size_t size() const

size - Get the array size.

bool empty() const

empty - Check if the array is empty.

LLVM Basic Block Representation.

static LLVM_ABI BlockAddress * get(Function *F, BasicBlock *BB)

Return a BlockAddress for the specified function and basic block.

static BranchProbability getRaw(uint32_t N)

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

@ FCMP_OEQ

0 0 0 1 True if ordered and equal

@ FCMP_TRUE

1 1 1 1 Always true (always folded)

@ ICMP_SLT

signed less than

@ ICMP_SLE

signed less or equal

@ FCMP_OLT

0 1 0 0 True if ordered and less than

@ FCMP_ULE

1 1 0 1 True if unordered, less than, or equal

@ FCMP_OGT

0 0 1 0 True if ordered and greater than

@ FCMP_OGE

0 0 1 1 True if ordered and greater than or equal

@ ICMP_UGE

unsigned greater or equal

@ ICMP_UGT

unsigned greater than

@ ICMP_SGT

signed greater than

@ FCMP_ULT

1 1 0 0 True if unordered or less than

@ FCMP_ONE

0 1 1 0 True if ordered and operands are unequal

@ FCMP_UEQ

1 0 0 1 True if unordered or equal

@ ICMP_ULT

unsigned less than

@ FCMP_UGT

1 0 1 0 True if unordered or greater than

@ FCMP_OLE

0 1 0 1 True if ordered and less than or equal

@ FCMP_ORD

0 1 1 1 True if ordered (no nans)

@ ICMP_SGE

signed greater or equal

@ FCMP_UNE

1 1 1 0 True if unordered or not equal

@ ICMP_ULE

unsigned less or equal

@ FCMP_UGE

1 0 1 1 True if unordered, greater than, or equal

@ FCMP_FALSE

0 0 0 0 Always false (always folded)

@ FCMP_UNO

1 0 0 0 True if unordered: isnan(X) | isnan(Y)

static bool isFPPredicate(Predicate P)

static bool isIntPredicate(Predicate P)

This is an important base class in LLVM.

A parsed version of the target data layout string in and methods for querying it.

ValueT lookup(const_arg_type_t< KeyT > Val) const

lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...

std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)

static constexpr ElementCount get(ScalarTy MinVal, bool Scalable)

Lightweight error class with error context and mandatory checking.

ValueSymbolTable * getValueSymbolTable()

getSymbolTable() - Return the symbol table if any, otherwise nullptr.

Module * getParent()

Get the module that this global value is contained inside of...

static constexpr LLT vector(ElementCount EC, unsigned ScalarSizeInBits)

Get a low-level vector of some number of elements and element width.

static constexpr LLT scalar(unsigned SizeInBits)

Get a low-level scalar or aggregate "bag of bits".

static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)

Get a low-level pointer in the given address space.

static constexpr LLT token()

Get a low-level token; just a scalar with zero bits (or no size).

This is an important class for using LLVM in a threaded context.

static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_def_cfa_register modifies a rule for computing CFA.

static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_undefined From now on the previous value of Register can't be restored anymore.

static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...

static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int64_t Offset, unsigned AddressSpace, SMLoc Loc)

.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...

static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2, SMLoc Loc={})

.cfi_register Previous value of Register1 is saved in register Register2.

static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})

.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.

static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})

.cfi_offset Previous value of Register is saved at offset Offset from CFA.

static MCCFIInstruction createNegateRAStateWithPC(MCSymbol *L, SMLoc Loc={})

.cfi_negate_ra_state_with_pc AArch64 negate RA state with PC.

static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc={})

.cfi_negate_ra_state AArch64 negate RA state.

static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc={})

.cfi_remember_state Save all current rules for all registers.

static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset, SMLoc Loc={})

.cfi_def_cfa_offset modifies a rule for computing CFA.

static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, SMLoc Loc={}, StringRef Comment="")

.cfi_escape Allows the user to add arbitrary bytes to the unwind info.

static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc={})

.cfi_window_save SPARC register window is saved.

static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment, SMLoc Loc={})

.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...

static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc={})

.cfi_restore_state Restore the previously saved state.

static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register, SMLoc Loc={})

.cfi_same_value Current value of Register is the same as in the previous frame.

static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})

.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.

Describe properties that are true of each instruction in the target description file.

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)

static LLVM_ABI MDString * get(LLVMContext &Context, StringRef Str)

static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)

Return a distinct node.

static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)

static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)

Return a temporary node.

MIRFormater - Interface to format MIR operand based on target.

virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx, StringRef Src, int64_t &Imm, ErrorCallbackType ErrorCallback) const

Implement target specific parsing of immediate mnemonics.

function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType

static LLVM_ABI bool parseIRValue(StringRef Src, MachineFunction &MF, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrorCallback)

Helper functions to parse IR value from MIR serialization format which will be useful for target spec...

Definition MIParser.cpp:3710

void normalizeSuccProbs()

Normalize probabilities of all successors so that the sum of them becomes one.

void setAddressTakenIRBlock(BasicBlock *BB)

Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.

LLVM_ABI instr_iterator insert(instr_iterator I, MachineInstr *M)

Insert MI into the instruction list before I, possibly inside a bundle.

void setCallFrameSize(unsigned N)

Set the call frame size on entry to this basic block.

void setAlignment(Align A)

Set alignment of the basic block.

LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())

Add Succ as a successor of this MachineBasicBlock.

void setSectionID(MBBSectionID V)

Sets the section ID for this basic block.

void setIsInlineAsmBrIndirectTarget(bool V=true)

Indicates if this is the indirect dest of an INLINEASM_BR.

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

void setIsEHFuncletEntry(bool V=true)

Indicates if this is the entry block of an EH funclet.

LLVM_ABI bool isSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB is a successor of this block.

LLVM_ABI StringRef getName() const

Return the name of the corresponding LLVM basic block, or an empty string.

void setMachineBlockAddressTaken()

Set this block to indicate that its address is used as something other than the target of a terminato...

void setIsEHPad(bool V=true)

Indicates the block is a landing pad.

Function & getFunction()

Return the LLVM function that this machine code represents.

Representation of each machine instruction.

void setFlag(MIFlag Flag)

Set a MI flag.

A description of a memory reference used in the backend.

Flags

Flags values. These may be or'd together.

@ MOVolatile

The memory access is volatile.

@ MODereferenceable

The memory access is dereferenceable (i.e., doesn't trap).

@ MOLoad

The memory access reads data.

@ MONonTemporal

The memory access is non-temporal.

@ MOInvariant

The memory access always returns the same value (or traps).

@ MOStore

The memory access writes data.

MachineOperand class - Representation of each machine instruction operand.

static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)

static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)

static MachineOperand CreateFPImm(const ConstantFP *CFP)

static MachineOperand CreateCFIIndex(unsigned CFIIndex)

static MachineOperand CreateRegMask(const uint32_t *Mask)

CreateRegMask - Creates a register mask operand referencing Mask.

bool isReg() const

isReg - Tests if this is a MO_Register operand.

static MachineOperand CreateCImm(const ConstantInt *CI)

static MachineOperand CreateMetadata(const MDNode *Meta)

static MachineOperand CreatePredicate(unsigned Pred)

static MachineOperand CreateImm(int64_t Val)

static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)

static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)

static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx)

static MachineOperand CreateRegLiveOut(const uint32_t *Mask)

static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)

static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)

void setTargetFlags(unsigned F)

static MachineOperand CreateLaneMask(LaneBitmask LaneMask)

LLVM_ABI bool isIdenticalTo(const MachineOperand &Other) const

Returns true if this operand is identical to the specified operand except for liveness related flags ...

static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)

static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)

static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)

static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)

static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)

static MachineOperand CreateFI(int Idx)

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

This interface provides simple read-only access to a block of memory, and provides simple methods for...

virtual StringRef getBufferIdentifier() const

Return an identifier for this buffer, typically the filename it was read from.

const char * getBufferEnd() const

const char * getBufferStart() const

Manage lifetime of a slot tracker for printing IR.

int getLocalSlot(const Value *V)

Return the slot number of the specified local value.

void incorporateFunction(const Function &F)

Incorporate the given function.

A Module instance is used to store all the information related to an LLVM module.

Special value supplied for machine level alias analysis.

const RegisterBank & getRegBank(unsigned ID)

Get the register bank identified by ID.

unsigned getNumRegBanks() const

Get the total number of register banks.

This class implements the register bank concept.

Wrapper class representing virtual and physical registers.

constexpr bool isVirtual() const

Return true if the specified register number is in the virtual register namespace.

constexpr unsigned id() const

Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...

Represents a location in source code.

static SMLoc getFromPointer(const char *Ptr)

Represents a range in source code.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

void push_back(const T &Elt)

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.

unsigned getMainFileID() const

const MemoryBuffer * getMemoryBuffer(unsigned i) const

LLVM_ABI SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const

Return an SMDiagnostic at the specified location with the specified string.

bool insert(MapEntryTy *KeyValue)

insert - Insert the specified key/value pair into the map.

StringRef - Represent a constant reference to a string, i.e.

std::string str() const

str - Get the contents as an std::string.

constexpr StringRef substr(size_t Start, size_t N=npos) const

Return a reference to the substring from [Start, Start + N).

StringRef drop_front(size_t N=1) const

Return a StringRef equal to 'this' but with the first N elements dropped.

constexpr size_t size() const

size - Get the string size.

char front() const

front - Get the first character in the string.

LLVM_ABI std::string lower() const

A switch()-like statement whose cases are string literals.

StringSwitch & Case(StringLiteral S, T Value)

virtual const MIRFormatter * getMIRFormatter() const

Return MIR formatter to format/parse MIR operands.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

TargetSubtargetInfo - Generic base class for all target subtargets.

virtual const TargetInstrInfo * getInstrInfo() const

virtual const TargetRegisterInfo * getRegisterInfo() const =0

Return the target's register information.

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

LLVM_ABI std::string str() const

Return the twine contents as a std::string.

Value * lookup(StringRef Name) const

This method finds the value with the given Name in the the symbol table.

LLVM Value Representation.

An efficient, type-erasing, non-owning reference to a callable.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

constexpr std::underlying_type_t< E > Mask()

Get a bitmask with 1s in all places up to the high-order bit of E's largest value.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

@ C

The default llvm calling convention, compatible with C.

@ BasicBlock

Various leaf nodes.

LLVM_ABI ID lookupIntrinsicID(StringRef Name)

This does the actual lookup of an intrinsic ID which matches the given function name.

@ Implicit

Not emitted register (e.g. carry, or temporary result).

@ Debug

@ Renamable

@ Define

@ InternalRead

@ Kill

The last use of a register.

@ Undef

Value of the register doesn't matter.

@ EarlyClobber

@ System

Synchronized with respect to all concurrently executing threads.

support::ulittle32_t Word

Scope

Defines the scope in which this symbol should be visible: Default – Visible in the public interface o...

NodeAddr< NodeBase * > Node

This is an optimization pass for GlobalISel generic memory operations.

FunctionAddr VTableAddr Value

bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)

Definition MIParser.cpp:3694

bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)

Definition MIParser.cpp:3700

bool all_of(R &&range, UnaryPredicate P)

Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)

Consume a single machine instruction token in the given source and return the remaining source string...

constexpr bool isPowerOf2_64(uint64_t Value)

Return true if the argument is a power of two > 0 (64 bit edition.)

bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)

Parse the machine basic block definitions, and skip the machine instructions.

Definition MIParser.cpp:3659

LLVM_ABI void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)

Determine a possible list of successors of a basic block based on the basic block machine operand bei...

bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)

Definition MIParser.cpp:3670

uint64_t PowerOf2Ceil(uint64_t A)

Returns the power of two which is greater than or equal to the given value.

auto dyn_cast_or_null(const Y &Val)

LLVM_ABI DIExpression * parseDIExpressionBodyAtBeginning(StringRef Asm, unsigned &Read, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots)

constexpr bool isUInt(uint64_t x)

Checks if an unsigned integer fits into the given bit width.

bool isa(const From &Val)

isa - Return true if the parameter to the template is an instance of one of the template type argu...

AtomicOrdering

Atomic ordering for LLVM's memory model.

uint16_t MCPhysReg

An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...

DWARFExpression::Operation Op

ArrayRef(const T &OneElt) -> ArrayRef< T >

std::string toString(const APInt &I, unsigned Radix, bool Signed, bool formatAsCLiteral=false, bool UpperCase=true, bool InsertSeparators=false)

bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)

Parse the machine instructions.

Definition MIParser.cpp:3665

bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)

Definition MIParser.cpp:3676

LLVM_ABI Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)

Parse a type and a constant value in the given string.

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)

Definition MIParser.cpp:3705

bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)

Definition MIParser.cpp:3688

bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)

Definition MIParser.cpp:3682

A collection of metadata nodes that might be associated with a memory access used by the alias-analys...

MDNode * NoAliasAddrSpace

The tag specifying the noalias address spaces.

MDNode * Scope

The tag for alias scope specification (used with noalias).

MDNode * TBAA

The tag for type-based alias analysis.

MDNode * NoAlias

The tag specifying the noalias scope.

This struct is a compact representation of a valid (non-zero power of two) alignment.

static constexpr LaneBitmask getAll()

LLVM_ABI static const MBBSectionID ExceptionSectionID

LLVM_ABI static const MBBSectionID ColdSectionID

A token produced by the machine instruction lexer.

bool hasIntegerValue() const

bool is(TokenKind K) const

StringRef stringValue() const

Return the token's string value.

@ kw_cfi_aarch64_negate_ra_sign_state

@ kw_cfi_llvm_def_aspace_cfa

@ kw_inlineasm_br_indirect_target

@ kw_cfi_aarch64_negate_ra_sign_state_with_pc

@ kw_cfi_def_cfa_register

@ kw_cfi_adjust_cfa_offset

@ kw_machine_block_address_taken

@ kw_ir_block_address_taken

StringRef::iterator location() const

const APSInt & integerValue() const

This class contains a discriminated union of information about pointers in memory operands,...

int64_t Offset

Offset - This is an offset from the base Value*.

VRegInfo & getVRegInfo(Register Num)

Definition MIParser.cpp:328

const SlotMapping & IRSlots

const Value * getIRValue(unsigned Slot)

Definition MIParser.cpp:373

DenseMap< unsigned, MachineBasicBlock * > MBBSlots

StringMap< VRegInfo * > VRegInfosNamed

DenseMap< unsigned, const Value * > Slots2Values

Maps from slot numbers to function's unnamed values.

PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)

Definition MIParser.cpp:323

PerTargetMIParsingState & Target

DenseMap< Register, VRegInfo * > VRegInfos

VRegInfo & getVRegInfoNamed(StringRef RegName)

Definition MIParser.cpp:339

BumpPtrAllocator Allocator

bool getVRegFlagValue(StringRef FlagName, uint8_t &FlagValue) const

Definition MIParser.cpp:128

bool getDirectTargetFlag(StringRef Name, unsigned &Flag)

Try to convert a name of a direct target flag to the corresponding target flag.

Definition MIParser.cpp:226

const RegisterBank * getRegBank(StringRef Name)

Check if the given identifier is a name of a register bank.

Definition MIParser.cpp:316

bool parseInstrName(StringRef InstrName, unsigned &OpCode)

Try to convert an instruction name to an opcode.

Definition MIParser.cpp:147

unsigned getSubRegIndex(StringRef Name)

Check if the given identifier is a name of a subregister index.

Definition MIParser.cpp:187

bool getTargetIndex(StringRef Name, int &Index)

Try to convert a name of target index to the corresponding target index.

Definition MIParser.cpp:205

void setTarget(const TargetSubtargetInfo &NewSubtarget)

Definition MIParser.cpp:80

bool getRegisterByName(StringRef RegName, Register &Reg)

Try to convert a register name to a register number.

Definition MIParser.cpp:118

bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)

Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.

Definition MIParser.cpp:269

bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)

Try to convert a name of a bitmask target flag to the corresponding target flag.

Definition MIParser.cpp:248

const TargetRegisterClass * getRegClass(StringRef Name)

Check if the given identifier is a name of a register class.

Definition MIParser.cpp:309

const uint32_t * getRegMask(StringRef Identifier)

Check if the given identifier is a name of a register mask.

Definition MIParser.cpp:170

This struct contains the mappings from the slot numbers to unnamed metadata nodes,...

NumberedValues< GlobalValue * > GlobalValues

const RegisterBank * RegBank

union llvm::VRegInfo::@127225073067155374133234315364317264041071000132 D

const TargetRegisterClass * RC

enum llvm::VRegInfo::@374354327266250320012227113300214031244227062232 Kind

bool Explicit

VReg was explicitly specified in the .mir file.