LLVM: include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h Source File (original) (raw)

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13#ifndef LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H

14#define LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H

15

25

26namespace llvm {

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70};

71

73 union {

78 };

79

80public:

91

93 switch (Ty) {

96 break;

99 break;

101 MIB.addDef(MRI.createVirtualRegister(RC));

102 break;

105 break;

106 }

107 }

108

110 switch (Ty) {

112 return LLT{};

116 return MRI.getType(Reg);

119 }

121 }

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127

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140private:

141 DstType Ty;

142};

143

145 union {

150 };

151

152public:

158

159

160

165

167 switch (Ty) {

170 break;

173 break;

176 break;

179 break;

180 }

181 }

182

184 switch (Ty) {

189 return MRI.getType(Reg);

191 return MRI.getType(SrcMIB->getOperand(0).getReg());

192 }

194 }

195

197 switch (Ty) {

202 return Reg;

204 return SrcMIB->getOperand(0).getReg();

205 }

207 }

208

210 switch (Ty) {

213 default:

215 }

216 }

217

219 switch (Ty) {

221 return Imm;

222 default:

224 }

225 }

226

228

229private:

230 SrcType Ty;

231};

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243protected:

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251 const LLT Op1Ty);

252

254 if (State.Observer)

255 State.Observer->createdInstr(*InsertedInstr);

256 }

257

258public:

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284 assert(State.TII && "TargetInstrInfo is not set");

285 return *State.TII;

286 }

287

288

290 assert(State.MF && "MachineFunction is not set");

291 return *State.MF;

292 }

293

295 assert(State.MF && "MachineFunction is not set");

296 return *State.MF;

297 }

298

300 return getMF().getFunction().getDataLayout();

301 }

302

304 return getMF().getFunction().getContext();

305 }

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322 assert(State.MBB && "MachineBasicBlock is not set");

323 return *State.MBB;

324 }

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342 "Basic block is in a different function");

343 State.MBB = &MBB;

344 State.II = II;

345 }

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359 State.MBB = &MBB;

360 State.II = MBB.end();

362 "Basic block is in a different function");

363 }

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368 assert(MI.getParent() && "Instruction is not part of a basic block");

370 State.II = MI.getIterator();

374 }

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385 State.Observer = &Observer;

386 }

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446 const MDNode *Variable,

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458 const MDNode *Variable,

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474 Align Alignment);

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523 const SrcOp &Op1,

524 std::optional Flags = std::nullopt);

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539 const SrcOp &Op1);

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557 std::optional

560 std::optional Flags = std::nullopt);

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577 std::optional

578 materializeObjectPtrOffset(Register &Res, Register Op0, const LLT ValueTy,

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583 const SrcOp &Op1) {

584 return buildInstr(TargetOpcode::G_PTRMASK, {Res}, {Op0, Op1});

585 }

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615 const SrcOp &Op0);

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629 const SrcOp &Op0);

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644 const SrcOp &Op0, const SrcOp &Op1) {

645 return buildInstr(TargetOpcode::G_UADDO, {Res, CarryOut}, {Op0, Op1});

646 }

647

648

650 const SrcOp &Op0, const SrcOp &Op1) {

651 return buildInstr(TargetOpcode::G_USUBO, {Res, CarryOut}, {Op0, Op1});

652 }

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656 const SrcOp &Op0, const SrcOp &Op1) {

657 return buildInstr(TargetOpcode::G_SADDO, {Res, CarryOut}, {Op0, Op1});

658 }

659

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662 const SrcOp &Op0, const SrcOp &Op1) {

663 return buildInstr(TargetOpcode::G_SSUBO, {Res, CarryOut}, {Op0, Op1});

664 }

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682 const SrcOp &CarryIn) {

683 return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut},

684 {Op0, Op1, CarryIn});

685 }

686

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690 const SrcOp &CarryIn) {

691 return buildInstr(TargetOpcode::G_USUBE, {Res, CarryOut},

692 {Op0, Op1, CarryIn});

693 }

694

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698 const SrcOp &CarryIn) {

699 return buildInstr(TargetOpcode::G_SADDE, {Res, CarryOut},

700 {Op0, Op1, CarryIn});

701 }

702

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706 const SrcOp &CarryIn) {

707 return buildInstr(TargetOpcode::G_SSUBE, {Res, CarryOut},

708 {Op0, Op1, CarryIn});

709 }

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748 std::optional Flags = std::nullopt) {

749 return buildInstr(TargetOpcode::G_FPEXT, {Res}, {Op}, Flags);

750 }

751

752

754 return buildInstr(TargetOpcode::G_PTRTOINT, {Dst}, {Src});

755 }

756

757

759 return buildInstr(TargetOpcode::G_INTTOPTR, {Dst}, {Src});

760 }

761

762

764 return buildInstr(TargetOpcode::G_BITCAST, {Dst}, {Src});

765 }

766

767

769 return buildInstr(TargetOpcode::G_ADDRSPACE_CAST, {Dst}, {Src});

770 }

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774 unsigned getBoolExtOp(bool IsVec, bool IsFP) const;

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779 bool IsFP);

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785 bool IsVector,

786 bool IsFP);

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801 std::optional Flags = std::nullopt);

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849 int64_t ImmOp);

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862 return buildInstr(TargetOpcode::G_TRUNC_SSAT_S, {Res}, {Op});

863 }

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876 return buildInstr(TargetOpcode::G_TRUNC_SSAT_U, {Res}, {Op});

877 }

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890 return buildInstr(TargetOpcode::G_TRUNC_USAT_U, {Res}, {Op});

891 }

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1003 const SrcOp &Op, unsigned Val) {

1005 }

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1011 unsigned Size) {

1013 }

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1019 unsigned Size) {

1021 }

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1027 Align AlignVal) {

1029 AlignVal.value());

1030 }

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1043 return buildLoadInstr(TargetOpcode::G_LOAD, Res, Addr, MMO);

1044 }

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1050 Align Alignment,

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1070 const SrcOp &BasePtr,

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1090 Align Alignment,

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1140 std::initializer_list Ops);

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1248 const SrcOp &Src1, unsigned Index);

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1257 unsigned Index);

1258

1260 const SrcOp &Op, unsigned Index);

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1320 bool HasSideEffects, bool isConvergent);

1323 bool HasSideEffects, bool isConvergent);

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1337 buildFPTrunc(const DstOp &Res, const SrcOp &Op,

1338 std::optional Flags = std::nullopt);

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1352 std::optional Flags = std::nullopt);

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1368 std::optional Flags = std::nullopt);

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1384 std::optional Flags = std::nullopt);

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1398 const SrcOp &Op1);

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1412 const SrcOp &Op1);

1413

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1416 unsigned Mask) {

1417 return buildInstr(TargetOpcode::G_IS_FPCLASS, {Res},

1418 {Src, SrcOp(static_cast<int64_t>(Mask))});

1419 }

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1433 std::optional Flags = std::nullopt);

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1446 const SrcOp &Val,

1447 const SrcOp &Elt,

1448 const SrcOp &Idx);

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1458 const SrcOp &Val,

1459 const int Idx) {

1463 }

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1474 const SrcOp &Val,

1475 const SrcOp &Idx);

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1494 buildAtomicCmpXchgWithSuccess(const DstOp &OldValRes, const DstOp &SuccessRes,

1495 const SrcOp &Addr, const SrcOp &CmpVal,

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1513 const SrcOp &Addr, const SrcOp &CmpVal,

1514 const SrcOp &NewVal,

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1531 const SrcOp &Addr, const SrcOp &Val,

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1706 const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,

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1711 const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,

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1728 const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,

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1745 const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,

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1762 const SrcOp &Addr,

1763 const SrcOp &Val,

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1780 const SrcOp &Addr,

1781 const SrcOp &Val,

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1798 const SrcOp &Addr,

1799 const SrcOp &Val,

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1816 const SrcOp &Addr, const SrcOp &Val,

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1824 unsigned Locality, unsigned CacheType,

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1829 return buildInstr(TargetOpcode::G_FREEZE, {Dst}, {Src});

1830 }

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1854 const SrcOp &Src1,

1855 std::optional Flags = std::nullopt) {

1856 return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1}, Flags);

1857 }

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1871 const SrcOp &Src1,

1872 std::optional Flags = std::nullopt) {

1873 return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1}, Flags);

1874 }

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1887 const SrcOp &Src1,

1888 std::optional Flags = std::nullopt) {

1889 return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1}, Flags);

1890 }

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1902 const SrcOp &Src1) {

1903 return buildInstr(TargetOpcode::G_ABDS, {Dst}, {Src0, Src1});

1904 }

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1916 const SrcOp &Src1) {

1917 return buildInstr(TargetOpcode::G_ABDU, {Dst}, {Src0, Src1});

1918 }

1919

1921 const SrcOp &Src1,

1922 std::optional Flags = std::nullopt) {

1923 return buildInstr(TargetOpcode::G_UMULH, {Dst}, {Src0, Src1}, Flags);

1924 }

1925

1927 const SrcOp &Src1,

1928 std::optional Flags = std::nullopt) {

1929 return buildInstr(TargetOpcode::G_SMULH, {Dst}, {Src0, Src1}, Flags);

1930 }

1931

1932

1934 const SrcOp &Src1,

1935 std::optional Flags = std::nullopt) {

1936 return buildInstr(TargetOpcode::G_UREM, {Dst}, {Src0, Src1}, Flags);

1937 }

1938

1940 const SrcOp &Src1,

1941 std::optional Flags = std::nullopt) {

1942 return buildInstr(TargetOpcode::G_FMUL, {Dst}, {Src0, Src1}, Flags);

1943 }

1944

1947 std::optional Flags = std::nullopt) {

1948 return buildInstr(TargetOpcode::G_FMINNUM, {Dst}, {Src0, Src1}, Flags);

1949 }

1950

1953 std::optional Flags = std::nullopt) {

1954 return buildInstr(TargetOpcode::G_FMAXNUM, {Dst}, {Src0, Src1}, Flags);

1955 }

1956

1959 std::optional Flags = std::nullopt) {

1960 return buildInstr(TargetOpcode::G_FMINNUM_IEEE, {Dst}, {Src0, Src1}, Flags);

1961 }

1962

1965 std::optional Flags = std::nullopt) {

1966 return buildInstr(TargetOpcode::G_FMAXNUM_IEEE, {Dst}, {Src0, Src1}, Flags);

1967 }

1968

1970 const SrcOp &Src1,

1971 std::optional Flags = std::nullopt) {

1972 return buildInstr(TargetOpcode::G_SHL, {Dst}, {Src0, Src1}, Flags);

1973 }

1974

1976 const SrcOp &Src1,

1977 std::optional Flags = std::nullopt) {

1978 return buildInstr(TargetOpcode::G_LSHR, {Dst}, {Src0, Src1}, Flags);

1979 }

1980

1982 const SrcOp &Src1,

1983 std::optional Flags = std::nullopt) {

1984 return buildInstr(TargetOpcode::G_ASHR, {Dst}, {Src0, Src1}, Flags);

1985 }

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1999 const SrcOp &Src1) {

2000 return buildInstr(TargetOpcode::G_AND, {Dst}, {Src0, Src1});

2001 }

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2010

2011

2012

2014 const SrcOp &Src1,

2015 std::optional Flags = std::nullopt) {

2016 return buildInstr(TargetOpcode::G_OR, {Dst}, {Src0, Src1}, Flags);

2017 }

2018

2019

2021 const SrcOp &Src1) {

2022 return buildInstr(TargetOpcode::G_XOR, {Dst}, {Src0, Src1});

2023 }

2024

2025

2026

2027

2030 return buildInstr(TargetOpcode::G_XOR, {Dst}, {Src0, NegOne});

2031 }

2032

2033

2034

2035

2038 return buildInstr(TargetOpcode::G_SUB, {Dst}, {Zero, Src0});

2039 }

2040

2041

2043 return buildInstr(TargetOpcode::G_CTPOP, {Dst}, {Src0});

2044 }

2045

2046

2048 return buildInstr(TargetOpcode::G_CTLZ, {Dst}, {Src0});

2049 }

2050

2051

2053 return buildInstr(TargetOpcode::G_CTLZ_ZERO_UNDEF, {Dst}, {Src0});

2054 }

2055

2056

2058 return buildInstr(TargetOpcode::G_CTTZ, {Dst}, {Src0});

2059 }

2060

2061

2063 return buildInstr(TargetOpcode::G_CTTZ_ZERO_UNDEF, {Dst}, {Src0});

2064 }

2065

2066

2068 return buildInstr(TargetOpcode::G_BSWAP, {Dst}, {Src0});

2069 }

2070

2071

2073 const SrcOp &Src1,

2074 std::optional Flags = std::nullopt) {

2075 return buildInstr(TargetOpcode::G_FADD, {Dst}, {Src0, Src1}, Flags);

2076 }

2077

2078

2081 std::optional Flags = std::nullopt) {

2082 return buildInstr(TargetOpcode::G_STRICT_FADD, {Dst}, {Src0, Src1}, Flags);

2083 }

2084

2085

2087 const SrcOp &Src1,

2088 std::optional Flags = std::nullopt) {

2089 return buildInstr(TargetOpcode::G_FSUB, {Dst}, {Src0, Src1}, Flags);

2090 }

2091

2092

2094 const SrcOp &Src1,

2095 std::optional Flags = std::nullopt) {

2096 return buildInstr(TargetOpcode::G_FDIV, {Dst}, {Src0, Src1}, Flags);

2097 }

2098

2099

2101 const SrcOp &Src1, const SrcOp &Src2,

2102 std::optional Flags = std::nullopt) {

2103 return buildInstr(TargetOpcode::G_FMA, {Dst}, {Src0, Src1, Src2}, Flags);

2104 }

2105

2106

2108 const SrcOp &Src1, const SrcOp &Src2,

2109 std::optional Flags = std::nullopt) {

2110 return buildInstr(TargetOpcode::G_FMAD, {Dst}, {Src0, Src1, Src2}, Flags);

2111 }

2112

2113

2115 std::optional Flags = std::nullopt) {

2116 return buildInstr(TargetOpcode::G_FNEG, {Dst}, {Src0}, Flags);

2117 }

2118

2119

2121 std::optional Flags = std::nullopt) {

2122 return buildInstr(TargetOpcode::G_FABS, {Dst}, {Src0}, Flags);

2123 }

2124

2125

2128 std::optional Flags = std::nullopt) {

2129 return buildInstr(TargetOpcode::G_FCANONICALIZE, {Dst}, {Src0}, Flags);

2130 }

2131

2132

2135 std::optional Flags = std::nullopt) {

2136 return buildInstr(TargetOpcode::G_INTRINSIC_TRUNC, {Dst}, {Src0}, Flags);

2137 }

2138

2139

2142 std::optional Flags = std::nullopt) {

2143 return buildInstr(TargetOpcode::G_FFLOOR, {Dst}, {Src0}, Flags);

2144 }

2145

2146

2148 std::optional Flags = std::nullopt) {

2149 return buildInstr(TargetOpcode::G_FLOG, {Dst}, {Src}, Flags);

2150 }

2151

2152

2154 std::optional Flags = std::nullopt) {

2155 return buildInstr(TargetOpcode::G_FLOG2, {Dst}, {Src}, Flags);

2156 }

2157

2158

2160 std::optional Flags = std::nullopt) {

2161 return buildInstr(TargetOpcode::G_FEXP2, {Dst}, {Src}, Flags);

2162 }

2163

2164

2166 const SrcOp &Src1,

2167 std::optional Flags = std::nullopt) {

2168 return buildInstr(TargetOpcode::G_FPOW, {Dst}, {Src0, Src1}, Flags);

2169 }

2170

2171

2174 std::optional Flags = std::nullopt) {

2175 return buildInstr(TargetOpcode::G_FLDEXP, {Dst}, {Src0, Src1}, Flags);

2176 }

2177

2178

2181 std::optional Flags = std::nullopt) {

2182 return buildInstr(TargetOpcode::G_FFREXP, {Fract, Exp}, {Src}, Flags);

2183 }

2184

2185

2188 std::optional Flags = std::nullopt) {

2189 return buildInstr(TargetOpcode::G_FSINCOS, {Sin, Cos}, {Src}, Flags);

2190 }

2191

2192

2194 const SrcOp &Src,

2195 std::optional Flags = std::nullopt) {

2196 return buildInstr(TargetOpcode::G_FMODF, {Fract, Int}, {Src}, Flags);

2197 }

2198

2199

2201 const SrcOp &Src1) {

2202 return buildInstr(TargetOpcode::G_FCOPYSIGN, {Dst}, {Src0, Src1});

2203 }

2204

2205

2207 return buildInstr(TargetOpcode::G_UITOFP, {Dst}, {Src0});

2208 }

2209

2210

2212 return buildInstr(TargetOpcode::G_SITOFP, {Dst}, {Src0});

2213 }

2214

2215

2217 return buildInstr(TargetOpcode::G_FPTOUI, {Dst}, {Src0});

2218 }

2219

2220

2222 return buildInstr(TargetOpcode::G_FPTOSI, {Dst}, {Src0});

2223 }

2224

2225

2227 return buildInstr(TargetOpcode::G_FPTOUI_SAT, {Dst}, {Src0});

2228 }

2229

2230

2232 return buildInstr(TargetOpcode::G_FPTOSI_SAT, {Dst}, {Src0});

2233 }

2234

2235

2238 std::optional Flags = std::nullopt) {

2239 return buildInstr(TargetOpcode::G_INTRINSIC_ROUNDEVEN, {Dst}, {Src0},

2240 Flags);

2241 }

2242

2243

2245 const SrcOp &Src1) {

2246 return buildInstr(TargetOpcode::G_SMIN, {Dst}, {Src0, Src1});

2247 }

2248

2249

2251 const SrcOp &Src1) {

2252 return buildInstr(TargetOpcode::G_SMAX, {Dst}, {Src0, Src1});

2253 }

2254

2255

2257 const SrcOp &Src1) {

2258 return buildInstr(TargetOpcode::G_UMIN, {Dst}, {Src0, Src1});

2259 }

2260

2261

2263 const SrcOp &Src1) {

2264 return buildInstr(TargetOpcode::G_UMAX, {Dst}, {Src0, Src1});

2265 }

2266

2267

2269 return buildInstr(TargetOpcode::G_ABS, {Dst}, {Src});

2270 }

2271

2272

2273

2274

2275

2276

2277

2279

2280

2281

2282

2283

2285 const SrcOp &ScalarIn,

2286 const SrcOp &VecIn) {

2287 return buildInstr(TargetOpcode::G_VECREDUCE_SEQ_FADD, {Dst},

2288 {ScalarIn, {VecIn}});

2289 }

2290

2291

2292

2293

2294

2296 const SrcOp &ScalarIn,

2297 const SrcOp &VecIn) {

2298 return buildInstr(TargetOpcode::G_VECREDUCE_SEQ_FMUL, {Dst},

2299 {ScalarIn, {VecIn}});

2300 }

2301

2302

2303

2304

2305

2307 const SrcOp &ScalarIn,

2308 const SrcOp &VecIn) {

2309 return buildInstr(TargetOpcode::G_VECREDUCE_FADD, {Dst}, {ScalarIn, VecIn});

2310 }

2311

2312

2313

2314

2315

2317 const SrcOp &ScalarIn,

2318 const SrcOp &VecIn) {

2319 return buildInstr(TargetOpcode::G_VECREDUCE_FMUL, {Dst}, {ScalarIn, VecIn});

2320 }

2321

2322

2324 return buildInstr(TargetOpcode::G_VECREDUCE_FMAX, {Dst}, {Src});

2325 }

2326

2327

2329 return buildInstr(TargetOpcode::G_VECREDUCE_FMIN, {Dst}, {Src});

2330 }

2331

2332

2334 const SrcOp &Src) {

2335 return buildInstr(TargetOpcode::G_VECREDUCE_FMAXIMUM, {Dst}, {Src});

2336 }

2337

2338

2340 const SrcOp &Src) {

2341 return buildInstr(TargetOpcode::G_VECREDUCE_FMINIMUM, {Dst}, {Src});

2342 }

2343

2344

2346 return buildInstr(TargetOpcode::G_VECREDUCE_ADD, {Dst}, {Src});

2347 }

2348

2349

2351 return buildInstr(TargetOpcode::G_VECREDUCE_MUL, {Dst}, {Src});

2352 }

2353

2354

2356 return buildInstr(TargetOpcode::G_VECREDUCE_AND, {Dst}, {Src});

2357 }

2358

2359

2361 return buildInstr(TargetOpcode::G_VECREDUCE_OR, {Dst}, {Src});

2362 }

2363

2364

2366 return buildInstr(TargetOpcode::G_VECREDUCE_XOR, {Dst}, {Src});

2367 }

2368

2369

2371 return buildInstr(TargetOpcode::G_VECREDUCE_SMAX, {Dst}, {Src});

2372 }

2373

2374

2376 return buildInstr(TargetOpcode::G_VECREDUCE_SMIN, {Dst}, {Src});

2377 }

2378

2379

2381 return buildInstr(TargetOpcode::G_VECREDUCE_UMAX, {Dst}, {Src});

2382 }

2383

2384

2386 return buildInstr(TargetOpcode::G_VECREDUCE_UMIN, {Dst}, {Src});

2387 }

2388

2389

2391 const SrcOp &SrcPtr,

2396 Opcode, {}, {DstPtr, SrcPtr, Size, SrcOp(INT64_C(0) )});

2397 MIB.addMemOperand(&DstMMO);

2398 MIB.addMemOperand(&SrcMMO);

2399 return MIB;

2400 }

2401

2406 DstMMO, SrcMMO);

2407 }

2408

2409

2411 return buildInstr(Debug ? TargetOpcode::G_DEBUGTRAP : TargetOpcode::G_TRAP);

2412 }

2413

2414

2416 const SrcOp &LSB, const SrcOp &Width) {

2417 return buildInstr(TargetOpcode::G_SBFX, {Dst}, {Src, LSB, Width});

2418 }

2419

2420

2422 const SrcOp &LSB, const SrcOp &Width) {

2423 return buildInstr(TargetOpcode::G_UBFX, {Dst}, {Src, LSB, Width});

2424 }

2425

2426

2428 const SrcOp &Amt) {

2429 return buildInstr(TargetOpcode::G_ROTR, {Dst}, {Src, Amt});

2430 }

2431

2432

2434 const SrcOp &Amt) {

2435 return buildInstr(TargetOpcode::G_ROTL, {Dst}, {Src, Amt});

2436 }

2437

2438

2440 return buildInstr(TargetOpcode::G_BITREVERSE, {Dst}, {Src});

2441 }

2442

2443

2445 return buildInstr(TargetOpcode::G_GET_FPENV, {Dst}, {});

2446 }

2447

2448

2450 return buildInstr(TargetOpcode::G_SET_FPENV, {}, {Src});

2451 }

2452

2453

2455 return buildInstr(TargetOpcode::G_RESET_FPENV, {}, {});

2456 }

2457

2458

2460 return buildInstr(TargetOpcode::G_GET_FPMODE, {Dst}, {});

2461 }

2462

2463

2465 return buildInstr(TargetOpcode::G_SET_FPMODE, {}, {Src});

2466 }

2467

2468

2470 return buildInstr(TargetOpcode::G_RESET_FPMODE, {}, {});

2471 }

2472

2473

2475 return buildInstr(TargetOpcode::G_GET_ROUNDING, {Dst}, {});

2476 }

2477

2478

2480 return buildInstr(TargetOpcode::G_SET_ROUNDING, {}, {Src});

2481 }

2482

2485 std::optional Flags = std::nullopt);

2486};

2487

2488}

2489#endif

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

static const Function * getParent(const Value *V)

Analysis containing CSE Info

static ManagedStatic< cl::opt< bool, true >, CreateDebug > Debug

This contains common code to allow clients to notify changes to machine instr.

Module.h This file contains the declarations for the Module class.

const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]

uint64_t IntrinsicInst * II

This file describes how to lower LLVM code to machine code.

Class for arbitrary precision integers.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

The address of a basic block.

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

ConstantFP - Floating Point Values [float, double].

This is the shared class of boolean and integer constants.

A signed pointer, in the ptrauth sense.

This is an important base class in LLVM.

A parsed version of the target data layout string in and methods for querying it.

Definition MachineIRBuilder.h:72

DstOp(const LLT T)

Definition MachineIRBuilder.h:85

DstOp(unsigned R)

Definition MachineIRBuilder.h:82

DstOp(Register R)

Definition MachineIRBuilder.h:83

void addDefToMIB(MachineRegisterInfo &MRI, MachineInstrBuilder &MIB) const

Definition MachineIRBuilder.h:92

LLT getLLTTy(const MachineRegisterInfo &MRI) const

Definition MachineIRBuilder.h:109

MachineRegisterInfo::VRegAttrs Attrs

Definition MachineIRBuilder.h:77

LLT LLTTy

Definition MachineIRBuilder.h:74

DstOp(MachineRegisterInfo::VRegAttrs Attrs)

Definition MachineIRBuilder.h:87

DstType

Definition MachineIRBuilder.h:81

@ Ty_VRegAttrs

Definition MachineIRBuilder.h:81

@ Ty_LLT

Definition MachineIRBuilder.h:81

@ Ty_Reg

Definition MachineIRBuilder.h:81

@ Ty_RC

Definition MachineIRBuilder.h:81

DstOp(const MachineOperand &Op)

Definition MachineIRBuilder.h:84

MachineRegisterInfo::VRegAttrs getVRegAttrs() const

Definition MachineIRBuilder.h:133

DstType getDstOpKind() const

Definition MachineIRBuilder.h:138

const TargetRegisterClass * RC

Definition MachineIRBuilder.h:76

const TargetRegisterClass * getRegClass() const

Definition MachineIRBuilder.h:128

DstOp(const TargetRegisterClass *TRC)

Definition MachineIRBuilder.h:86

DstOp(RegClassOrRegBank RCOrRB, LLT Ty)

Definition MachineIRBuilder.h:89

Register getReg() const

Definition MachineIRBuilder.h:123

Register Reg

Definition MachineIRBuilder.h:75

Abstract class that contains various methods for clients to notify about changes.

This is an important class for using LLVM in a threaded context.

MachineInstrBundleIterator< MachineInstr > iterator

MachineInstrBuilder buildFPTOUI_SAT(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_FPTOUI_SAT Src0.

Definition MachineIRBuilder.h:2226

MachineInstrBuilder buildFSub(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_FSUB Op0, Op1.

Definition MachineIRBuilder.h:2086

MachineInstrBuilder buildFPTOSI(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_FPTOSI Src0.

Definition MachineIRBuilder.h:2221

GISelChangeObserver * getObserver()

Definition MachineIRBuilder.h:388

MachineInstrBuilder buildFMul(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1939

MachineInstrBuilder insertInstr(MachineInstrBuilder MIB)

Insert an existing instruction at the insertion point.

MachineInstrBuilder buildFLdexp(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Dst = G_FLDEXP Src0, Src1.

Definition MachineIRBuilder.h:2173

MachineInstrBuilder buildFreeze(const DstOp &Dst, const SrcOp &Src)

Build and insert Dst = G_FREEZE Src.

Definition MachineIRBuilder.h:1828

MachineInstrBuilder buildTruncUSatU(const DstOp &Res, const SrcOp &Op)

Build and insert Res = G_TRUNC_USAT_U Op.

Definition MachineIRBuilder.h:889

MachineInstrBuilder buildModf(const DstOp &Fract, const DstOp &Int, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)

Build and insert Fract, Int = G_FMODF Src.

Definition MachineIRBuilder.h:2193

void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II)

Set the insertion point before the specified position.

Definition MachineIRBuilder.h:340

const MachineFunction & getMF() const

Definition MachineIRBuilder.h:294

LLVMContext & getContext() const

Definition MachineIRBuilder.h:303

MachineInstrBuilder buildAdd(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_ADD Op0, Op1.

Definition MachineIRBuilder.h:1853

MachineInstrBuilder buildResetFPMode()

Build and insert G_RESET_FPMODE.

Definition MachineIRBuilder.h:2469

MachineInstrBuilder buildFPExt(const DstOp &Res, const SrcOp &Op, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_FPEXT Op.

Definition MachineIRBuilder.h:747

MachineInstrBuilder buildNot(const DstOp &Dst, const SrcOp &Src0)

Build and insert a bitwise not, NegOne = G_CONSTANT -1 Res = G_OR Op0, NegOne.

Definition MachineIRBuilder.h:2028

Value * getDeactivationSymbol()

Definition MachineIRBuilder.h:410

MachineInstrBuilder buildFPTOSI_SAT(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_FPTOSI_SAT Src0.

Definition MachineIRBuilder.h:2231

MachineInstrBuilder buildVecReduceSeqFAdd(const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)

Build and insert Res = G_VECREDUCE_SEQ_FADD ScalarIn, VecIn.

Definition MachineIRBuilder.h:2284

MachineInstrBuilder buildAtomicRMWUSubSat(const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)

Build and insert OldValRes = G_ATOMICRMW_USUB_SAT Addr, Val, MMO.

MachineInstrBuilder buildRotateRight(const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt)

Build and insert Dst = G_ROTR Src, Amt.

Definition MachineIRBuilder.h:2427

MachineInstrBuilder buildCTTZ(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_CTTZ Op0, Src0.

Definition MachineIRBuilder.h:2057

virtual ~MachineIRBuilder()=default

MachineInstrBuilder buildVecReduceOr(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_OR Src.

Definition MachineIRBuilder.h:2360

MachineInstrBuilder buildFLog2(const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)

Build and insert Dst = G_FLOG2 Src.

Definition MachineIRBuilder.h:2153

MachineInstrBuilder buildAShr(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1981

MachineInstrBuilder buildGetRounding(const DstOp &Dst)

Build and insert Dst = G_GET_ROUNDING.

Definition MachineIRBuilder.h:2474

MachineInstrBuilder buildFAbs(const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_FABS Op0.

Definition MachineIRBuilder.h:2120

MachineInstrBuilder buildFence(unsigned Ordering, unsigned Scope)

Build and insert G_FENCE Ordering, Scope.

MachineInstrBuilder buildFMinNumIEEE(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1958

MachineInstrBuilder buildFMA(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, const SrcOp &Src2, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_FMA Op0, Op1, Op2.

Definition MachineIRBuilder.h:2100

MachineInstrBuilder buildGetFPMode(const DstOp &Dst)

Build and insert Dst = G_GET_FPMODE.

Definition MachineIRBuilder.h:2459

MachineInstrBuilder buildSMulH(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1926

GISelCSEInfo * getCSEInfo()

Definition MachineIRBuilder.h:331

MachineInstrBuilder buildVecReduceFMax(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_FMAX Src.

Definition MachineIRBuilder.h:2323

MachineInstrBuilder buildMul(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_MUL Op0, Op1.

Definition MachineIRBuilder.h:1886

MachineInstrBuilder buildAnd(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_AND Op0, Op1.

Definition MachineIRBuilder.h:1998

const TargetInstrInfo & getTII()

Definition MachineIRBuilder.h:283

MachineInstrBuilder buildSAdde(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)

Build and insert Res, CarryOut = G_SADDE Op0, Op1, CarryInp.

Definition MachineIRBuilder.h:696

MachineInstrBuilder buildTruncSSatU(const DstOp &Res, const SrcOp &Op)

Build and insert Res = G_TRUNC_SSAT_U Op.

Definition MachineIRBuilder.h:875

MachineInstrBuilder buildURem(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_UREM Op0, Op1.

Definition MachineIRBuilder.h:1933

MachineInstrBuilder buildSAddo(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)

Build and insert Res, CarryOut = G_SADDO Op0, Op1.

Definition MachineIRBuilder.h:655

MachineInstrBuilder buildFPTOUI(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_FPTOUI Src0.

Definition MachineIRBuilder.h:2216

MachineInstrBuilder buildLShr(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1975

MachineInstrBuilder buildFPow(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Dst = G_FPOW Src0, Src1.

Definition MachineIRBuilder.h:2165

MachineInstrBuilder buildIntrinsicTrunc(const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)

Build and insert Dst = G_INTRINSIC_TRUNC Src0.

Definition MachineIRBuilder.h:2134

MachineBasicBlock::iterator getInsertPt()

Current insertion point for new instructions.

Definition MachineIRBuilder.h:335

MachineInstrBuilder buildVecReduceSeqFMul(const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)

Build and insert Res = G_VECREDUCE_SEQ_FMUL ScalarIn, VecIn.

Definition MachineIRBuilder.h:2295

MachineInstrBuilder buildAtomicRMWUSubCond(const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)

Build and insert OldValRes = G_ATOMICRMW_USUB_COND Addr, Val, MMO.

MachineInstrBuilder buildSub(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_SUB Op0, Op1.

Definition MachineIRBuilder.h:1870

void setInstr(MachineInstr &MI)

Set the insertion point to before MI.

Definition MachineIRBuilder.h:367

MDNode * getPCSections()

Get the current instruction's PC sections metadata.

Definition MachineIRBuilder.h:405

MachineInstrBuilder buildBSwap(const DstOp &Dst, const SrcOp &Src0)

Build and insert Dst = G_BSWAP Src0.

Definition MachineIRBuilder.h:2067

MachineInstrBuilder buildVecReduceFMul(const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)

Build and insert Res = G_VECREDUCE_FMUL Src.

Definition MachineIRBuilder.h:2316

MachineInstrBuilder buildCTLZ_ZERO_UNDEF(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_CTLZ_ZERO_UNDEF Op0, Src0.

Definition MachineIRBuilder.h:2052

MachineInstrBuilder buildAddrSpaceCast(const DstOp &Dst, const SrcOp &Src)

Build and insert Dst = G_ADDRSPACE_CAST Src.

Definition MachineIRBuilder.h:768

MachineInstrBuilder buildFExp2(const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)

Build and insert Dst = G_FEXP2 Src.

Definition MachineIRBuilder.h:2159

MachineInstrBuilder buildSetFPMode(const SrcOp &Src)

Build and insert G_SET_FPMODE Src.

Definition MachineIRBuilder.h:2464

MachineInstrBuilder buildIntToPtr(const DstOp &Dst, const SrcOp &Src)

Build and insert a G_INTTOPTR instruction.

Definition MachineIRBuilder.h:758

MachineInstrBuilder buildUSubo(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)

Build and insert Res, CarryOut = G_USUBO Op0, Op1.

Definition MachineIRBuilder.h:649

MachineInstrBuilder buildVecReduceFAdd(const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)

Build and insert Res = G_VECREDUCE_FADD Src.

Definition MachineIRBuilder.h:2306

MachineIRBuilder(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt)

Definition MachineIRBuilder.h:263

MachineInstrBuilder buildAbdu(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_ABDU Op0, Op1.

Definition MachineIRBuilder.h:1915

MachineInstrBuilder buildVecReduceFMinimum(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_FMINIMUM Src.

Definition MachineIRBuilder.h:2339

MachineInstrBuilder buildNeg(const DstOp &Dst, const SrcOp &Src0)

Build and insert integer negation Zero = G_CONSTANT 0 Res = G_SUB Zero, Op0.

Definition MachineIRBuilder.h:2036

MachineInstrBuilder buildVecReduceSMin(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_SMIN Src.

Definition MachineIRBuilder.h:2375

MachineInstrBuilder buildCTLZ(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_CTLZ Op0, Src0.

Definition MachineIRBuilder.h:2047

MachineInstrBuilder buildSMax(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_SMAX Op0, Op1.

Definition MachineIRBuilder.h:2250

MachineInstrBuilder buildAssertZExt(const DstOp &Res, const SrcOp &Op, unsigned Size)

Build and insert Res = G_ASSERT_ZEXT Op, Size.

Definition MachineIRBuilder.h:1010

void recordInsertion(MachineInstr *InsertedInstr) const

Definition MachineIRBuilder.h:253

MachineInstrBuilder buildUMulH(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1920

MachineInstrBuilder buildStrictFAdd(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_STRICT_FADD Op0, Op1.

Definition MachineIRBuilder.h:2080

MachineInstrBuilder buildVecReduceXor(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_XOR Src.

Definition MachineIRBuilder.h:2365

MachineInstrBuilder buildVecReduceFMin(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_FMIN Src.

Definition MachineIRBuilder.h:2328

MachineInstrBuilder buildFDiv(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_FDIV Op0, Op1.

Definition MachineIRBuilder.h:2093

const GISelCSEInfo * getCSEInfo() const

Definition MachineIRBuilder.h:332

MachineInstrBuilder buildSetRounding(const SrcOp &Src)

Build and insert G_SET_ROUNDING.

Definition MachineIRBuilder.h:2479

MachineInstrBuilder buildExtractVectorElement(const DstOp &Res, const SrcOp &Val, const SrcOp &Idx)

Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx.

MachineInstrBuilder buildLoad(const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO)

Build and insert Res = G_LOAD Addr, MMO.

Definition MachineIRBuilder.h:1041

MachineBasicBlock & getMBB()

Definition MachineIRBuilder.h:326

MachineIRBuilder(MachineInstr &MI)

Definition MachineIRBuilder.h:268

MachineInstrBuilder buildExtractVectorElementConstant(const DstOp &Res, const SrcOp &Val, const int Idx)

Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx.

Definition MachineIRBuilder.h:1457

void stopObservingChanges()

Definition MachineIRBuilder.h:390

MachineInstrBuilder buildCTTZ_ZERO_UNDEF(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_CTTZ_ZERO_UNDEF Op0, Src0.

Definition MachineIRBuilder.h:2062

MachineInstrBuilder buildBitReverse(const DstOp &Dst, const SrcOp &Src)

Build and insert Dst = G_BITREVERSE Src.

Definition MachineIRBuilder.h:2439

MachineInstrBuilder buildShl(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1969

MachineInstrBuilder buildUITOFP(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_UITOFP Src0.

Definition MachineIRBuilder.h:2206

MachineInstrBuilder buildInstr(unsigned Opcode)

Build and insert = Opcode .

Definition MachineIRBuilder.h:423

MachineInstrBuilder buildSITOFP(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_SITOFP Src0.

Definition MachineIRBuilder.h:2211

MachineIRBuilder(MachineInstr &MI, GISelChangeObserver &Observer)

Definition MachineIRBuilder.h:274

MachineInstrBuilder buildFMAD(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, const SrcOp &Src2, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_FMAD Op0, Op1, Op2.

Definition MachineIRBuilder.h:2107

MachineInstrBuilder buildAbds(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_ABDS Op0, Op1.

Definition MachineIRBuilder.h:1901

MachineInstrBuilder buildFLog(const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)

Build and insert Dst = G_FLOG Src.

Definition MachineIRBuilder.h:2147

void validateSelectOp(const LLT ResTy, const LLT TstTy, const LLT Op0Ty, const LLT Op1Ty)

MachineInstrBuilder buildVecReduceUMax(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_UMAX Src.

Definition MachineIRBuilder.h:2380

const DebugLoc & getDL()

Getter for DebugLoc.

Definition MachineIRBuilder.h:308

MachineInstrBuilder buildUbfx(const DstOp &Dst, const SrcOp &Src, const SrcOp &LSB, const SrcOp &Width)

Build and insert Dst = G_UBFX Src, LSB, Width.

Definition MachineIRBuilder.h:2421

const MachineRegisterInfo * getMRI() const

Definition MachineIRBuilder.h:312

MachineInstrBuilder buildCTPOP(const DstOp &Dst, const SrcOp &Src0)

Build and insert Res = G_CTPOP Op0, Src0.

Definition MachineIRBuilder.h:2042

MachineInstrBuilder buildAbs(const DstOp &Dst, const SrcOp &Src)

Build and insert Dst = G_ABS Src.

Definition MachineIRBuilder.h:2268

void validateBinaryOp(const LLT Res, const LLT Op0, const LLT Op1)

MachineInstrBuilder buildVecReduceAnd(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_AND Src.

Definition MachineIRBuilder.h:2355

MachineInstrBuilder buildVecReduceFMaximum(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_FMAXIMUM Src.

Definition MachineIRBuilder.h:2333

void validateShiftOp(const LLT Res, const LLT Op0, const LLT Op1)

MachineFunction & getMF()

Getter for the function we currently build.

Definition MachineIRBuilder.h:289

MachineIRBuilder(MachineFunction &MF)

Definition MachineIRBuilder.h:261

MachineIRBuilder(const MachineIRBuilderState &BState)

Definition MachineIRBuilder.h:281

MachineInstrBuilder buildTruncSSatS(const DstOp &Res, const SrcOp &Op)

Build and insert Res = G_TRUNC_SSAT_S Op.

Definition MachineIRBuilder.h:861

MachineInstrBuilder buildMemCpy(const SrcOp &DstPtr, const SrcOp &SrcPtr, const SrcOp &Size, MachineMemOperand &DstMMO, MachineMemOperand &SrcMMO)

Definition MachineIRBuilder.h:2402

MachineInstrBuilder buildAssertAlign(const DstOp &Res, const SrcOp &Op, Align AlignVal)

Build and insert Res = G_ASSERT_ALIGN Op, AlignVal.

Definition MachineIRBuilder.h:1026

MachineInstrBuilder buildSbfx(const DstOp &Dst, const SrcOp &Src, const SrcOp &LSB, const SrcOp &Width)

Build and insert Dst = G_SBFX Src, LSB, Width.

Definition MachineIRBuilder.h:2415

MachineInstrBuilder buildFMaxNum(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1952

MachineInstrBuilder buildSMin(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_SMIN Op0, Op1.

Definition MachineIRBuilder.h:2244

MachineInstrBuilder buildFMinNum(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1946

MachineInstrBuilder buildVecReduceUMin(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_UMIN Src.

Definition MachineIRBuilder.h:2385

void setInstrAndDebugLoc(MachineInstr &MI)

Set the insertion point to before MI, and set the debug loc to MI's loc.

Definition MachineIRBuilder.h:379

void setMMRAMetadata(MDNode *MMRA)

Set the PC sections metadata to MD for all the next build instructions.

Definition MachineIRBuilder.h:408

MachineInstrBuilder buildSSube(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)

Build and insert Res, CarryOut = G_SSUBE Op0, Op1, CarryInp.

Definition MachineIRBuilder.h:704

void setDeactivationSymbol(Value *DS)

Definition MachineIRBuilder.h:411

MachineInstrBuilder buildIntrinsicRoundeven(const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)

Build and insert Dst = G_INTRINSIC_ROUNDEVEN Src0, Src1.

Definition MachineIRBuilder.h:2237

MachineInstrBuilder buildResetFPEnv()

Build and insert G_RESET_FPENV.

Definition MachineIRBuilder.h:2454

void setPCSections(MDNode *MD)

Set the PC sections metadata to MD for all the next build instructions.

Definition MachineIRBuilder.h:402

MachineInstrBuilder buildVecReduceAdd(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_ADD Src.

Definition MachineIRBuilder.h:2345

MachineInstrBuilder buildIsFPClass(const DstOp &Res, const SrcOp &Src, unsigned Mask)

Build and insert a Res = G_IS_FPCLASS Src, Mask.

Definition MachineIRBuilder.h:1415

MachineInstrBuilder buildUAdde(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)

Build and insert Res, CarryOut = G_UADDE Op0, Op1, CarryIn.

Definition MachineIRBuilder.h:680

void setDebugLoc(const DebugLoc &DL)

Set the debug location to DL for all the next build instructions.

Definition MachineIRBuilder.h:396

MachineInstrBuilder buildGetFPEnv(const DstOp &Dst)

Build and insert Dst = G_GET_FPENV.

Definition MachineIRBuilder.h:2444

MachineInstrBuilder buildFCopysign(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_FCOPYSIGN Op0, Op1.

Definition MachineIRBuilder.h:2200

MachineInstrBuilder buildSSubo(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)

Build and insert Res, CarryOut = G_SUBO Op0, Op1.

Definition MachineIRBuilder.h:661

bool isObservingChanges() const

Definition MachineIRBuilder.h:392

MachineInstrBuilder buildUSube(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)

Build and insert Res, CarryOut = G_USUBE Op0, Op1, CarryInp.

Definition MachineIRBuilder.h:688

const MachineBasicBlock & getMBB() const

Getter for the basic block we currently build.

Definition MachineIRBuilder.h:321

MachineInstrBuilder buildFNeg(const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_FNEG Op0.

Definition MachineIRBuilder.h:2114

void setMBB(MachineBasicBlock &MBB)

Set the insertion point to the end of MBB.

Definition MachineIRBuilder.h:358

MachineInstrBuilder buildBitcast(const DstOp &Dst, const SrcOp &Src)

Build and insert Dst = G_BITCAST Src.

Definition MachineIRBuilder.h:763

const DebugLoc & getDebugLoc()

Get the current instruction's debug location.

Definition MachineIRBuilder.h:399

MachineInstrBuilder buildUAddo(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)

Build and insert Res, CarryOut = G_UADDO Op0, Op1.

Definition MachineIRBuilder.h:643

void setCSEInfo(GISelCSEInfo *Info)

Definition MachineIRBuilder.h:349

MachineInstrBuilder buildFMaxNumIEEE(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Definition MachineIRBuilder.h:1964

MachineInstrBuilder buildTrap(bool Debug=false)

Build and insert G_TRAP or G_DEBUGTRAP.

Definition MachineIRBuilder.h:2410

MachineInstrBuilder buildFFloor(const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = GFFLOOR Op0, Op1.

Definition MachineIRBuilder.h:2141

MachineInstrBuilder buildFFrexp(const DstOp &Fract, const DstOp &Exp, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)

Build and insert Fract, Exp = G_FFREXP Src.

Definition MachineIRBuilder.h:2180

MachineIRBuilder()=default

Some constructors for easy use.

MachineRegisterInfo * getMRI()

Getter for MRI.

Definition MachineIRBuilder.h:311

MachineInstrBuilder buildOr(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_OR Op0, Op1.

Definition MachineIRBuilder.h:2013

MachineInstrBuilder buildFSincos(const DstOp &Sin, const DstOp &Cos, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)

Build and insert Sin, Cos = G_FSINCOS Src.

Definition MachineIRBuilder.h:2187

MachineIRBuilderState & getState()

Getter for the State.

Definition MachineIRBuilder.h:315

MachineInstrBuilder buildAssertInstr(unsigned Opc, const DstOp &Res, const SrcOp &Op, unsigned Val)

Build and insert G_ASSERT_SEXT, G_ASSERT_ZEXT, or G_ASSERT_ALIGN.

Definition MachineIRBuilder.h:1002

void validateTruncExt(const LLT Dst, const LLT Src, bool IsExtend)

MachineInstrBuilder buildInstrNoInsert(unsigned Opcode)

Build but don't insert = Opcode .

MachineInstrBuilder buildPtrMask(const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1)

Build and insert Res = G_PTRMASK Op0, Op1.

Definition MachineIRBuilder.h:582

MachineInstrBuilder buildVecReduceSMax(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_SMAX Src.

Definition MachineIRBuilder.h:2370

MachineInstrBuilder buildMemTransferInst(unsigned Opcode, const SrcOp &DstPtr, const SrcOp &SrcPtr, const SrcOp &Size, MachineMemOperand &DstMMO, MachineMemOperand &SrcMMO)

Build and insert G_MEMCPY or G_MEMMOVE.

Definition MachineIRBuilder.h:2390

void validateUnaryOp(const LLT Res, const LLT Op0)

MDNode * getMMRAMetadata()

Get the current instruction's MMRA metadata.

Definition MachineIRBuilder.h:414

MachineInstrBuilder buildPrefetch(const SrcOp &Addr, unsigned RW, unsigned Locality, unsigned CacheType, MachineMemOperand &MMO)

Build and insert G_PREFETCH Addr, RW, Locality, CacheType.

const DataLayout & getDataLayout() const

Definition MachineIRBuilder.h:299

MachineInstrBuilder buildLoadInstr(unsigned Opcode, const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO)

Build and insert Res = Addr, MMO.

void setMF(MachineFunction &MF)

MachineInstrBuilder buildAssertSExt(const DstOp &Res, const SrcOp &Op, unsigned Size)

Build and insert Res = G_ASSERT_SEXT Op, Size.

Definition MachineIRBuilder.h:1018

MachineInstrBuilder buildXor(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_XOR Op0, Op1.

Definition MachineIRBuilder.h:2020

void setState(const MachineIRBuilderState &NewState)

Setter for the State.

Definition MachineIRBuilder.h:318

void setChangeObserver(GISelChangeObserver &Observer)

Definition MachineIRBuilder.h:384

virtual MachineInstrBuilder buildConstant(const DstOp &Res, const ConstantInt &Val)

Build and insert Res = G_CONSTANT Val.

MachineInstrBuilder buildVecReduceMul(const DstOp &Dst, const SrcOp &Src)

Build and insert Res = G_VECREDUCE_MUL Src.

Definition MachineIRBuilder.h:2350

MachineInstrBuilder buildUMin(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_UMIN Op0, Op1.

Definition MachineIRBuilder.h:2256

MachineInstrBuilder buildUMax(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)

Build and insert Res = G_UMAX Op0, Op1.

Definition MachineIRBuilder.h:2262

MachineInstrBuilder buildFAdd(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)

Build and insert Res = G_FADD Op0, Op1.

Definition MachineIRBuilder.h:2072

MachineInstrBuilder buildSetFPEnv(const SrcOp &Src)

Build and insert G_SET_FPENV Src.

Definition MachineIRBuilder.h:2449

MachineInstrBuilder buildPtrToInt(const DstOp &Dst, const SrcOp &Src)

Build and insert a G_PTRTOINT instruction.

Definition MachineIRBuilder.h:753

MachineInstrBuilder buildFCanonicalize(const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)

Build and insert Dst = G_FCANONICALIZE Src0.

Definition MachineIRBuilder.h:2127

MachineInstrBuilder buildSExtInReg(const DstOp &Res, const SrcOp &Op, int64_t ImmOp)

Build and insert Res = G_SEXT_INREG Op, ImmOp.

Definition MachineIRBuilder.h:742

MachineInstrBuilder buildRotateLeft(const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt)

Build and insert Dst = G_ROTL Src, Amt.

Definition MachineIRBuilder.h:2433

const MachineInstrBuilder & addImm(int64_t Val) const

Add a new immediate operand.

const MachineInstrBuilder & addPredicate(CmpInst::Predicate Pred) const

const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const

Add a virtual register use operand.

const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const

Add a virtual register definition operand.

Representation of each machine instruction.

A description of a memory reference used in the backend.

Flags

Flags values. These may be or'd together.

MachineOperand class - Representation of each machine instruction operand.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

Definition MachineIRBuilder.h:144

SrcType

Definition MachineIRBuilder.h:153

@ Ty_MIB

Definition MachineIRBuilder.h:153

@ Ty_Predicate

Definition MachineIRBuilder.h:153

@ Ty_Imm

Definition MachineIRBuilder.h:153

@ Ty_Reg

Definition MachineIRBuilder.h:153

int64_t Imm

Definition MachineIRBuilder.h:149

SrcOp(const MachineInstrBuilder &MIB)

Definition MachineIRBuilder.h:156

SrcOp(int64_t V)

Definition MachineIRBuilder.h:164

SrcOp(const CmpInst::Predicate P)

Definition MachineIRBuilder.h:157

SrcOp(uint64_t V)

Definition MachineIRBuilder.h:163

MachineInstrBuilder SrcMIB

Definition MachineIRBuilder.h:146

CmpInst::Predicate getPredicate() const

Definition MachineIRBuilder.h:209

SrcType getSrcOpKind() const

Definition MachineIRBuilder.h:227

CmpInst::Predicate Pred

Definition MachineIRBuilder.h:148

int64_t getImm() const

Definition MachineIRBuilder.h:218

Register Reg

Definition MachineIRBuilder.h:147

LLT getLLTTy(const MachineRegisterInfo &MRI) const

Definition MachineIRBuilder.h:183

SrcOp(const MachineOperand &Op)

Definition MachineIRBuilder.h:155

void addSrcToMIB(MachineInstrBuilder &MIB) const

Definition MachineIRBuilder.h:166

SrcOp(unsigned)=delete

Use of registers held in unsigned integer variables (or more rarely signed integers) is no longer per...

Register getReg() const

Definition MachineIRBuilder.h:196

SrcOp(Register R)

Definition MachineIRBuilder.h:154

TargetInstrInfo - Interface to description of machine instruction set.

LLT getVectorIdxLLT(const DataLayout &DL) const

Returns the type to be used for the index operand of: G_INSERT_VECTOR_ELT, G_EXTRACT_VECTOR_ELT,...

This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...

LLVM Value Representation.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

@ C

The default llvm calling convention, compatible with C.

This is an optimization pass for GlobalISel generic memory operations.

PointerUnion< const TargetRegisterClass *, const RegisterBank * > RegClassOrRegBank

Convenient type to represent either a register class or a register bank.

DWARFExpression::Operation Op

A collection of metadata nodes that might be associated with a memory access used by the alias-analys...

This struct is a compact representation of a valid (non-zero power of two) alignment.

constexpr uint64_t value() const

This is a hole in the type system and should not be abused.

Class which stores all the state required in a MachineIRBuilder.

Definition MachineIRBuilder.h:46

MachineFunction * MF

MachineFunction under construction.

Definition MachineIRBuilder.h:48

MachineBasicBlock * MBB

Definition MachineIRBuilder.h:63

Value * DS

Definition MachineIRBuilder.h:59

MDNode * MMRA

MMRA Metadata to be set on any instruction we create.

Definition MachineIRBuilder.h:58

DebugLoc DL

Debug location to be set to any instruction we create.

Definition MachineIRBuilder.h:54

GISelCSEInfo * CSEInfo

Definition MachineIRBuilder.h:69

const TargetInstrInfo * TII

Information used to access the description of the opcodes.

Definition MachineIRBuilder.h:50

MDNode * PCSections

PC sections metadata to be set to any instruction we create.

Definition MachineIRBuilder.h:56

MachineBasicBlock::iterator II

Definition MachineIRBuilder.h:64

MachineRegisterInfo * MRI

Information used to verify types are consistent and to create virtual registers.

Definition MachineIRBuilder.h:52

GISelChangeObserver * Observer

Definition MachineIRBuilder.h:67

This class contains a discriminated union of information about pointers in memory operands,...

All attributes(register class or bank and low-level type) a virtual register can have.