LLVM: llvm::SrcOp Class Reference (original) (raw)
#include "[llvm/CodeGen/GlobalISel/MachineIRBuilder.h](MachineIRBuilder%5F8h%5Fsource.html)"
| Public Types | |
|---|---|
| enum class | SrcType { Ty_Reg, Ty_MIB, Ty_Predicate, Ty_Imm } |
| Public Member Functions | |
|---|---|
| SrcOp (Register R) | |
| SrcOp (const MachineOperand &Op) | |
| SrcOp (const MachineInstrBuilder &MIB) | |
| SrcOp (const CmpInst::Predicate P) | |
| SrcOp (unsigned)=delete | |
| Use of registers held in unsigned integer variables (or more rarely signed integers) is no longer permitted to avoid ambiguity with upcoming support for immediates. | |
| SrcOp (int)=delete | |
| SrcOp (uint64_t V) | |
| SrcOp (int64_t V) | |
| void | addSrcToMIB (MachineInstrBuilder &MIB) const |
| LLT | getLLTTy (const MachineRegisterInfo &MRI) const |
| Register | getReg () const |
| CmpInst::Predicate | getPredicate () const |
| int64_t | getImm () const |
| SrcType | getSrcOpKind () const |
Definition at line 144 of file MachineIRBuilder.h.
◆ SrcType
| enum class llvm::SrcOp::SrcType | strong |
|---|
◆ SrcOp() [1/8]
◆ SrcOp() [2/8]
◆ SrcOp() [3/8]
◆ SrcOp() [4/8]
◆ SrcOp() [5/8]
Use of registers held in unsigned integer variables (or more rarely signed integers) is no longer permitted to avoid ambiguity with upcoming support for immediates.
◆ SrcOp() [6/8]
| llvm::SrcOp::SrcOp ( int ) | delete |
|---|
◆ SrcOp() [7/8]
◆ SrcOp() [8/8]
| llvm::SrcOp::SrcOp ( int64_t V) | inline |
|---|
◆ addSrcToMIB()
Definition at line 166 of file MachineIRBuilder.h.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addPredicate(), llvm::MachineInstrBuilder::addUse(), Imm, Pred, Reg, SrcMIB, Ty_Imm, Ty_MIB, Ty_Predicate, and Ty_Reg.
Referenced by llvm::MachineIRBuilder::buildAtomicCmpXchg(), llvm::MachineIRBuilder::buildAtomicCmpXchgWithSuccess(), llvm::MachineIRBuilder::buildAtomicRMW(), llvm::MachineIRBuilder::buildBrCond(), llvm::MachineIRBuilder::buildLoadInstr(), llvm::MachineIRBuilder::buildPrefetch(), and llvm::MachineIRBuilder::buildStore().
◆ getImm()
| int64_t llvm::SrcOp::getImm ( ) const | inline |
|---|
◆ getLLTTy()
Definition at line 183 of file MachineIRBuilder.h.
References llvm_unreachable, MRI, Reg, SrcMIB, Ty_Imm, Ty_MIB, Ty_Predicate, and Ty_Reg.
Referenced by llvm::MachineIRBuilder::buildAtomicCmpXchg(), llvm::MachineIRBuilder::buildAtomicCmpXchgWithSuccess(), llvm::MachineIRBuilder::buildAtomicRMW(), llvm::MachineIRBuilder::buildBrCond(), llvm::MachineIRBuilder::buildDeleteTrailingVectorElements(), llvm::MachineIRBuilder::buildLoadInstr(), llvm::MachineIRBuilder::buildPadVectorWithUndefElements(), llvm::MachineIRBuilder::buildPtrAdd(), llvm::MachineIRBuilder::buildShuffleVector(), llvm::MachineIRBuilder::buildStore(), llvm::MachineIRBuilder::buildStore(), and llvm::LegalizerHelper::createStackStoreLoad().
◆ getPredicate()
◆ getReg()
| Register llvm::SrcOp::getReg ( ) const | inline |
|---|
Definition at line 196 of file MachineIRBuilder.h.
References llvm_unreachable, Reg, SrcMIB, Ty_Imm, Ty_MIB, Ty_Predicate, and Ty_Reg.
Referenced by llvm::CSEMIRBuilder::buildInstr(), llvm::MachineIRBuilder::buildPadVectorWithUndefElements(), buildSplatSplitS64WithVL(), convertImageAddrToPacked(), llvm::SPIRVInstrInfo::copyPhysReg(), llvm::SIInstrInfo::expandMovDPP64(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::AMDGPURegisterBankInfo::getDefaultMappingSOP(), llvm::SIInstrInfo::getInstructionUniformity(), isCopyOf(), isCopyOfBundle(), llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), lookUpCopyChain(), packImage16bitOpsToDwords(), SrcOp(), and llvm::SIInstrInfo::verifyInstruction().
◆ getSrcOpKind()
| SrcType llvm::SrcOp::getSrcOpKind ( ) const | inline |
|---|
◆ Imm
◆ Pred
◆ Reg
◆ SrcMIB
The documentation for this class was generated from the following file:
- include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h