LLVM: lib/Target/Mips/MipsISelDAGToDAG.cpp Source File (original) (raw)
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28using namespace llvm;
29
30#define DEBUG_TYPE "mips-isel"
31#define PASS_NAME "MIPS DAG->DAG Pattern Instruction Selection"
32
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48
52
53 processFunctionAfterISel(MF);
54
55 return Ret;
56}
57
58
59
63 CurDAG->getDataLayout()))
64 .getNode();
65}
66
67
68
72 return false;
73}
74
78 return false;
79}
80
84 return false;
85}
86
90 return false;
91}
92
96 return false;
97}
98
102 return false;
103}
104
105bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
108 return false;
109}
110
111bool MipsDAGToDAGISel::selectIntAddrSImm10(SDValue Addr, SDValue &Base,
114 return false;
115}
116
117bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base,
120 return false;
121}
122
123bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base,
126 return false;
127}
128
129bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base,
132 return false;
133}
134
138 return false;
139}
140
144 return false;
145}
146
147bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm,
148 unsigned MinSizeInBits) const {
150 return false;
151}
152
154 unsigned ImmBitSize) const {
156}
157
158bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
160 return false;
161}
162
163bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
165 return false;
166}
167
168bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
170 return false;
171}
172
173bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
175 return false;
176}
177
178bool MipsDAGToDAGISel::selectVSplatImmEq1(SDValue N) const {
180}
181
182
183
184
185bool MipsDAGToDAGISel::selectVecAddAsVecSubIfProfitable(SDNode *Node) {
186 assert(Node->getOpcode() == ISD::ADD && "Should only get 'add' here.");
187
188 EVT VT = Node->getValueType(0);
189 assert(VT.isVector() && "Should only be called for vectors.");
190
193
195 if (!BVN)
196 return false;
197
198 APInt SplatValue, SplatUndef;
199 unsigned SplatBitSize;
200 bool HasAnyUndefs;
201
202 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs,
204 return false;
205
206 auto IsInlineConstant = [](const APInt &Imm) { return Imm.isIntN(5); };
207
208 if (IsInlineConstant(SplatValue))
209 return false;
210
211 APInt NegSplatValue = 0 - SplatValue;
212 if (!IsInlineConstant(NegSplatValue))
213 return false;
214
215 SDLoc DL(Node);
216
219 assert(NegC && "Constant-folding failed!");
221
223 SelectCode(NewNode.getNode());
224 return true;
225}
226
227
228
229void MipsDAGToDAGISel::Select(SDNode *Node) {
230 unsigned Opcode = Node->getOpcode();
231
232
233 if (Node->isMachineOpcode()) {
235 Node->setNodeId(-1);
236 return;
237 }
238
239
240 if (trySelect(Node))
241 return;
242
243 switch(Opcode) {
244 default: break;
245
247 if (Node->getSimpleValueType(0).isVector() &&
248 selectVecAddAsVecSubIfProfitable(Node))
249 return;
250 break;
251
252
255 return;
256
257#ifndef NDEBUG
258 case ISD::LOAD:
259 case ISD::STORE:
263 "Unexpected unaligned loads/stores.");
264 break;
265#endif
266 }
267
268
269 SelectCode(Node);
270}
271
272bool MipsDAGToDAGISel::SelectInlineAsmMemoryOperand(
274 std::vector &OutOps) {
275
276 switch(ConstraintID) {
277 default:
282 OutOps.push_back(Op);
283 return false;
284 }
285 return true;
286}
287
288bool MipsDAGToDAGISel::isUnneededShiftMask(SDNode *N,
289 unsigned ShAmtBits) const {
290 assert(N->getOpcode() == ISD::AND && "Unexpected opcode");
291
292 const APInt &RHS = N->getConstantOperandAPInt(1);
293 if (RHS.countr_one() >= ShAmtBits) {
297 << " Need optimize 'and & shl/srl/sra' and operand value bits is "
298 << RHS.countr_one() << "\n");
299 return true;
300 }
301
302 KnownBits Known = CurDAG->computeKnownBits(N->getOperand(0));
303 return (Known.Zero | RHS).countr_one() >= ShAmtBits;
304}
305
307
309 std::unique_ptr S)
311
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
Class for arbitrary precision integers.
Represent the analysis usage information of a pass.
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition MipsISelDAGToDAG.cpp:42
MipsDAGToDAGISelLegacy(std::unique_ptr< SelectionDAGISel > S)
Definition MipsISelDAGToDAG.cpp:308
bool runOnMachineFunction(MachineFunction &MF) override
Definition MipsISelDAGToDAG.cpp:49
const MipsSubtarget * Subtarget
Keep a pointer to the MipsSubtarget around so that we can make the right decision when generating cod...
SDNode * getGlobalBaseReg()
getGlobalBaseReg - Output the instructions required to put the GOT address into a register.
Definition MipsISelDAGToDAG.cpp:60
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
Wrapper class representing virtual and physical registers.
Represents one node in the SelectionDAG.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SDNode * getNode() const
get the SDNode which holds the desired result
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
SelectionDAGISelLegacy(char &ID, std::unique_ptr< SelectionDAGISel > S)
void ReplaceNode(SDNode *F, SDNode *T)
Replace all uses of F with T, then remove F from the DAG.
virtual bool runOnMachineFunction(MachineFunction &mf)
const TargetLowering * getTargetLowering() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
@ ADD
Simple integer binary arithmetic operators.
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
@ AND
Bitwise operators - logical and, logical or, logical xor.
NodeAddr< NodeBase * > Node
This is an optimization pass for GlobalISel generic memory operations.
decltype(auto) dyn_cast(const From &Val)
dyn_cast - Return the argument parameter cast to the specified type.
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
LLVM_ABI raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
DWARFExpression::Operation Op
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
decltype(auto) cast(const From &Val)
cast - Return the argument parameter cast to the specified type.
Implement std::hash so that hash_code can be used in STL containers.
bool isVector() const
Return true if this is a vector value type.